1718 lines
79 KiB
Plaintext
Executable File
1718 lines
79 KiB
Plaintext
Executable File
----------------------------------------------------------------------
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Patch name: Trace Cache Speedup
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Author: Stanislav Shwartsman
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Date: 7 Mar 2007
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Status:
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Detailed description:
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This patch implements trace cache to speed up Bochs simuation.
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Measured speedup is between 10% and 15%.
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Patch was created with:
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cvs diff -u
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Instructions:
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To patch, go to main bochs directory.
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Type "patch -p0 < THIS_PATCH_FILE".
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----------------------------------------------------------------------
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diff -u -r bochs-trace-cache-root/cpu/cpu.cc bochs-trace-cache/cpu/cpu.cc
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--- bochs-trace-cache-root/cpu/cpu.cc 2007-03-06 19:47:18.000000000 +0200
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+++ bochs-trace-cache/cpu/cpu.cc 2007-03-07 20:56:27.921875000 +0200
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@@ -77,16 +77,19 @@
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#if InstrumentICACHE
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static unsigned iCacheLookups=0;
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static unsigned iCacheMisses=0;
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+static unsigned iCacheMergeTraces=0;
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+static unsigned iCacheLength[BX_MAX_TRACE_LENGTH+1];
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#define InstrICache_StatsMask 0xffffff
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#define InstrICache_Stats() {\
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if ((iCacheLookups & InstrICache_StatsMask) == 0) { \
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- BX_INFO(("ICACHE lookups: %u, misses: %u, hit rate = %6.2f%% ", \
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+ BX_INFO(("ICACHE lookups: %u, misses: %u, merges: %u, hit rate = %6.2f%% ", \
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iCacheLookups, \
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iCacheMisses, \
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+ iCacheMergeTraces, \
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(iCacheLookups-iCacheMisses) * 100.0 / iCacheLookups)); \
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- iCacheLookups = iCacheMisses = 0; \
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+ iCacheLookups = iCacheMisses = iCacheMergeTraces = 0; \
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} \
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}
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#define InstrICache_Increment(v) (v)++
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@@ -118,49 +121,125 @@
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#define RSP ESP
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#endif
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-BX_CPP_INLINE bxInstruction_c* BX_CPU_C::fetchInstruction(bxInstruction_c *iStorage, bx_address eipBiased)
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-{
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- unsigned ret;
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- bxInstruction_c *i = iStorage;
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-
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#if BX_SUPPORT_ICACHE
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+
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+bxICacheEntry_c* BX_CPU_C::fetchInstructionTrace(bxInstruction_c *iStorage, bx_address eipBiased)
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+{
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bx_phy_address pAddr = BX_CPU_THIS_PTR pAddrA20Page + eipBiased;
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unsigned iCacheHash = BX_CPU_THIS_PTR iCache.hash(pAddr);
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- bxICacheEntry_c *cache_entry = &(BX_CPU_THIS_PTR iCache.entry[iCacheHash]);
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- i = &(cache_entry->i);
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-
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+ bxICacheEntry_c *trace = &(BX_CPU_THIS_PTR iCache.entry[iCacheHash]);
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Bit32u pageWriteStamp = *(BX_CPU_THIS_PTR currPageWriteStampPtr);
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InstrICache_Increment(iCacheLookups);
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InstrICache_Stats();
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- if ((cache_entry->pAddr == pAddr) &&
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- (cache_entry->writeStamp == pageWriteStamp))
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+ if ((trace->pAddr == pAddr) &&
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+ (trace->writeStamp == pageWriteStamp))
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{
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- // iCache hit. Instruction is already decoded and stored in the
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- // instruction cache.
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-#if BX_INSTRUMENTATION
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- // An instruction was found in the iCache.
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- BX_INSTR_OPCODE(BX_CPU_ID, BX_CPU_THIS_PTR eipFetchPtr + eipBiased,
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- i->ilen(), BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b, Is64BitMode());
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-#endif
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- return i;
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+ return trace; // We are lucky - trace cache hit !
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}
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-#endif
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- // iCache miss. No validated instruction with matching fetch parameters
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- // is in the iCache. Or we're not compiling iCache support in, in which
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- // case we always have an iCache miss. :^)
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+ // We are not so lucky, but let's be optimistic - try to build trace from
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+ // incoming instruction bytes stream !
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+ trace->pAddr = pAddr;
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+ trace->writeStamp = ICacheWriteStampInvalid;
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+ trace->ilen = 0;
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+
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+ InstrICache_Increment(iCacheMisses);
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+
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bx_address remainingInPage = (BX_CPU_THIS_PTR eipPageWindowSize - eipBiased);
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unsigned maxFetch = 15;
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if (remainingInPage < 15) maxFetch = remainingInPage;
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Bit8u *fetchPtr = BX_CPU_THIS_PTR eipFetchPtr + eipBiased;
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+ unsigned ret;
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-#if BX_SUPPORT_ICACHE
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- // The entry will be marked valid if fetchdecode will succeed
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- cache_entry->writeStamp = ICacheWriteStampInvalid;
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- InstrICache_Increment(iCacheMisses);
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+ // We could include in trace maximum BX_MAX_TRACE_LEN instructions
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+ unsigned max_length = BX_MAX_TRACE_LENGTH;
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+ if ((pageWriteStamp & ICacheWriteStampMask) != ICacheWriteStampStart)
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+ max_length = 1; // seems like the entry has SMC ping-pong problem
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+
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+ bxInstruction_c *i = trace->i;
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+
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+ for (unsigned len=0;len<max_length;len++)
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+ {
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+#if BX_SUPPORT_X86_64
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+ if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64)
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+ ret = fetchDecode64(fetchPtr, i, maxFetch);
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+ else
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#endif
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+ ret = fetchDecode32(fetchPtr, i, maxFetch);
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+
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+ if (ret==0) {
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+ // Fetching instruction on segment/page boundary
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+ if (len > 0) {
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+ // The trace is already valid, it has several instructions inside,
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+ // in this case just drop the boundary instruction and stop
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+ // tracing.
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+ break;
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+ }
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+ // First instruction is boundary fetch, return iStorage and leave
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+ // the trace cache entry invalid (do not cache the instruction)
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+ boundaryFetch(fetchPtr, remainingInPage, iStorage);
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+ return 0;
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+ }
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+
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+ // add instruction to the trace ...
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+ unsigned iLen = i->ilen();
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+ trace->writeStamp = pageWriteStamp;
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+ trace->ilen++;
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+ if (i->getStopTraceAttr()) break;
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+
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+ // ... and continue to the next instruction
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+ remainingInPage -= iLen;
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+ if (remainingInPage == 0) break;
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+ if (remainingInPage < 15) maxFetch = remainingInPage;
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+ fetchPtr += iLen;
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+ pAddr += iLen;
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+ i++;
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+
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+ if (mergeTraces(trace, i, pAddr)) break;
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+ }
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+
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+ InstrICache_Increment(iCacheLength[trace->ilen-1]);
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+
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+ return trace;
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+}
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+
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+bx_bool BX_CPU_C::mergeTraces(bxICacheEntry_c *trace, bxInstruction_c *i, bx_phy_address pAddr)
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+{
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+ bxICacheEntry_c *e = &(BX_CPU_THIS_PTR iCache.entry[BX_CPU_THIS_PTR iCache.hash(pAddr)]);
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+
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+ if ((e->pAddr == pAddr) && (e->writeStamp == trace->writeStamp))
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+ {
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+ // We are lucky - another trace hit !
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+ InstrICache_Increment(iCacheMergeTraces);
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+
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+ // determine max amount of instruction to take from another trace
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+ unsigned max_length = e->ilen;
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+ if (max_length + trace->ilen > BX_MAX_TRACE_LENGTH)
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+ max_length = BX_MAX_TRACE_LENGTH - trace->ilen;
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+ if(max_length == 0) return 0;
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+
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+ memcpy(i, e->i, sizeof(bxInstruction_c)*max_length);
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+ trace->ilen += max_length;
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+ BX_ASSERT(trace->ilen <= BX_MAX_TRACE_LENGTH);
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+
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+ return 1;
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+ }
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+
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+ return 0;
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+}
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+
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+#else
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+
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+BX_CPP_INLINE bxInstruction_c* BX_CPU_C::fetchInstruction(bxInstruction_c *iStorage, bx_address eipBiased)
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+{
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+ bxInstruction_c *i = iStorage;
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+ bx_address remainingInPage = (BX_CPU_THIS_PTR eipPageWindowSize - eipBiased);
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+ unsigned maxFetch = 15;
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+ if (remainingInPage < 15) maxFetch = remainingInPage;
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+ Bit8u *fetchPtr = BX_CPU_THIS_PTR eipFetchPtr + eipBiased;
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+ unsigned ret;
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#if BX_SUPPORT_X86_64
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if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64)
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@@ -170,26 +249,14 @@
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ret = fetchDecode32(fetchPtr, i, maxFetch);
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if (ret==0) {
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- // return iStorage and leave icache entry invalid (do not cache instr)
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- boundaryFetch(fetchPtr, remainingInPage, iStorage);
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- return iStorage;
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- }
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- else
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- {
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-#if BX_SUPPORT_ICACHE
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- cache_entry->pAddr = pAddr;
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- cache_entry->writeStamp = pageWriteStamp;
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-#endif
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-#if BX_INSTRUMENTATION
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- // An instruction was either fetched, or found in the iCache.
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- BX_INSTR_OPCODE(BX_CPU_ID, fetchPtr, i->ilen(),
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- BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b, Is64BitMode());
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-#endif
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+ boundaryFetch(fetchPtr, remainingInPage, i);
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}
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return i;
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}
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+#endif
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+
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void BX_CPU_C::cpu_loop(Bit32u max_instr_count)
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{
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bxInstruction_c iStorage BX_CPP_AlignN(32);
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@@ -207,9 +274,7 @@
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// only from exception function can we get here ...
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BX_INSTR_NEW_INSTRUCTION(BX_CPU_ID);
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#if BX_GDBSTUB
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- if (bx_dbg.gdbstub_enabled) {
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- return;
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- }
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+ if (bx_dbg.gdbstub_enabled) return;
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#endif
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}
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@@ -251,43 +316,57 @@
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eipBiased = RIP + BX_CPU_THIS_PTR eipPageBias;
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}
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- // fetch and decode next instruction
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- bxInstruction_c *i = fetchInstruction(&iStorage, eipBiased);
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- BxExecutePtr_tR resolveModRM = i->ResolveModrm; // Get as soon as possible for speculation
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- BxExecutePtr_t execute = i->execute; // fetch as soon as possible for speculation
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- if (resolveModRM)
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- BX_CPU_CALL_METHODR(resolveModRM, (i));
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-
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- // An instruction will have been fetched using either the normal case,
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- // or the boundary fetch (across pages), by this point.
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- BX_INSTR_FETCH_DECODE_COMPLETED(BX_CPU_ID, i);
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+ bxInstruction_c *i = &iStorage;
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+ unsigned length = 1, n;
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+
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+#if BX_SUPPORT_ICACHE
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+ bxICacheEntry_c *trace = fetchInstructionTrace(&iStorage, eipBiased);
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+ if (trace) {
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+ i = trace->i; // execute from first instruction in trace
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+ length = trace->ilen;
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+ }
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+#else
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+ // fetch and decode single instruction
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+ i = fetchInstruction(&iStorage, eipBiased);
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+#endif
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+
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+ for (n=0; n < length; n++, i++) {
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+
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+ BxExecutePtr_tR resolveModRM = i->ResolveModrm; // Get as soon as possible for speculation
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+ BxExecutePtr_t execute = i->execute; // fetch as soon as possible for speculation
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+ if (resolveModRM)
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+ BX_CPU_CALL_METHODR(resolveModRM, (i));
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+
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+ // An instruction will have been fetched using either the normal case,
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+ // or the boundary fetch (across pages), by this point.
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+ BX_INSTR_FETCH_DECODE_COMPLETED(BX_CPU_ID, i);
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#if BX_DEBUGGER || BX_EXTERNAL_DEBUGGER || BX_GDBSTUB
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if (dbg_instruction_prolog()) return;
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#endif
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#if BX_DISASM
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- if (BX_CPU_THIS_PTR trace) {
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- // print the instruction that is about to be executed
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+ if (BX_CPU_THIS_PTR trace) {
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+ // print the instruction that is about to be executed
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#if BX_DEBUGGER
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- bx_dbg_disassemble_current(BX_CPU_ID, 1); // only one cpu, print time stamp
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+ bx_dbg_disassemble_current(BX_CPU_ID, 1); // only one cpu, print time stamp
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#else
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- debug_disasm_instruction(BX_CPU_THIS_PTR prev_eip);
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+ debug_disasm_instruction(BX_CPU_THIS_PTR prev_eip);
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#endif
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- }
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+ }
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#endif
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- // decoding instruction compeleted -> continue with execution
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- BX_INSTR_BEFORE_EXECUTION(BX_CPU_ID, i);
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- RIP += i->ilen();
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- BX_CPU_CALL_METHOD(execute, (i)); // might iterate repeat instruction
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- BX_CPU_THIS_PTR prev_eip = RIP; // commit new RIP
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- BX_CPU_THIS_PTR prev_esp = RSP; // commit new RSP
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- BX_INSTR_AFTER_EXECUTION(BX_CPU_ID, i);
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- BX_TICK1_IF_SINGLE_PROCESSOR();
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+ // decoding instruction compeleted -> continue with execution
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+ BX_INSTR_BEFORE_EXECUTION(BX_CPU_ID, i);
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+ RIP += i->ilen();
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+ BX_CPU_CALL_METHOD(execute, (i)); // might iterate repeat instruction
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+ BX_CPU_THIS_PTR prev_eip = RIP; // commit new RIP
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+ BX_CPU_THIS_PTR prev_esp = RSP; // commit new RSP
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+ BX_INSTR_AFTER_EXECUTION(BX_CPU_ID, i);
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+ BX_TICK1_IF_SINGLE_PROCESSOR();
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- // inform instrumentation about new instruction
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- BX_INSTR_NEW_INSTRUCTION(BX_CPU_ID);
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+ // inform instrumentation about new instruction
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+ BX_INSTR_NEW_INSTRUCTION(BX_CPU_ID);
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// note instr generating exceptions never reach this point
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#if BX_DEBUGGER || BX_EXTERNAL_DEBUGGER || BX_GDBSTUB
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@@ -295,13 +374,24 @@
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#endif
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#if BX_SUPPORT_SMP || BX_DEBUGGER
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- // The CHECK_MAX_INSTRUCTIONS macro allows cpu_loop to execute a few
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- // instructions and then return so that the other processors have a chance
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- // to run. This is used only when simulating multiple processors. If only
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- // one processor, don't waste any cycles on it!
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- CHECK_MAX_INSTRUCTIONS(max_instr_count);
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+ // The CHECK_MAX_INSTRUCTIONS macro allows cpu_loop to execute a few
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+ // instructions and then return so that the other processors have a chance
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+ // to run. This is used only when simulating multiple processors. If only
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+ // one processor, don't waste any cycles on it!
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+ CHECK_MAX_INSTRUCTIONS(max_instr_count);
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#endif
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+#if BX_SUPPORT_ICACHE
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+ if (length > 1) {
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+ if (trace->writeStamp != *(BX_CPU_THIS_PTR currPageWriteStampPtr))
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+ break; // probably it is self modifying code ...
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+ }
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+#endif
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+
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+ if (BX_CPU_THIS_PTR async_event) break;
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+
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+ } // trace execution
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+
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} // while (1)
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}
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diff -u -r bochs-trace-cache-root/cpu/cpu.h bochs-trace-cache/cpu/cpu.h
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--- bochs-trace-cache-root/cpu/cpu.h 2007-03-06 19:47:18.000000000 +0200
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+++ bochs-trace-cache/cpu/cpu.h 2007-03-07 20:53:30.046875000 +0200
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@@ -659,7 +659,7 @@
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// 6...6 os64
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// 5...5 as32
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// 4...4 os32
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- // 3...3 (unused)
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+ // 3...3 stop trace (using with trace cache)
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// 2...0 seg
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Bit32u metaInfo;
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@@ -839,6 +839,15 @@
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}
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#endif
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+#if BX_SUPPORT_ICACHE
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+ BX_CPP_INLINE void setStopTraceAttr(void) {
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+ metaInfo |= (1<<3);
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+ }
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+ BX_CPP_INLINE unsigned getStopTraceAttr(void) {
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+ return metaInfo & (1<<3);
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+ }
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+#endif
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+
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BX_CPP_INLINE unsigned repUsedL(void) {
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return metaInfo & (3<<9);
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}
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@@ -2511,7 +2520,6 @@
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BX_SMF void CMPXCHG16B(bxInstruction_c *);
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#endif // #if BX_SUPPORT_X86_64
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- // mch added
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BX_SMF void INVLPG(bxInstruction_c *);
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BX_SMF void RSM(bxInstruction_c *);
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@@ -2526,7 +2534,12 @@
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#if BX_SUPPORT_X86_64
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BX_SMF unsigned fetchDecode64(Bit8u *, bxInstruction_c *, unsigned);
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#endif
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+#if BX_SUPPORT_ICACHE
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+ BX_SMF bxICacheEntry_c* fetchInstructionTrace(bxInstruction_c *, bx_address);
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+ BX_SMF bx_bool mergeTraces(bxICacheEntry_c *trace, bxInstruction_c *i, bx_phy_address pAddr);
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+#else
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BX_SMF bxInstruction_c* fetchInstruction(bxInstruction_c *, bx_address);
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+#endif
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BX_SMF void UndefinedOpcode(bxInstruction_c *);
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BX_SMF void BxError(bxInstruction_c *i);
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@@ -2671,6 +2684,10 @@
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BX_SMF bx_bool dbg_instruction_prolog(void);
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BX_SMF bx_bool dbg_instruction_epilog(void);
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#endif
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+#if BX_DEBUGGER || BX_EXTERNAL_DEBUGGER || BX_GDBSTUB
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+ BX_SMF bx_bool dbg_instruction_prolog(void);
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+ BX_SMF bx_bool dbg_instruction_epilog(void);
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+#endif
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#if BX_DEBUGGER || BX_DISASM || BX_INSTRUMENTATION || BX_GDBSTUB
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BX_SMF bx_bool dbg_xlate_linear2phy(bx_address linear, bx_phy_address *phy);
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#endif
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@@ -3354,6 +3371,12 @@
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#define BxLockable 0x0200 // bit 9
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#define Bx3ByteOpcode 0x0400 // bit 10
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+#if BX_SUPPORT_ICACHE
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+ #define BxTraceEnd 0x2000 // bit 13
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+#else
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+ #define BxTraceEnd 0
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+#endif
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+
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#define BxGroup1 BxGroupN
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#define BxGroup2 BxGroupN
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#define BxGroup3 BxGroupN
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diff -u -r bochs-trace-cache-root/cpu/fetchdecode.cc bochs-trace-cache/cpu/fetchdecode.cc
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--- bochs-trace-cache-root/cpu/fetchdecode.cc 2007-01-28 23:27:30.000000000 +0200
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+++ bochs-trace-cache/cpu/fetchdecode.cc 2007-03-07 21:34:51.718750000 +0200
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@@ -261,10 +261,10 @@
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// attributes defined in main area
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/* 0 */ { BxLockable, &BX_CPU_C::INC_Ew },
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/* 1 */ { BxLockable, &BX_CPU_C::DEC_Ew },
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- /* 2 */ { 0, &BX_CPU_C::CALL_Ew },
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- /* 3 */ { 0, &BX_CPU_C::CALL16_Ep },
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- /* 4 */ { 0, &BX_CPU_C::JMP_Ew },
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- /* 5 */ { 0, &BX_CPU_C::JMP16_Ep },
|
|
+ /* 2 */ { BxTraceEnd, &BX_CPU_C::CALL_Ew },
|
|
+ /* 3 */ { BxTraceEnd, &BX_CPU_C::CALL16_Ep },
|
|
+ /* 4 */ { BxTraceEnd, &BX_CPU_C::JMP_Ew },
|
|
+ /* 5 */ { BxTraceEnd, &BX_CPU_C::JMP16_Ep },
|
|
/* 6 */ { 0, &BX_CPU_C::PUSH_Ew },
|
|
/* 7 */ { 0, &BX_CPU_C::BxError }
|
|
};
|
|
@@ -273,10 +273,10 @@
|
|
// attributes defined in main area
|
|
/* 0 */ { BxLockable, &BX_CPU_C::INC_Ed },
|
|
/* 1 */ { BxLockable, &BX_CPU_C::DEC_Ed },
|
|
- /* 2 */ { 0, &BX_CPU_C::CALL_Ed },
|
|
- /* 3 */ { 0, &BX_CPU_C::CALL32_Ep },
|
|
- /* 4 */ { 0, &BX_CPU_C::JMP_Ed },
|
|
- /* 5 */ { 0, &BX_CPU_C::JMP32_Ep },
|
|
+ /* 2 */ { BxTraceEnd, &BX_CPU_C::CALL_Ed },
|
|
+ /* 3 */ { BxTraceEnd, &BX_CPU_C::CALL32_Ep },
|
|
+ /* 4 */ { BxTraceEnd, &BX_CPU_C::JMP_Ed },
|
|
+ /* 5 */ { BxTraceEnd, &BX_CPU_C::JMP32_Ep },
|
|
/* 6 */ { 0, &BX_CPU_C::PUSH_Ed },
|
|
/* 7 */ { 0, &BX_CPU_C::BxError }
|
|
};
|
|
@@ -296,12 +296,12 @@
|
|
static const BxOpcodeInfo_t BxOpcodeInfoG7[8] = {
|
|
/* 0 */ { 0, &BX_CPU_C::SGDT_Ms },
|
|
/* 1 */ { 0, &BX_CPU_C::SIDT_Ms },
|
|
- /* 2 */ { 0, &BX_CPU_C::LGDT_Ms },
|
|
- /* 3 */ { 0, &BX_CPU_C::LIDT_Ms },
|
|
+ /* 2 */ { BxTraceEnd, &BX_CPU_C::LGDT_Ms },
|
|
+ /* 3 */ { BxTraceEnd, &BX_CPU_C::LIDT_Ms },
|
|
/* 4 */ { 0, &BX_CPU_C::SMSW_Ew },
|
|
/* 5 */ { 0, &BX_CPU_C::BxError },
|
|
- /* 6 */ { 0, &BX_CPU_C::LMSW_Ew },
|
|
- /* 7 */ { 0, &BX_CPU_C::INVLPG }
|
|
+ /* 6 */ { BxTraceEnd, &BX_CPU_C::LMSW_Ew },
|
|
+ /* 7 */ { BxTraceEnd, &BX_CPU_C::INVLPG }
|
|
};
|
|
|
|
static const BxOpcodeInfo_t BxOpcodeInfoG8EwIb[8] = {
|
|
@@ -512,22 +512,22 @@
|
|
/* 6D */ { 0, &BX_CPU_C::REP_INSW_YwDX },
|
|
/* 6E */ { 0, &BX_CPU_C::REP_OUTSB_DXXb },
|
|
/* 6F */ { 0, &BX_CPU_C::REP_OUTSW_DXXw },
|
|
- /* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 74 */ { BxImmediate_BrOff8, &BX_CPU_C::JZ_Jw },
|
|
- /* 75 */ { BxImmediate_BrOff8, &BX_CPU_C::JNZ_Jw },
|
|
- /* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
- /* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jw },
|
|
+ /* 70 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 71 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 72 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 73 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 74 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JZ_Jw },
|
|
+ /* 75 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JNZ_Jw },
|
|
+ /* 76 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 77 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 78 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 79 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 7A */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 7B */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 7C */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 7D */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 7E */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 7F */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
/* 80 */ { BxAnother | BxGroup1, NULL, BxOpcodeInfoG1EbIb },
|
|
/* 81 */ { BxAnother | BxGroup1 | BxImmediate_Iv, NULL, BxOpcodeInfoG1Ew },
|
|
/* 82 */ { BxAnother | BxGroup1, NULL, BxOpcodeInfoG1EbIb },
|
|
@@ -554,7 +554,7 @@
|
|
/* 97 */ { 0, &BX_CPU_C::XCHG_RXAX },
|
|
/* 98 */ { 0, &BX_CPU_C::CBW },
|
|
/* 99 */ { 0, &BX_CPU_C::CWD },
|
|
- /* 9A */ { BxImmediate_IvIw, &BX_CPU_C::CALL16_Ap },
|
|
+ /* 9A */ { BxImmediate_IvIw | BxTraceEnd, &BX_CPU_C::CALL16_Ap },
|
|
/* 9B */ { 0, &BX_CPU_C::FWAIT },
|
|
/* 9C */ { 0, &BX_CPU_C::PUSHF_Fw },
|
|
/* 9D */ { 0, &BX_CPU_C::POPF_Fw },
|
|
@@ -594,20 +594,20 @@
|
|
/* BF */ { BxImmediate_Iv, &BX_CPU_C::MOV_RXIw },
|
|
/* C0 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfoG2Eb },
|
|
/* C1 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfoG2Ew },
|
|
- /* C2 */ { BxImmediate_Iw, &BX_CPU_C::RETnear16_Iw },
|
|
- /* C3 */ { 0, &BX_CPU_C::RETnear16 },
|
|
+ /* C2 */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETnear16_Iw },
|
|
+ /* C3 */ { BxTraceEnd, &BX_CPU_C::RETnear16 },
|
|
/* C4 */ { BxAnother, &BX_CPU_C::LES_GvMp },
|
|
/* C5 */ { BxAnother, &BX_CPU_C::LDS_GvMp },
|
|
/* C6 */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::MOV_EbIb },
|
|
/* C7 */ { BxAnother | BxImmediate_Iv, &BX_CPU_C::MOV_EwIw },
|
|
/* C8 */ { BxImmediate_IwIb, &BX_CPU_C::ENTER_IwIb },
|
|
/* C9 */ { 0, &BX_CPU_C::LEAVE },
|
|
- /* CA */ { BxImmediate_Iw, &BX_CPU_C::RETfar16_Iw },
|
|
- /* CB */ { 0, &BX_CPU_C::RETfar16 },
|
|
- /* CC */ { 0, &BX_CPU_C::INT3 },
|
|
- /* CD */ { BxImmediate_Ib, &BX_CPU_C::INT_Ib },
|
|
- /* CE */ { 0, &BX_CPU_C::INTO },
|
|
- /* CF */ { 0, &BX_CPU_C::IRET16 },
|
|
+ /* CA */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETfar16_Iw },
|
|
+ /* CB */ { BxTraceEnd, &BX_CPU_C::RETfar16 },
|
|
+ /* CC */ { BxTraceEnd, &BX_CPU_C::INT3 },
|
|
+ /* CD */ { BxImmediate_Ib | BxTraceEnd, &BX_CPU_C::INT_Ib },
|
|
+ /* CE */ { BxTraceEnd, &BX_CPU_C::INTO },
|
|
+ /* CF */ { BxTraceEnd, &BX_CPU_C::IRET16 },
|
|
/* D0 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfoG2Eb },
|
|
/* D1 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfoG2Ew },
|
|
/* D2 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfoG2Eb },
|
|
@@ -636,27 +636,27 @@
|
|
/* DE */ { BxAnother, &BX_CPU_C::FPU_ESC },
|
|
/* DF */ { BxAnother, &BX_CPU_C::FPU_ESC },
|
|
#endif
|
|
- /* E0 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOPNE_Jb },
|
|
- /* E1 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOPE_Jb },
|
|
- /* E2 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOP_Jb },
|
|
- /* E3 */ { BxImmediate_BrOff8, &BX_CPU_C::JCXZ_Jb },
|
|
+ /* E0 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOPNE_Jb },
|
|
+ /* E1 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOPE_Jb },
|
|
+ /* E2 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOP_Jb },
|
|
+ /* E3 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCXZ_Jb },
|
|
/* E4 */ { BxImmediate_Ib, &BX_CPU_C::IN_ALIb },
|
|
/* E5 */ { BxImmediate_Ib, &BX_CPU_C::IN_AXIb },
|
|
/* E6 */ { BxImmediate_Ib, &BX_CPU_C::OUT_IbAL },
|
|
/* E7 */ { BxImmediate_Ib, &BX_CPU_C::OUT_IbAX },
|
|
- /* E8 */ { BxImmediate_BrOff16, &BX_CPU_C::CALL_Aw },
|
|
- /* E9 */ { BxImmediate_BrOff16, &BX_CPU_C::JMP_Jw },
|
|
- /* EA */ { BxImmediate_IvIw, &BX_CPU_C::JMP_Ap },
|
|
- /* EB */ { BxImmediate_BrOff8, &BX_CPU_C::JMP_Jw },
|
|
+ /* E8 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::CALL_Aw },
|
|
+ /* E9 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JMP_Jw },
|
|
+ /* EA */ { BxImmediate_IvIw | BxTraceEnd, &BX_CPU_C::JMP_Ap },
|
|
+ /* EB */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JMP_Jw },
|
|
/* EC */ { 0, &BX_CPU_C::IN_ALDX },
|
|
/* ED */ { 0, &BX_CPU_C::IN_AXDX },
|
|
/* EE */ { 0, &BX_CPU_C::OUT_DXAL },
|
|
/* EF */ { 0, &BX_CPU_C::OUT_DXAX },
|
|
/* F0 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // LOCK
|
|
- /* F1 */ { 0, &BX_CPU_C::INT1 },
|
|
+ /* F1 */ { BxTraceEnd, &BX_CPU_C::INT1 },
|
|
/* F2 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // REPNE/REPNZ
|
|
/* F3 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // REP, REPE/REPZ
|
|
- /* F4 */ { 0, &BX_CPU_C::HLT },
|
|
+ /* F4 */ { BxTraceEnd, &BX_CPU_C::HLT },
|
|
/* F5 */ { 0, &BX_CPU_C::CMC },
|
|
/* F6 */ { BxAnother | BxGroup3, NULL, BxOpcodeInfoG3Eb },
|
|
/* F7 */ { BxAnother | BxGroup3, NULL, BxOpcodeInfoG3Ew },
|
|
@@ -675,22 +675,22 @@
|
|
/* 0F 03 */ { BxAnother, &BX_CPU_C::LSL_GvEw },
|
|
/* 0F 04 */ { 0, &BX_CPU_C::BxError },
|
|
#if BX_SUPPORT_X86_64
|
|
- /* 0F 05 */ { 0, &BX_CPU_C::SYSCALL },
|
|
+ /* 0F 05 */ { BxTraceEnd, &BX_CPU_C::SYSCALL },
|
|
#elif BX_CPU_LEVEL == 2
|
|
- /* 0F 05 */ { 0, &BX_CPU_C::LOADALL },
|
|
+ /* 0F 05 */ { BxTraceEnd, &BX_CPU_C::LOADALL },
|
|
#else
|
|
/* 0F 05 */ { 0, &BX_CPU_C::BxError },
|
|
#endif
|
|
/* 0F 06 */ { 0, &BX_CPU_C::CLTS },
|
|
#if BX_SUPPORT_X86_64
|
|
- /* 0F 07 */ { 0, &BX_CPU_C::SYSRET },
|
|
+ /* 0F 07 */ { BxTraceEnd, &BX_CPU_C::SYSRET },
|
|
#else
|
|
/* 0F 07 */ { 0, &BX_CPU_C::BxError },
|
|
#endif
|
|
- /* 0F 08 */ { 0, &BX_CPU_C::INVD },
|
|
- /* 0F 09 */ { 0, &BX_CPU_C::WBINVD },
|
|
+ /* 0F 08 */ { BxTraceEnd, &BX_CPU_C::INVD },
|
|
+ /* 0F 09 */ { BxTraceEnd, &BX_CPU_C::WBINVD },
|
|
/* 0F 0A */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F 0B */ { 0, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
+ /* 0F 0B */ { BxTraceEnd, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
/* 0F 0C */ { 0, &BX_CPU_C::BxError },
|
|
#if BX_SUPPORT_X86_64 || BX_SUPPORT_3DNOW
|
|
/* 0F 0D */ { BxAnother, &BX_CPU_C::NOP }, // 3DNow! PREFETCH on AMD, NOP on Intel
|
|
@@ -726,11 +726,11 @@
|
|
#endif
|
|
/* 0F 20 */ { BxAnother, &BX_CPU_C::MOV_RdCd },
|
|
/* 0F 21 */ { BxAnother, &BX_CPU_C::MOV_RdDd },
|
|
- /* 0F 22 */ { BxAnother, &BX_CPU_C::MOV_CdRd },
|
|
+ /* 0F 22 */ { BxAnother | BxTraceEnd, &BX_CPU_C::MOV_CdRd },
|
|
/* 0F 23 */ { BxAnother, &BX_CPU_C::MOV_DdRd },
|
|
- /* 0F 24 */ { BxAnother, &BX_CPU_C::MOV_RdTd },
|
|
+ /* 0F 24 */ { BxAnother | BxTraceEnd, &BX_CPU_C::MOV_RdTd },
|
|
/* 0F 25 */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F 26 */ { BxAnother, &BX_CPU_C::MOV_TdRd },
|
|
+ /* 0F 26 */ { BxAnother | BxTraceEnd, &BX_CPU_C::MOV_TdRd },
|
|
/* 0F 27 */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F 28 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f28 },
|
|
/* 0F 29 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f29 },
|
|
@@ -740,12 +740,12 @@
|
|
/* 0F 2D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2d },
|
|
/* 0F 2E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2e },
|
|
/* 0F 2F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2f },
|
|
- /* 0F 30 */ { 0, &BX_CPU_C::WRMSR },
|
|
+ /* 0F 30 */ { BxTraceEnd, &BX_CPU_C::WRMSR },
|
|
/* 0F 31 */ { 0, &BX_CPU_C::RDTSC },
|
|
/* 0F 32 */ { 0, &BX_CPU_C::RDMSR },
|
|
/* 0F 33 */ { 0, &BX_CPU_C::RDPMC },
|
|
- /* 0F 34 */ { 0, &BX_CPU_C::SYSENTER },
|
|
- /* 0F 35 */ { 0, &BX_CPU_C::SYSEXIT },
|
|
+ /* 0F 34 */ { BxTraceEnd, &BX_CPU_C::SYSENTER },
|
|
+ /* 0F 35 */ { BxTraceEnd, &BX_CPU_C::SYSEXIT },
|
|
/* 0F 36 */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F 37 */ { 0, &BX_CPU_C::BxError },
|
|
#if BX_SUPPORT_SSE3E || BX_SUPPORT_SSE >= 4
|
|
@@ -828,22 +828,22 @@
|
|
/* 0F 7D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7d },
|
|
/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
|
|
/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
|
|
- /* 0F 80 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 81 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 82 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 83 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 84 */ { BxImmediate_BrOff16, &BX_CPU_C::JZ_Jw },
|
|
- /* 0F 85 */ { BxImmediate_BrOff16, &BX_CPU_C::JNZ_Jw },
|
|
- /* 0F 86 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 87 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 88 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 89 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 8A */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 8B */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 8C */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 8D */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 8E */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
- /* 0F 8F */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 80 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 81 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 82 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 83 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 84 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JZ_Jw },
|
|
+ /* 0F 85 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JNZ_Jw },
|
|
+ /* 0F 86 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 87 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 88 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 89 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 8A */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 8B */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 8C */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 8D */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 8E */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
+ /* 0F 8F */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jw },
|
|
/* 0F 90 */ { BxAnother, &BX_CPU_C::SETO_Eb },
|
|
/* 0F 91 */ { BxAnother, &BX_CPU_C::SETNO_Eb },
|
|
/* 0F 92 */ { BxAnother, &BX_CPU_C::SETB_Eb },
|
|
@@ -866,11 +866,11 @@
|
|
/* 0F A3 */ { BxAnother, &BX_CPU_C::BT_EwGw },
|
|
/* 0F A4 */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::SHLD_EwGw },
|
|
/* 0F A5 */ { BxAnother, &BX_CPU_C::SHLD_EwGw },
|
|
- /* 0F A6 */ { 0, &BX_CPU_C::CMPXCHG_XBTS },
|
|
- /* 0F A7 */ { 0, &BX_CPU_C::CMPXCHG_IBTS },
|
|
+ /* 0F A6 */ { BxTraceEnd, &BX_CPU_C::CMPXCHG_XBTS }, // Undefined Opcode
|
|
+ /* 0F A7 */ { BxTraceEnd, &BX_CPU_C::CMPXCHG_IBTS }, // Undefined Opcode
|
|
/* 0F A8 */ { 0, &BX_CPU_C::PUSH16_GS },
|
|
/* 0F A9 */ { 0, &BX_CPU_C::POP16_GS },
|
|
- /* 0F AA */ { 0, &BX_CPU_C::RSM },
|
|
+ /* 0F AA */ { BxTraceEnd, &BX_CPU_C::RSM },
|
|
/* 0F AB */ { BxAnother | BxLockable, &BX_CPU_C::BTS_EwGw },
|
|
/* 0F AC */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::SHRD_EwGw },
|
|
/* 0F AD */ { BxAnother, &BX_CPU_C::SHRD_EwGw },
|
|
@@ -885,7 +885,7 @@
|
|
/* 0F B6 */ { BxAnother, &BX_CPU_C::MOVZX_GwEb },
|
|
/* 0F B7 */ { BxAnother | BxSplitMod11b, NULL, opcodesMOV_GwEw }, // MOVZX_GwEw
|
|
/* 0F B8 */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F B9 */ { 0, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
+ /* 0F B9 */ { BxTraceEnd, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
/* 0F BA */ { BxAnother | BxGroup8, NULL, BxOpcodeInfoG8EwIb },
|
|
/* 0F BB */ { BxAnother | BxLockable, &BX_CPU_C::BTC_EwGw },
|
|
/* 0F BC */ { BxAnother, &BX_CPU_C::BSF_GwEw },
|
|
@@ -1070,22 +1070,22 @@
|
|
/* 6D */ { 0, &BX_CPU_C::REP_INSD_YdDX },
|
|
/* 6E */ { 0, &BX_CPU_C::REP_OUTSB_DXXb },
|
|
/* 6F */ { 0, &BX_CPU_C::REP_OUTSD_DXXd },
|
|
- /* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 74 */ { BxImmediate_BrOff8, &BX_CPU_C::JZ_Jd },
|
|
- /* 75 */ { BxImmediate_BrOff8, &BX_CPU_C::JNZ_Jd },
|
|
- /* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
- /* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jd },
|
|
+ /* 70 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 71 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 72 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 73 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 74 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JZ_Jd },
|
|
+ /* 75 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JNZ_Jd },
|
|
+ /* 76 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 77 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 78 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 79 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 7A */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 7B */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 7C */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 7D */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 7E */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 7F */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
/* 80 */ { BxAnother | BxGroup1, NULL, BxOpcodeInfoG1EbIb },
|
|
/* 81 */ { BxAnother | BxGroup1 | BxImmediate_Iv, NULL, BxOpcodeInfoG1Ed },
|
|
/* 82 */ { BxAnother | BxGroup1, NULL, BxOpcodeInfoG1EbIb },
|
|
@@ -1112,7 +1112,7 @@
|
|
/* 97 */ { 0, &BX_CPU_C::XCHG_ERXEAX },
|
|
/* 98 */ { 0, &BX_CPU_C::CWDE },
|
|
/* 99 */ { 0, &BX_CPU_C::CDQ },
|
|
- /* 9A */ { BxImmediate_IvIw, &BX_CPU_C::CALL32_Ap },
|
|
+ /* 9A */ { BxImmediate_IvIw | BxTraceEnd, &BX_CPU_C::CALL32_Ap },
|
|
/* 9B */ { 0, &BX_CPU_C::FWAIT },
|
|
/* 9C */ { 0, &BX_CPU_C::PUSHF_Fd },
|
|
/* 9D */ { 0, &BX_CPU_C::POPF_Fd },
|
|
@@ -1152,20 +1152,20 @@
|
|
/* BF */ { BxImmediate_Iv, &BX_CPU_C::MOV_ERXId },
|
|
/* C0 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfoG2Eb },
|
|
/* C1 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfoG2Ed },
|
|
- /* C2 */ { BxImmediate_Iw, &BX_CPU_C::RETnear32_Iw },
|
|
- /* C3 */ { 0, &BX_CPU_C::RETnear32 },
|
|
+ /* C2 */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETnear32_Iw },
|
|
+ /* C3 */ { BxTraceEnd, &BX_CPU_C::RETnear32 },
|
|
/* C4 */ { BxAnother, &BX_CPU_C::LES_GvMp },
|
|
/* C5 */ { BxAnother, &BX_CPU_C::LDS_GvMp },
|
|
/* C6 */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::MOV_EbIb },
|
|
/* C7 */ { BxAnother | BxImmediate_Iv, &BX_CPU_C::MOV_EdId },
|
|
/* C8 */ { BxImmediate_IwIb, &BX_CPU_C::ENTER_IwIb },
|
|
/* C9 */ { 0, &BX_CPU_C::LEAVE },
|
|
- /* CA */ { BxImmediate_Iw, &BX_CPU_C::RETfar32_Iw },
|
|
- /* CB */ { 0, &BX_CPU_C::RETfar32 },
|
|
- /* CC */ { 0, &BX_CPU_C::INT3 },
|
|
- /* CD */ { BxImmediate_Ib, &BX_CPU_C::INT_Ib },
|
|
- /* CE */ { 0, &BX_CPU_C::INTO },
|
|
- /* CF */ { 0, &BX_CPU_C::IRET32 },
|
|
+ /* CA */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETfar32_Iw },
|
|
+ /* CB */ { BxTraceEnd, &BX_CPU_C::RETfar32 },
|
|
+ /* CC */ { BxTraceEnd, &BX_CPU_C::INT3 },
|
|
+ /* CD */ { BxImmediate_Ib | BxTraceEnd, &BX_CPU_C::INT_Ib },
|
|
+ /* CE */ { BxTraceEnd, &BX_CPU_C::INTO },
|
|
+ /* CF */ { BxTraceEnd, &BX_CPU_C::IRET32 },
|
|
/* D0 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfoG2Eb },
|
|
/* D1 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfoG2Ed },
|
|
/* D2 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfoG2Eb },
|
|
@@ -1194,27 +1194,27 @@
|
|
/* DE */ { BxAnother, &BX_CPU_C::FPU_ESC },
|
|
/* DF */ { BxAnother, &BX_CPU_C::FPU_ESC },
|
|
#endif
|
|
- /* E0 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOPNE_Jb },
|
|
- /* E1 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOPE_Jb },
|
|
- /* E2 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOP_Jb },
|
|
- /* E3 */ { BxImmediate_BrOff8, &BX_CPU_C::JCXZ_Jb },
|
|
+ /* E0 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOPNE_Jb },
|
|
+ /* E1 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOPE_Jb },
|
|
+ /* E2 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOP_Jb },
|
|
+ /* E3 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCXZ_Jb },
|
|
/* E4 */ { BxImmediate_Ib, &BX_CPU_C::IN_ALIb },
|
|
/* E5 */ { BxImmediate_Ib, &BX_CPU_C::IN_EAXIb },
|
|
/* E6 */ { BxImmediate_Ib, &BX_CPU_C::OUT_IbAL },
|
|
/* E7 */ { BxImmediate_Ib, &BX_CPU_C::OUT_IbEAX },
|
|
- /* E8 */ { BxImmediate_BrOff32, &BX_CPU_C::CALL_Ad },
|
|
- /* E9 */ { BxImmediate_BrOff32, &BX_CPU_C::JMP_Jd },
|
|
- /* EA */ { BxImmediate_IvIw, &BX_CPU_C::JMP_Ap },
|
|
- /* EB */ { BxImmediate_BrOff8, &BX_CPU_C::JMP_Jd },
|
|
+ /* E8 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::CALL_Ad },
|
|
+ /* E9 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JMP_Jd },
|
|
+ /* EA */ { BxImmediate_IvIw | BxTraceEnd, &BX_CPU_C::JMP_Ap },
|
|
+ /* EB */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JMP_Jd },
|
|
/* EC */ { 0, &BX_CPU_C::IN_ALDX },
|
|
/* ED */ { 0, &BX_CPU_C::IN_EAXDX },
|
|
/* EE */ { 0, &BX_CPU_C::OUT_DXAL },
|
|
/* EF */ { 0, &BX_CPU_C::OUT_DXEAX },
|
|
/* F0 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // LOCK:
|
|
- /* F1 */ { 0, &BX_CPU_C::INT1 },
|
|
+ /* F1 */ { BxTraceEnd, &BX_CPU_C::INT1 },
|
|
/* F2 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // REPNE/REPNZ
|
|
/* F3 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // REP,REPE/REPZ
|
|
- /* F4 */ { 0, &BX_CPU_C::HLT },
|
|
+ /* F4 */ { BxTraceEnd, &BX_CPU_C::HLT },
|
|
/* F5 */ { 0, &BX_CPU_C::CMC },
|
|
/* F6 */ { BxAnother | BxGroup3, NULL, BxOpcodeInfoG3Eb },
|
|
/* F7 */ { BxAnother | BxGroup3, NULL, BxOpcodeInfoG3Ed },
|
|
@@ -1233,22 +1233,22 @@
|
|
/* 0F 03 */ { BxAnother, &BX_CPU_C::LSL_GvEw },
|
|
/* 0F 04 */ { 0, &BX_CPU_C::BxError },
|
|
#if BX_SUPPORT_X86_64
|
|
- /* 0F 05 */ { 0, &BX_CPU_C::SYSCALL },
|
|
+ /* 0F 05 */ { BxTraceEnd, &BX_CPU_C::SYSCALL },
|
|
#elif BX_CPU_LEVEL == 2
|
|
- /* 0F 05 */ { 0, &BX_CPU_C::LOADALL },
|
|
+ /* 0F 05 */ { BxTraceEnd, &BX_CPU_C::LOADALL },
|
|
#else
|
|
/* 0F 05 */ { 0, &BX_CPU_C::BxError },
|
|
#endif
|
|
/* 0F 06 */ { 0, &BX_CPU_C::CLTS },
|
|
#if BX_SUPPORT_X86_64
|
|
- /* 0F 07 */ { 0, &BX_CPU_C::SYSRET },
|
|
+ /* 0F 07 */ { BxTraceEnd, &BX_CPU_C::SYSRET },
|
|
#else
|
|
/* 0F 07 */ { 0, &BX_CPU_C::BxError },
|
|
#endif
|
|
- /* 0F 08 */ { 0, &BX_CPU_C::INVD },
|
|
- /* 0F 09 */ { 0, &BX_CPU_C::WBINVD },
|
|
+ /* 0F 08 */ { BxTraceEnd, &BX_CPU_C::INVD },
|
|
+ /* 0F 09 */ { BxTraceEnd, &BX_CPU_C::WBINVD },
|
|
/* 0F 0A */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F 0B */ { 0, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
+ /* 0F 0B */ { BxTraceEnd, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
/* 0F 0C */ { 0, &BX_CPU_C::BxError },
|
|
#if BX_SUPPORT_X86_64 || BX_SUPPORT_3DNOW
|
|
/* 0F 0D */ { BxAnother, &BX_CPU_C::NOP }, // 3DNow! PREFETCH on AMD, NOP on Intel
|
|
@@ -1284,11 +1284,11 @@
|
|
#endif
|
|
/* 0F 20 */ { BxAnother, &BX_CPU_C::MOV_RdCd },
|
|
/* 0F 21 */ { BxAnother, &BX_CPU_C::MOV_RdDd },
|
|
- /* 0F 22 */ { BxAnother, &BX_CPU_C::MOV_CdRd },
|
|
+ /* 0F 22 */ { BxAnother | BxTraceEnd, &BX_CPU_C::MOV_CdRd },
|
|
/* 0F 23 */ { BxAnother, &BX_CPU_C::MOV_DdRd },
|
|
- /* 0F 24 */ { BxAnother, &BX_CPU_C::MOV_RdTd },
|
|
+ /* 0F 24 */ { BxAnother | BxTraceEnd, &BX_CPU_C::MOV_RdTd },
|
|
/* 0F 25 */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F 26 */ { BxAnother, &BX_CPU_C::MOV_TdRd },
|
|
+ /* 0F 26 */ { BxAnother | BxTraceEnd, &BX_CPU_C::MOV_TdRd },
|
|
/* 0F 27 */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F 28 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f28 },
|
|
/* 0F 29 */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f29 },
|
|
@@ -1298,12 +1298,12 @@
|
|
/* 0F 2D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2d },
|
|
/* 0F 2E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2e },
|
|
/* 0F 2F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2f },
|
|
- /* 0F 30 */ { 0, &BX_CPU_C::WRMSR },
|
|
+ /* 0F 30 */ { BxTraceEnd, &BX_CPU_C::WRMSR },
|
|
/* 0F 31 */ { 0, &BX_CPU_C::RDTSC },
|
|
/* 0F 32 */ { 0, &BX_CPU_C::RDMSR },
|
|
/* 0F 33 */ { 0, &BX_CPU_C::RDPMC },
|
|
- /* 0F 34 */ { 0, &BX_CPU_C::SYSENTER },
|
|
- /* 0F 35 */ { 0, &BX_CPU_C::SYSEXIT },
|
|
+ /* 0F 34 */ { BxTraceEnd, &BX_CPU_C::SYSENTER },
|
|
+ /* 0F 35 */ { BxTraceEnd, &BX_CPU_C::SYSEXIT },
|
|
/* 0F 36 */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F 37 */ { 0, &BX_CPU_C::BxError },
|
|
#if BX_SUPPORT_SSE3E || BX_SUPPORT_SSE >= 4
|
|
@@ -1386,22 +1386,22 @@
|
|
/* 0F 7D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7d },
|
|
/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
|
|
/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
|
|
- /* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 83 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 84 */ { BxImmediate_BrOff32, &BX_CPU_C::JZ_Jd },
|
|
- /* 0F 85 */ { BxImmediate_BrOff32, &BX_CPU_C::JNZ_Jd },
|
|
- /* 0F 86 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 87 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 88 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 89 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 8A */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 8B */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 8C */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 8D */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 8E */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
- /* 0F 8F */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 80 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 81 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 82 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 83 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 84 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JZ_Jd },
|
|
+ /* 0F 85 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JNZ_Jd },
|
|
+ /* 0F 86 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 87 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 88 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 89 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 8A */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 8B */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 8C */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 8D */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 8E */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
+ /* 0F 8F */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jd },
|
|
/* 0F 90 */ { BxAnother, &BX_CPU_C::SETO_Eb },
|
|
/* 0F 91 */ { BxAnother, &BX_CPU_C::SETNO_Eb },
|
|
/* 0F 92 */ { BxAnother, &BX_CPU_C::SETB_Eb },
|
|
@@ -1424,11 +1424,11 @@
|
|
/* 0F A3 */ { BxAnother, &BX_CPU_C::BT_EdGd },
|
|
/* 0F A4 */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::SHLD_EdGd },
|
|
/* 0F A5 */ { BxAnother, &BX_CPU_C::SHLD_EdGd },
|
|
- /* 0F A6 */ { 0, &BX_CPU_C::CMPXCHG_XBTS },
|
|
- /* 0F A7 */ { 0, &BX_CPU_C::CMPXCHG_IBTS },
|
|
+ /* 0F A6 */ { BxTraceEnd, &BX_CPU_C::CMPXCHG_XBTS }, // Undefined Opcode
|
|
+ /* 0F A7 */ { BxTraceEnd, &BX_CPU_C::CMPXCHG_IBTS }, // Undefined Opcode
|
|
/* 0F A8 */ { 0, &BX_CPU_C::PUSH32_GS },
|
|
/* 0F A9 */ { 0, &BX_CPU_C::POP32_GS },
|
|
- /* 0F AA */ { 0, &BX_CPU_C::RSM },
|
|
+ /* 0F AA */ { BxTraceEnd, &BX_CPU_C::RSM },
|
|
/* 0F AB */ { BxAnother | BxLockable, &BX_CPU_C::BTS_EdGd },
|
|
/* 0F AC */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::SHRD_EdGd },
|
|
/* 0F AD */ { BxAnother, &BX_CPU_C::SHRD_EdGd },
|
|
@@ -1443,7 +1443,7 @@
|
|
/* 0F B6 */ { BxAnother, &BX_CPU_C::MOVZX_GdEb },
|
|
/* 0F B7 */ { BxAnother, &BX_CPU_C::MOVZX_GdEw },
|
|
/* 0F B8 */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F B9 */ { 0, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
+ /* 0F B9 */ { BxTraceEnd, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
/* 0F BA */ { BxAnother | BxGroup8, NULL, BxOpcodeInfoG8EdIb },
|
|
/* 0F BB */ { BxAnother | BxLockable, &BX_CPU_C::BTC_EdGd },
|
|
/* 0F BC */ { BxAnother, &BX_CPU_C::BSF_GdEd },
|
|
@@ -1642,6 +1642,10 @@
|
|
|
|
attr = BxOpcodeInfo[b1+offset].Attr;
|
|
|
|
+#if BX_SUPPORT_ICACHE
|
|
+ if (attr & BxTraceEnd) instruction->setStopTraceAttr();
|
|
+#endif
|
|
+
|
|
#if BX_SUPPORT_SSE3E || BX_SUPPORT_SSE >= 4
|
|
// handle 3-byte escape
|
|
if (attr & Bx3ByteOpcode) {
|
|
@@ -1862,6 +1866,9 @@
|
|
}
|
|
|
|
instruction->execute = OpcodeInfoPtr->ExecutePtr;
|
|
+#if BX_SUPPORT_ICACHE
|
|
+ if (attr & BxTraceEnd) instruction->setStopTraceAttr();
|
|
+#endif
|
|
}
|
|
else {
|
|
// Opcode does not require a MODRM byte.
|
|
@@ -1876,7 +1883,8 @@
|
|
// lock prefix not allowed or destination operand is not memory
|
|
if ((mod == 0xc0) || !(attr & BxLockable)) {
|
|
BX_INFO(("LOCK prefix unallowed (op1=0x%x, attr=0x%x, mod=0x%x, nnn=%u)", b1, attr, mod, nnn));
|
|
- UndefinedOpcode(instruction);
|
|
+ // replace execution function with undefined-opcode
|
|
+ instruction->execute = &BX_CPU_C::BxError;
|
|
}
|
|
}
|
|
|
|
@@ -2005,6 +2013,13 @@
|
|
if (BX_NULL_SEG_REG(instruction->seg()))
|
|
instruction->setSeg(BX_SEG_REG_DS);
|
|
|
|
+#if BX_SUPPORT_ICACHE
|
|
+ // set stop-trace attribute for invalid instructions
|
|
+ if(instruction->execute == &BX_CPU_C::BxError) {
|
|
+ instruction->setStopTraceAttr();
|
|
+ }
|
|
+#endif
|
|
+
|
|
instruction->setB1(b1);
|
|
instruction->setILen(ilen);
|
|
return(1);
|
|
diff -u -r bochs-trace-cache-root/cpu/fetchdecode64.cc bochs-trace-cache/cpu/fetchdecode64.cc
|
|
--- bochs-trace-cache-root/cpu/fetchdecode64.cc 2007-01-28 23:27:30.000000000 +0200
|
|
+++ bochs-trace-cache/cpu/fetchdecode64.cc 2007-03-07 21:34:39.109375000 +0200
|
|
@@ -357,10 +357,10 @@
|
|
// attributes defined in main area
|
|
/* 0 */ { BxLockable, &BX_CPU_C::INC_Ew },
|
|
/* 1 */ { BxLockable, &BX_CPU_C::DEC_Ew },
|
|
- /* 2 */ { 0, &BX_CPU_C::CALL_Ew },
|
|
- /* 3 */ { 0, &BX_CPU_C::CALL16_Ep },
|
|
- /* 4 */ { 0, &BX_CPU_C::JMP_Eq },
|
|
- /* 5 */ { 0, &BX_CPU_C::JMP16_Ep },
|
|
+ /* 2 */ { BxTraceEnd, &BX_CPU_C::CALL_Ew },
|
|
+ /* 3 */ { BxTraceEnd, &BX_CPU_C::CALL16_Ep },
|
|
+ /* 4 */ { BxTraceEnd, &BX_CPU_C::JMP_Eq },
|
|
+ /* 5 */ { BxTraceEnd, &BX_CPU_C::JMP16_Ep },
|
|
/* 6 */ { 0, &BX_CPU_C::PUSH_Ew },
|
|
/* 7 */ { 0, &BX_CPU_C::BxError }
|
|
};
|
|
@@ -369,10 +369,10 @@
|
|
// attributes defined in main area
|
|
/* 0 */ { BxLockable, &BX_CPU_C::INC_Ed },
|
|
/* 1 */ { BxLockable, &BX_CPU_C::DEC_Ed },
|
|
- /* 2 */ { 0, &BX_CPU_C::CALL_Eq },
|
|
- /* 3 */ { 0, &BX_CPU_C::CALL32_Ep },
|
|
- /* 4 */ { 0, &BX_CPU_C::JMP_Eq },
|
|
- /* 5 */ { 0, &BX_CPU_C::JMP32_Ep },
|
|
+ /* 2 */ { BxTraceEnd, &BX_CPU_C::CALL_Eq },
|
|
+ /* 3 */ { BxTraceEnd, &BX_CPU_C::CALL32_Ep },
|
|
+ /* 4 */ { BxTraceEnd, &BX_CPU_C::JMP_Eq },
|
|
+ /* 5 */ { BxTraceEnd, &BX_CPU_C::JMP32_Ep },
|
|
/* 6 */ { 0, &BX_CPU_C::PUSH_Eq },
|
|
/* 7 */ { 0, &BX_CPU_C::BxError }
|
|
};
|
|
@@ -381,10 +381,10 @@
|
|
// attributes defined in main area
|
|
/* 0 */ { BxLockable, &BX_CPU_C::INC_Eq },
|
|
/* 1 */ { BxLockable, &BX_CPU_C::DEC_Eq },
|
|
- /* 2 */ { 0, &BX_CPU_C::CALL_Eq },
|
|
- /* 3 */ { 0, &BX_CPU_C::CALL64_Ep },
|
|
- /* 4 */ { 0, &BX_CPU_C::JMP_Eq },
|
|
- /* 5 */ { 0, &BX_CPU_C::JMP64_Ep },
|
|
+ /* 2 */ { BxTraceEnd, &BX_CPU_C::CALL_Eq },
|
|
+ /* 3 */ { BxTraceEnd, &BX_CPU_C::CALL64_Ep },
|
|
+ /* 4 */ { BxTraceEnd, &BX_CPU_C::JMP_Eq },
|
|
+ /* 5 */ { BxTraceEnd, &BX_CPU_C::JMP64_Ep },
|
|
/* 6 */ { 0, &BX_CPU_C::PUSH_Eq },
|
|
/* 7 */ { 0, &BX_CPU_C::BxError }
|
|
};
|
|
@@ -428,12 +428,12 @@
|
|
static const BxOpcodeInfo_t BxOpcodeInfo64G7[8] = {
|
|
/* 0 */ { 0, &BX_CPU_C::SGDT64_Ms },
|
|
/* 1 */ { 0, &BX_CPU_C::SIDT64_Ms },
|
|
- /* 2 */ { 0, &BX_CPU_C::LGDT64_Ms },
|
|
- /* 3 */ { 0, &BX_CPU_C::LIDT64_Ms },
|
|
+ /* 2 */ { BxTraceEnd, &BX_CPU_C::LGDT64_Ms },
|
|
+ /* 3 */ { BxTraceEnd, &BX_CPU_C::LIDT64_Ms },
|
|
/* 4 */ { 0, &BX_CPU_C::SMSW_Ew },
|
|
/* 5 */ { 0, &BX_CPU_C::BxError },
|
|
- /* 6 */ { 0, &BX_CPU_C::LMSW_Ew },
|
|
- /* 7 */ { BxSplitMod11b, NULL, opcodesGroupModINVLPG }
|
|
+ /* 6 */ { BxTraceEnd, &BX_CPU_C::LMSW_Ew },
|
|
+ /* 7 */ { BxSplitMod11b | BxTraceEnd, NULL, opcodesGroupModINVLPG }
|
|
};
|
|
|
|
static const BxOpcodeInfo_t BxOpcodeInfo64G8EwIb[8] = {
|
|
@@ -664,22 +664,22 @@
|
|
/* 6D */ { 0, &BX_CPU_C::REP_INSW_YwDX },
|
|
/* 6E */ { 0, &BX_CPU_C::REP_OUTSB_DXXb },
|
|
/* 6F */ { 0, &BX_CPU_C::REP_OUTSW_DXXw },
|
|
- /* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 74 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 75 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
+ /* 70 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 71 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 72 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 73 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 74 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 75 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 76 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 77 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 78 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 79 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7A */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7B */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7C */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7D */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7E */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7F */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
/* 80 */ { BxAnother | BxGroup1, NULL, BxOpcodeInfo64G1EbIb },
|
|
/* 81 */ { BxAnother | BxGroup1 | BxImmediate_Iv, NULL, BxOpcodeInfo64G1Ew },
|
|
/* 82 */ { 0, &BX_CPU_C::BxError },
|
|
@@ -746,20 +746,20 @@
|
|
/* BF */ { BxImmediate_Iv, &BX_CPU_C::MOV_RXIw },
|
|
/* C0 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfo64G2Eb },
|
|
/* C1 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfo64G2Ew },
|
|
- /* C2 */ { BxImmediate_Iw, &BX_CPU_C::RETnear16_Iw },
|
|
- /* C3 */ { 0, &BX_CPU_C::RETnear16 },
|
|
+ /* C2 */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETnear16_Iw },
|
|
+ /* C3 */ { BxTraceEnd, &BX_CPU_C::RETnear16 },
|
|
/* C4 */ { 0, &BX_CPU_C::BxError },
|
|
/* C5 */ { 0, &BX_CPU_C::BxError },
|
|
/* C6 */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::MOV_EbIb },
|
|
/* C7 */ { BxAnother | BxImmediate_Iv, &BX_CPU_C::MOV_EwIw },
|
|
/* C8 */ { BxImmediate_IwIb, &BX_CPU_C::ENTER_IwIb },
|
|
/* C9 */ { 0, &BX_CPU_C::LEAVE },
|
|
- /* CA */ { BxImmediate_Iw, &BX_CPU_C::RETfar16_Iw },
|
|
- /* CB */ { 0, &BX_CPU_C::RETfar16 },
|
|
- /* CC */ { 0, &BX_CPU_C::INT3 },
|
|
- /* CD */ { BxImmediate_Ib, &BX_CPU_C::INT_Ib },
|
|
+ /* CA */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETfar16_Iw },
|
|
+ /* CB */ { BxTraceEnd, &BX_CPU_C::RETfar16 },
|
|
+ /* CC */ { BxTraceEnd, &BX_CPU_C::INT3 },
|
|
+ /* CD */ { BxImmediate_Ib | BxTraceEnd, &BX_CPU_C::INT_Ib },
|
|
/* CE */ { 0, &BX_CPU_C::BxError },
|
|
- /* CF */ { 0, &BX_CPU_C::IRET16 },
|
|
+ /* CF */ { BxTraceEnd, &BX_CPU_C::IRET16 },
|
|
/* D0 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfo64G2Eb },
|
|
/* D1 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfo64G2Ew },
|
|
/* D2 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfo64G2Eb },
|
|
@@ -777,27 +777,27 @@
|
|
/* DD */ { BxAnother | BxFPGroup, NULL, BxOpcodeInfo_FPGroupDD },
|
|
/* DE */ { BxAnother | BxFPGroup, NULL, BxOpcodeInfo_FPGroupDE },
|
|
/* DF */ { BxAnother | BxFPGroup, NULL, BxOpcodeInfo_FPGroupDF },
|
|
- /* E0 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOPNE64_Jb },
|
|
- /* E1 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOPE64_Jb },
|
|
- /* E2 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOP64_Jb },
|
|
- /* E3 */ { BxImmediate_BrOff8, &BX_CPU_C::JCXZ64_Jb },
|
|
+ /* E0 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOPNE64_Jb },
|
|
+ /* E1 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOPE64_Jb },
|
|
+ /* E2 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOP64_Jb },
|
|
+ /* E3 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCXZ64_Jb },
|
|
/* E4 */ { BxImmediate_Ib, &BX_CPU_C::IN_ALIb },
|
|
/* E5 */ { BxImmediate_Ib, &BX_CPU_C::IN_AXIb },
|
|
/* E6 */ { BxImmediate_Ib, &BX_CPU_C::OUT_IbAL },
|
|
/* E7 */ { BxImmediate_Ib, &BX_CPU_C::OUT_IbAX },
|
|
- /* E8 */ { BxImmediate_BrOff16, &BX_CPU_C::CALL_Aw },
|
|
- /* E9 */ { BxImmediate_BrOff16, &BX_CPU_C::JMP_Jq },
|
|
+ /* E8 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::CALL_Aw },
|
|
+ /* E9 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JMP_Jq },
|
|
/* EA */ { 0, &BX_CPU_C::BxError },
|
|
- /* EB */ { BxImmediate_BrOff8, &BX_CPU_C::JMP_Jq },
|
|
+ /* EB */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JMP_Jq },
|
|
/* EC */ { 0, &BX_CPU_C::IN_ALDX },
|
|
/* ED */ { 0, &BX_CPU_C::IN_AXDX },
|
|
/* EE */ { 0, &BX_CPU_C::OUT_DXAL },
|
|
/* EF */ { 0, &BX_CPU_C::OUT_DXAX },
|
|
/* F0 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // LOCK
|
|
- /* F1 */ { 0, &BX_CPU_C::INT1 },
|
|
+ /* F1 */ { BxTraceEnd, &BX_CPU_C::INT1 },
|
|
/* F2 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // REPNE/REPNZ
|
|
/* F3 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // REP, REPE/REPZ
|
|
- /* F4 */ { 0, &BX_CPU_C::HLT },
|
|
+ /* F4 */ { BxTraceEnd, &BX_CPU_C::HLT },
|
|
/* F5 */ { 0, &BX_CPU_C::CMC },
|
|
/* F6 */ { BxAnother | BxGroup3, NULL, BxOpcodeInfo64G3Eb },
|
|
/* F7 */ { BxAnother | BxGroup3, NULL, BxOpcodeInfo64G3Ew },
|
|
@@ -815,13 +815,13 @@
|
|
/* 0F 02 */ { BxAnother, &BX_CPU_C::LAR_GvEw },
|
|
/* 0F 03 */ { BxAnother, &BX_CPU_C::LSL_GvEw },
|
|
/* 0F 04 */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F 05 */ { 0, &BX_CPU_C::SYSCALL },
|
|
+ /* 0F 05 */ { BxTraceEnd, &BX_CPU_C::SYSCALL },
|
|
/* 0F 06 */ { 0, &BX_CPU_C::CLTS },
|
|
- /* 0F 07 */ { 0, &BX_CPU_C::SYSRET },
|
|
- /* 0F 08 */ { 0, &BX_CPU_C::INVD },
|
|
- /* 0F 09 */ { 0, &BX_CPU_C::WBINVD },
|
|
+ /* 0F 07 */ { BxTraceEnd, &BX_CPU_C::SYSRET },
|
|
+ /* 0F 08 */ { BxTraceEnd, &BX_CPU_C::INVD },
|
|
+ /* 0F 09 */ { BxTraceEnd, &BX_CPU_C::WBINVD },
|
|
/* 0F 0A */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F 0B */ { 0, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
+ /* 0F 0B */ { BxTraceEnd, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
/* 0F 0C */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F 0D */ { BxAnother, &BX_CPU_C::NOP }, // 3DNow! PREFETCH on AMD, NOP on Intel
|
|
#if BX_SUPPORT_3DNOW
|
|
@@ -849,7 +849,7 @@
|
|
/* 0F 1F */ { BxAnother, &BX_CPU_C::NOP }, // multi-byte NOP
|
|
/* 0F 20 */ { BxAnother, &BX_CPU_C::MOV_RqCq },
|
|
/* 0F 21 */ { BxAnother, &BX_CPU_C::MOV_RqDq },
|
|
- /* 0F 22 */ { BxAnother, &BX_CPU_C::MOV_CqRq },
|
|
+ /* 0F 22 */ { BxAnother | BxTraceEnd, &BX_CPU_C::MOV_CqRq },
|
|
/* 0F 23 */ { BxAnother, &BX_CPU_C::MOV_DqRq },
|
|
/* 0F 24 */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F 25 */ { 0, &BX_CPU_C::BxError },
|
|
@@ -863,7 +863,7 @@
|
|
/* 0F 2D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2d },
|
|
/* 0F 2E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2e },
|
|
/* 0F 2F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2f },
|
|
- /* 0F 30 */ { 0, &BX_CPU_C::WRMSR },
|
|
+ /* 0F 30 */ { BxTraceEnd, &BX_CPU_C::WRMSR },
|
|
/* 0F 31 */ { 0, &BX_CPU_C::RDTSC },
|
|
/* 0F 32 */ { 0, &BX_CPU_C::RDMSR },
|
|
/* 0F 33 */ { 0, &BX_CPU_C::RDPMC },
|
|
@@ -951,22 +951,22 @@
|
|
/* 0F 7D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7d },
|
|
/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
|
|
/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
|
|
- /* 0F 80 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 81 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 82 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 83 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 84 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 85 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 86 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 87 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 88 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 89 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8A */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8B */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8C */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8D */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8E */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8F */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 80 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 81 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 82 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 83 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 84 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 85 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 86 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 87 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 88 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 89 */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8A */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8B */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8C */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8D */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8E */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8F */ { BxImmediate_BrOff16 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
/* 0F 90 */ { BxAnother, &BX_CPU_C::SETO_Eb },
|
|
/* 0F 91 */ { BxAnother, &BX_CPU_C::SETNO_Eb },
|
|
/* 0F 92 */ { BxAnother, &BX_CPU_C::SETB_Eb },
|
|
@@ -993,7 +993,7 @@
|
|
/* 0F A7 */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F A8 */ { 0, &BX_CPU_C::PUSH16_GS },
|
|
/* 0F A9 */ { 0, &BX_CPU_C::POP16_GS },
|
|
- /* 0F AA */ { 0, &BX_CPU_C::RSM },
|
|
+ /* 0F AA */ { BxTraceEnd, &BX_CPU_C::RSM },
|
|
/* 0F AB */ { BxAnother | BxLockable, &BX_CPU_C::BTS_EwGw },
|
|
/* 0F AC */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::SHRD_EwGw },
|
|
/* 0F AD */ { BxAnother, &BX_CPU_C::SHRD_EwGw },
|
|
@@ -1008,7 +1008,7 @@
|
|
/* 0F B6 */ { BxAnother, &BX_CPU_C::MOVZX_GwEb },
|
|
/* 0F B7 */ { BxAnother | BxSplitMod11b, NULL, opcodesMOV_GwEw }, // MOVZX_GwEw
|
|
/* 0F B8 */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F B9 */ { 0, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
+ /* 0F B9 */ { BxTraceEnd, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
/* 0F BA */ { BxAnother | BxGroup8, NULL, BxOpcodeInfo64G8EwIb },
|
|
/* 0F BB */ { BxAnother | BxLockable, &BX_CPU_C::BTC_EwGw },
|
|
/* 0F BC */ { BxAnother, &BX_CPU_C::BSF_GwEw },
|
|
@@ -1193,22 +1193,22 @@
|
|
/* 6D */ { 0, &BX_CPU_C::REP_INSD_YdDX },
|
|
/* 6E */ { 0, &BX_CPU_C::REP_OUTSB_DXXb },
|
|
/* 6F */ { 0, &BX_CPU_C::REP_OUTSD_DXXd },
|
|
- /* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 74 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 75 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
+ /* 70 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 71 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 72 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 73 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 74 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 75 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 76 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 77 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 78 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 79 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7A */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7B */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7C */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7D */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7E */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7F */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
/* 80 */ { BxAnother | BxGroup1, NULL, BxOpcodeInfo64G1EbIb },
|
|
/* 81 */ { BxAnother | BxGroup1 | BxImmediate_Iv, NULL, BxOpcodeInfo64G1Ed },
|
|
/* 82 */ { 0, &BX_CPU_C::BxError },
|
|
@@ -1275,20 +1275,20 @@
|
|
/* BF */ { BxImmediate_Iv, &BX_CPU_C::MOV_ERXId },
|
|
/* C0 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfo64G2Eb },
|
|
/* C1 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfo64G2Ed },
|
|
- /* C2 */ { BxImmediate_Iw, &BX_CPU_C::RETnear64_Iw },
|
|
- /* C3 */ { 0, &BX_CPU_C::RETnear64 },
|
|
+ /* C2 */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETnear64_Iw },
|
|
+ /* C3 */ { BxTraceEnd, &BX_CPU_C::RETnear64 },
|
|
/* C4 */ { 0, &BX_CPU_C::BxError },
|
|
/* C5 */ { 0, &BX_CPU_C::BxError },
|
|
/* C6 */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::MOV_EbIb },
|
|
/* C7 */ { BxAnother | BxImmediate_Iv, &BX_CPU_C::MOV_EdId },
|
|
/* C8 */ { BxImmediate_IwIb, &BX_CPU_C::ENTER64_IwIb },
|
|
/* C9 */ { 0, &BX_CPU_C::LEAVE64 },
|
|
- /* CA */ { BxImmediate_Iw, &BX_CPU_C::RETfar32_Iw },
|
|
- /* CB */ { 0, &BX_CPU_C::RETfar32 },
|
|
- /* CC */ { 0, &BX_CPU_C::INT3 },
|
|
- /* CD */ { BxImmediate_Ib, &BX_CPU_C::INT_Ib },
|
|
+ /* CA */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETfar32_Iw },
|
|
+ /* CB */ { BxTraceEnd, &BX_CPU_C::RETfar32 },
|
|
+ /* CC */ { BxTraceEnd, &BX_CPU_C::INT3 },
|
|
+ /* CD */ { BxImmediate_Ib | BxTraceEnd, &BX_CPU_C::INT_Ib },
|
|
/* CE */ { 0, &BX_CPU_C::BxError },
|
|
- /* CF */ { 0, &BX_CPU_C::IRET32 },
|
|
+ /* CF */ { BxTraceEnd, &BX_CPU_C::IRET32 },
|
|
/* D0 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfo64G2Eb },
|
|
/* D1 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfo64G2Ed },
|
|
/* D2 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfo64G2Eb },
|
|
@@ -1306,27 +1306,27 @@
|
|
/* DD */ { BxAnother | BxFPGroup, NULL, BxOpcodeInfo_FPGroupDD },
|
|
/* DE */ { BxAnother | BxFPGroup, NULL, BxOpcodeInfo_FPGroupDE },
|
|
/* DF */ { BxAnother | BxFPGroup, NULL, BxOpcodeInfo_FPGroupDF },
|
|
- /* E0 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOPNE64_Jb },
|
|
- /* E1 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOPE64_Jb },
|
|
- /* E2 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOP64_Jb },
|
|
- /* E3 */ { BxImmediate_BrOff8, &BX_CPU_C::JCXZ64_Jb },
|
|
+ /* E0 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOPNE64_Jb },
|
|
+ /* E1 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOPE64_Jb },
|
|
+ /* E2 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOP64_Jb },
|
|
+ /* E3 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCXZ64_Jb },
|
|
/* E4 */ { BxImmediate_Ib, &BX_CPU_C::IN_ALIb },
|
|
/* E5 */ { BxImmediate_Ib, &BX_CPU_C::IN_EAXIb },
|
|
/* E6 */ { BxImmediate_Ib, &BX_CPU_C::OUT_IbAL },
|
|
/* E7 */ { BxImmediate_Ib, &BX_CPU_C::OUT_IbEAX },
|
|
- /* E8 */ { BxImmediate_BrOff32, &BX_CPU_C::CALL_Aq },
|
|
- /* E9 */ { BxImmediate_BrOff32, &BX_CPU_C::JMP_Jq },
|
|
+ /* E8 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::CALL_Aq },
|
|
+ /* E9 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JMP_Jq },
|
|
/* EA */ { 0, &BX_CPU_C::BxError },
|
|
- /* EB */ { BxImmediate_BrOff8, &BX_CPU_C::JMP_Jq },
|
|
+ /* EB */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JMP_Jq },
|
|
/* EC */ { 0, &BX_CPU_C::IN_ALDX },
|
|
/* ED */ { 0, &BX_CPU_C::IN_EAXDX },
|
|
/* EE */ { 0, &BX_CPU_C::OUT_DXAL },
|
|
/* EF */ { 0, &BX_CPU_C::OUT_DXEAX },
|
|
/* F0 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // LOCK:
|
|
- /* F1 */ { 0, &BX_CPU_C::INT1 },
|
|
+ /* F1 */ { BxTraceEnd, &BX_CPU_C::INT1 },
|
|
/* F2 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // REPNE/REPNZ
|
|
/* F3 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // REP,REPE/REPZ
|
|
- /* F4 */ { 0, &BX_CPU_C::HLT },
|
|
+ /* F4 */ { BxTraceEnd, &BX_CPU_C::HLT },
|
|
/* F5 */ { 0, &BX_CPU_C::CMC },
|
|
/* F6 */ { BxAnother | BxGroup3, NULL, BxOpcodeInfo64G3Eb },
|
|
/* F7 */ { BxAnother | BxGroup3, NULL, BxOpcodeInfo64G3Ed },
|
|
@@ -1344,13 +1344,13 @@
|
|
/* 0F 02 */ { BxAnother, &BX_CPU_C::LAR_GvEw },
|
|
/* 0F 03 */ { BxAnother, &BX_CPU_C::LSL_GvEw },
|
|
/* 0F 04 */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F 05 */ { 0, &BX_CPU_C::SYSCALL },
|
|
+ /* 0F 05 */ { BxTraceEnd, &BX_CPU_C::SYSCALL },
|
|
/* 0F 06 */ { 0, &BX_CPU_C::CLTS },
|
|
- /* 0F 07 */ { 0, &BX_CPU_C::SYSRET },
|
|
- /* 0F 08 */ { 0, &BX_CPU_C::INVD },
|
|
- /* 0F 09 */ { 0, &BX_CPU_C::WBINVD },
|
|
+ /* 0F 07 */ { BxTraceEnd, &BX_CPU_C::SYSRET },
|
|
+ /* 0F 08 */ { BxTraceEnd, &BX_CPU_C::INVD },
|
|
+ /* 0F 09 */ { BxTraceEnd, &BX_CPU_C::WBINVD },
|
|
/* 0F 0A */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F 0B */ { 0, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
+ /* 0F 0B */ { BxTraceEnd, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
/* 0F 0C */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F 0D */ { BxAnother, &BX_CPU_C::NOP }, // 3DNow! PREFETCH on AMD, NOP on Intel
|
|
#if BX_SUPPORT_3DNOW
|
|
@@ -1378,7 +1378,7 @@
|
|
/* 0F 1F */ { BxAnother, &BX_CPU_C::NOP }, // multi-byte NOP
|
|
/* 0F 20 */ { BxAnother, &BX_CPU_C::MOV_RqCq },
|
|
/* 0F 21 */ { BxAnother, &BX_CPU_C::MOV_RqDq },
|
|
- /* 0F 22 */ { BxAnother, &BX_CPU_C::MOV_CqRq },
|
|
+ /* 0F 22 */ { BxAnother | BxTraceEnd, &BX_CPU_C::MOV_CqRq },
|
|
/* 0F 23 */ { BxAnother, &BX_CPU_C::MOV_DqRq },
|
|
/* 0F 24 */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F 25 */ { 0, &BX_CPU_C::BxError },
|
|
@@ -1392,7 +1392,7 @@
|
|
/* 0F 2D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2d },
|
|
/* 0F 2E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2e },
|
|
/* 0F 2F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2f },
|
|
- /* 0F 30 */ { 0, &BX_CPU_C::WRMSR },
|
|
+ /* 0F 30 */ { BxTraceEnd, &BX_CPU_C::WRMSR },
|
|
/* 0F 31 */ { 0, &BX_CPU_C::RDTSC },
|
|
/* 0F 32 */ { 0, &BX_CPU_C::RDMSR },
|
|
/* 0F 33 */ { 0, &BX_CPU_C::RDPMC },
|
|
@@ -1480,22 +1480,22 @@
|
|
/* 0F 7D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7d },
|
|
/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
|
|
/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
|
|
- /* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 83 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 84 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 85 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 86 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 87 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 88 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 89 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8A */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8B */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8C */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8D */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8E */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8F */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 80 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 81 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 82 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 83 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 84 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 85 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 86 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 87 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 88 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 89 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8A */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8B */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8C */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8D */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8E */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8F */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
/* 0F 90 */ { BxAnother, &BX_CPU_C::SETO_Eb },
|
|
/* 0F 91 */ { BxAnother, &BX_CPU_C::SETNO_Eb },
|
|
/* 0F 92 */ { BxAnother, &BX_CPU_C::SETB_Eb },
|
|
@@ -1522,7 +1522,7 @@
|
|
/* 0F A7 */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F A8 */ { 0, &BX_CPU_C::PUSH64_GS },
|
|
/* 0F A9 */ { 0, &BX_CPU_C::POP64_GS },
|
|
- /* 0F AA */ { 0, &BX_CPU_C::RSM },
|
|
+ /* 0F AA */ { BxTraceEnd, &BX_CPU_C::RSM },
|
|
/* 0F AB */ { BxAnother | BxLockable, &BX_CPU_C::BTS_EdGd },
|
|
/* 0F AC */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::SHRD_EdGd },
|
|
/* 0F AD */ { BxAnother, &BX_CPU_C::SHRD_EdGd },
|
|
@@ -1537,7 +1537,7 @@
|
|
/* 0F B6 */ { BxAnother, &BX_CPU_C::MOVZX_GdEb },
|
|
/* 0F B7 */ { BxAnother, &BX_CPU_C::MOVZX_GdEw },
|
|
/* 0F B8 */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F B9 */ { 0, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
+ /* 0F B9 */ { BxTraceEnd, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
/* 0F BA */ { BxAnother | BxGroup8, NULL, BxOpcodeInfo64G8EdIb },
|
|
/* 0F BB */ { BxAnother | BxLockable, &BX_CPU_C::BTC_EdGd },
|
|
/* 0F BC */ { BxAnother, &BX_CPU_C::BSF_GdEd },
|
|
@@ -1722,22 +1722,22 @@
|
|
/* 6D */ { 0, &BX_CPU_C::REP_INSD_YdDX },
|
|
/* 6E */ { 0, &BX_CPU_C::REP_OUTSB_DXXb },
|
|
/* 6F */ { 0, &BX_CPU_C::REP_OUTSD_DXXd },
|
|
- /* 70 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 71 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 72 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 73 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 74 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 75 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 76 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 77 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 78 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 79 */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7A */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7B */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7C */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7D */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7E */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
- /* 7F */ { BxImmediate_BrOff8, &BX_CPU_C::JCC_Jq },
|
|
+ /* 70 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 71 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 72 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 73 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 74 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 75 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 76 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 77 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 78 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 79 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7A */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7B */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7C */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7D */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7E */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 7F */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
/* 80 */ { BxAnother | BxGroup1, NULL, BxOpcodeInfo64G1EbIb },
|
|
/* 81 */ { BxAnother | BxGroup1 | BxImmediate_Iv, NULL, BxOpcodeInfo64G1Eq },
|
|
/* 82 */ { 0, &BX_CPU_C::BxError },
|
|
@@ -1804,20 +1804,20 @@
|
|
/* BF */ { BxImmediate_Iq, &BX_CPU_C::MOV_RRXIq },
|
|
/* C0 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfo64G2Eb },
|
|
/* C1 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfo64G2Eq },
|
|
- /* C2 */ { BxImmediate_Iw, &BX_CPU_C::RETnear64_Iw },
|
|
- /* C3 */ { 0, &BX_CPU_C::RETnear64 },
|
|
+ /* C2 */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETnear64_Iw },
|
|
+ /* C3 */ { BxTraceEnd, &BX_CPU_C::RETnear64 },
|
|
/* C4 */ { 0, &BX_CPU_C::BxError },
|
|
/* C5 */ { 0, &BX_CPU_C::BxError },
|
|
/* C6 */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::MOV_EbIb },
|
|
/* C7 */ { BxAnother | BxImmediate_Iv, &BX_CPU_C::MOV_EqId },
|
|
/* C8 */ { BxImmediate_IwIb, &BX_CPU_C::ENTER64_IwIb },
|
|
/* C9 */ { 0, &BX_CPU_C::LEAVE64 },
|
|
- /* CA */ { BxImmediate_Iw, &BX_CPU_C::RETfar64_Iw },
|
|
- /* CB */ { 0, &BX_CPU_C::RETfar64 },
|
|
- /* CC */ { 0, &BX_CPU_C::INT3 },
|
|
- /* CD */ { BxImmediate_Ib, &BX_CPU_C::INT_Ib },
|
|
+ /* CA */ { BxImmediate_Iw | BxTraceEnd, &BX_CPU_C::RETfar64_Iw },
|
|
+ /* CB */ { BxTraceEnd, &BX_CPU_C::RETfar64 },
|
|
+ /* CC */ { BxTraceEnd, &BX_CPU_C::INT3 },
|
|
+ /* CD */ { BxImmediate_Ib | BxTraceEnd, &BX_CPU_C::INT_Ib },
|
|
/* CE */ { 0, &BX_CPU_C::BxError },
|
|
- /* CF */ { 0, &BX_CPU_C::IRET64 },
|
|
+ /* CF */ { BxTraceEnd, &BX_CPU_C::IRET64 },
|
|
/* D0 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfo64G2Eb },
|
|
/* D1 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfo64G2Eq },
|
|
/* D2 */ { BxAnother | BxGroup2, NULL, BxOpcodeInfo64G2Eb },
|
|
@@ -1835,27 +1835,27 @@
|
|
/* DD */ { BxAnother | BxFPGroup, NULL, BxOpcodeInfo_FPGroupDD },
|
|
/* DE */ { BxAnother | BxFPGroup, NULL, BxOpcodeInfo_FPGroupDE },
|
|
/* DF */ { BxAnother | BxFPGroup, NULL, BxOpcodeInfo_FPGroupDF },
|
|
- /* E0 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOPNE64_Jb },
|
|
- /* E1 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOPE64_Jb },
|
|
- /* E2 */ { BxImmediate_BrOff8, &BX_CPU_C::LOOP64_Jb },
|
|
- /* E3 */ { BxImmediate_BrOff8, &BX_CPU_C::JCXZ64_Jb },
|
|
+ /* E0 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOPNE64_Jb },
|
|
+ /* E1 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOPE64_Jb },
|
|
+ /* E2 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::LOOP64_Jb },
|
|
+ /* E3 */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JCXZ64_Jb },
|
|
/* E4 */ { BxImmediate_Ib, &BX_CPU_C::IN_ALIb },
|
|
/* E5 */ { BxImmediate_Ib, &BX_CPU_C::IN_EAXIb },
|
|
/* E6 */ { BxImmediate_Ib, &BX_CPU_C::OUT_IbAL },
|
|
/* E7 */ { BxImmediate_Ib, &BX_CPU_C::OUT_IbEAX },
|
|
- /* E8 */ { BxImmediate_BrOff32, &BX_CPU_C::CALL_Aq },
|
|
- /* E9 */ { BxImmediate_BrOff32, &BX_CPU_C::JMP_Jq },
|
|
+ /* E8 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::CALL_Aq },
|
|
+ /* E9 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JMP_Jq },
|
|
/* EA */ { 0, &BX_CPU_C::BxError },
|
|
- /* EB */ { BxImmediate_BrOff8, &BX_CPU_C::JMP_Jq },
|
|
+ /* EB */ { BxImmediate_BrOff8 | BxTraceEnd, &BX_CPU_C::JMP_Jq },
|
|
/* EC */ { 0, &BX_CPU_C::IN_ALDX },
|
|
/* ED */ { 0, &BX_CPU_C::IN_EAXDX },
|
|
/* EE */ { 0, &BX_CPU_C::OUT_DXAL },
|
|
/* EF */ { 0, &BX_CPU_C::OUT_DXEAX },
|
|
/* F0 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // LOCK:
|
|
- /* F1 */ { 0, &BX_CPU_C::INT1 },
|
|
+ /* F1 */ { BxTraceEnd, &BX_CPU_C::INT1 },
|
|
/* F2 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // REPNE/REPNZ
|
|
/* F3 */ { BxPrefix | BxAnother, &BX_CPU_C::BxError }, // REP,REPE/REPZ
|
|
- /* F4 */ { 0, &BX_CPU_C::HLT },
|
|
+ /* F4 */ { BxTraceEnd, &BX_CPU_C::HLT },
|
|
/* F5 */ { 0, &BX_CPU_C::CMC },
|
|
/* F6 */ { BxAnother | BxGroup3, NULL, BxOpcodeInfo64G3Eb },
|
|
/* F7 */ { BxAnother | BxGroup3, NULL, BxOpcodeInfo64G3Eq },
|
|
@@ -1873,13 +1873,13 @@
|
|
/* 0F 02 */ { BxAnother, &BX_CPU_C::LAR_GvEw },
|
|
/* 0F 03 */ { BxAnother, &BX_CPU_C::LSL_GvEw },
|
|
/* 0F 04 */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F 05 */ { 0, &BX_CPU_C::SYSCALL },
|
|
+ /* 0F 05 */ { BxTraceEnd, &BX_CPU_C::SYSCALL },
|
|
/* 0F 06 */ { 0, &BX_CPU_C::CLTS },
|
|
- /* 0F 07 */ { 0, &BX_CPU_C::SYSRET },
|
|
- /* 0F 08 */ { 0, &BX_CPU_C::INVD },
|
|
- /* 0F 09 */ { 0, &BX_CPU_C::WBINVD },
|
|
+ /* 0F 07 */ { BxTraceEnd, &BX_CPU_C::SYSRET },
|
|
+ /* 0F 08 */ { BxTraceEnd, &BX_CPU_C::INVD },
|
|
+ /* 0F 09 */ { BxTraceEnd, &BX_CPU_C::WBINVD },
|
|
/* 0F 0A */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F 0B */ { 0, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
+ /* 0F 0B */ { BxTraceEnd, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
/* 0F 0C */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F 0D */ { BxAnother, &BX_CPU_C::NOP }, // 3DNow! PREFETCH on AMD, NOP on Intel
|
|
#if BX_SUPPORT_3DNOW
|
|
@@ -1907,7 +1907,7 @@
|
|
/* 0F 1F */ { BxAnother, &BX_CPU_C::NOP }, // multi-byte NOP
|
|
/* 0F 20 */ { BxAnother, &BX_CPU_C::MOV_RqCq },
|
|
/* 0F 21 */ { BxAnother, &BX_CPU_C::MOV_RqDq },
|
|
- /* 0F 22 */ { BxAnother, &BX_CPU_C::MOV_CqRq },
|
|
+ /* 0F 22 */ { BxAnother | BxTraceEnd, &BX_CPU_C::MOV_CqRq },
|
|
/* 0F 23 */ { BxAnother, &BX_CPU_C::MOV_DqRq },
|
|
/* 0F 24 */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F 25 */ { 0, &BX_CPU_C::BxError },
|
|
@@ -1921,7 +1921,7 @@
|
|
/* 0F 2D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2d },
|
|
/* 0F 2E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2e },
|
|
/* 0F 2F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f2f },
|
|
- /* 0F 30 */ { 0, &BX_CPU_C::WRMSR },
|
|
+ /* 0F 30 */ { BxTraceEnd, &BX_CPU_C::WRMSR },
|
|
/* 0F 31 */ { 0, &BX_CPU_C::RDTSC },
|
|
/* 0F 32 */ { 0, &BX_CPU_C::RDMSR },
|
|
/* 0F 33 */ { 0, &BX_CPU_C::RDPMC },
|
|
@@ -2009,22 +2009,22 @@
|
|
/* 0F 7D */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7d },
|
|
/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
|
|
/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
|
|
- /* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 83 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 84 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 85 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 86 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 87 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 88 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 89 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8A */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8B */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8C */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8D */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8E */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
- /* 0F 8F */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 80 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 81 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 82 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 83 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 84 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 85 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 86 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 87 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 88 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 89 */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8A */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8B */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8C */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8D */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8E */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
+ /* 0F 8F */ { BxImmediate_BrOff32 | BxTraceEnd, &BX_CPU_C::JCC_Jq },
|
|
/* 0F 90 */ { BxAnother, &BX_CPU_C::SETO_Eb },
|
|
/* 0F 91 */ { BxAnother, &BX_CPU_C::SETNO_Eb },
|
|
/* 0F 92 */ { BxAnother, &BX_CPU_C::SETB_Eb },
|
|
@@ -2051,7 +2051,7 @@
|
|
/* 0F A7 */ { 0, &BX_CPU_C::BxError },
|
|
/* 0F A8 */ { 0, &BX_CPU_C::PUSH64_GS },
|
|
/* 0F A9 */ { 0, &BX_CPU_C::POP64_GS },
|
|
- /* 0F AA */ { 0, &BX_CPU_C::RSM },
|
|
+ /* 0F AA */ { BxTraceEnd, &BX_CPU_C::RSM },
|
|
/* 0F AB */ { BxAnother | BxLockable, &BX_CPU_C::BTS_EqGq },
|
|
/* 0F AC */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::SHRD_EqGq },
|
|
/* 0F AD */ { BxAnother, &BX_CPU_C::SHRD_EqGq },
|
|
@@ -2066,7 +2066,7 @@
|
|
/* 0F B6 */ { BxAnother, &BX_CPU_C::MOVZX_GqEb },
|
|
/* 0F B7 */ { BxAnother, &BX_CPU_C::MOVZX_GqEw },
|
|
/* 0F B8 */ { 0, &BX_CPU_C::BxError },
|
|
- /* 0F B9 */ { 0, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
+ /* 0F B9 */ { BxTraceEnd, &BX_CPU_C::UndefinedOpcode }, // UD2 opcode
|
|
/* 0F BA */ { BxAnother | BxGroup8, NULL, BxOpcodeInfo64G8EqIb },
|
|
/* 0F BB */ { BxAnother | BxLockable, &BX_CPU_C::BTC_EqGq },
|
|
/* 0F BC */ { BxAnother, &BX_CPU_C::BSF_GqEq },
|
|
@@ -2283,6 +2283,10 @@
|
|
|
|
attr = BxOpcodeInfo64[b1+offset].Attr;
|
|
|
|
+#if BX_SUPPORT_ICACHE
|
|
+ if (attr & BxTraceEnd) instruction->setStopTraceAttr();
|
|
+#endif
|
|
+
|
|
#if BX_SUPPORT_SSE3E || BX_SUPPORT_SSE >= 4
|
|
// handle 3-byte escape
|
|
if (attr & Bx3ByteOpcode) {
|
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@@ -2558,6 +2562,9 @@
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}
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instruction->execute = OpcodeInfoPtr->ExecutePtr;
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+#if BX_SUPPORT_ICACHE
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+ if (attr & BxTraceEnd) instruction->setStopTraceAttr();
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+#endif
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}
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else {
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// Opcode does not require a MODRM byte.
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@@ -2572,7 +2579,8 @@
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// lock prefix not allowed or destination operand is not memory
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if ((mod == 0xc0) || !(attr & BxLockable)) {
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BX_INFO(("LOCK prefix unallowed (op1=0x%x, mod=%u, nnn=%u)", b1, mod, nnn));
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- UndefinedOpcode(instruction);
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+ // replace execution function with undefined-opcode
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+ instruction->execute = &BX_CPU_C::BxError;
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}
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}
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@@ -2696,6 +2704,13 @@
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if (BX_NULL_SEG_REG(instruction->seg()))
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instruction->setSeg(BX_SEG_REG_DS);
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+#if BX_SUPPORT_ICACHE
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+ // set stop-trace attribute for invalid instructions
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+ if(instruction->execute == &BX_CPU_C::BxError) {
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+ instruction->setStopTraceAttr();
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+ }
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+#endif
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+
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instruction->setB1(b1);
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instruction->setILen(ilen);
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return(1);
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diff -u -r bochs-trace-cache-root/cpu/icache.h bochs-trace-cache/cpu/icache.h
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--- bochs-trace-cache-root/cpu/icache.h 2006-09-20 22:52:23.000000000 +0200
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+++ bochs-trace-cache/cpu/icache.h 2007-03-07 22:10:28.234375000 +0200
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@@ -115,12 +115,15 @@
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#define BxICacheEntries (32 * 1024) // Must be a power of 2.
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+#define BX_MAX_TRACE_LENGTH 16
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+
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struct bxICacheEntry_c
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{
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bx_phy_address pAddr; // Physical address of the instruction
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Bit32u writeStamp; // Generation ID. Each write to a physical page
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// decrements this value
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- bxInstruction_c i; // The instruction decode information
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+ Bit32u ilen; // Trace length in instructions
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+ bxInstruction_c i[BX_MAX_TRACE_LENGTH];
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};
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class BOCHSAPI bxICache_c {
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