876 lines
29 KiB
C++
876 lines
29 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002-2012 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
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// Define BX_PLUGGABLE in files that can be compiled into plugins. For
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// platforms that require a special tag on exported symbols, BX_PLUGGABLE
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// is used to know when we are exporting symbols and when we are importing.
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#define BX_PLUGGABLE
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#include "iodev.h"
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#include "cmos.h"
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#include "virt_timer.h"
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#define LOG_THIS theCmosDevice->
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bx_cmos_c *theCmosDevice = NULL;
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// CMOS register definitions from Ralf Brown's interrupt list v6.1, in a file
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// called cmos.lst. In cases where there are multiple uses for a given
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// register in the interrupt list, I only listed the purpose that Bochs
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// actually uses it for, but I wrote "alternatives" next to it.
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#define REG_SEC 0x00
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#define REG_SEC_ALARM 0x01
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#define REG_MIN 0x02
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#define REG_MIN_ALARM 0x03
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#define REG_HOUR 0x04
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#define REG_HOUR_ALARM 0x05
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#define REG_WEEK_DAY 0x06
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#define REG_MONTH_DAY 0x07
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#define REG_MONTH 0x08
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#define REG_YEAR 0x09
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#define REG_STAT_A 0x0a
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#define REG_STAT_B 0x0b
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#define REG_STAT_C 0x0c
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#define REG_STAT_D 0x0d
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#define REG_DIAGNOSTIC_STATUS 0x0e /* alternatives */
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#define REG_SHUTDOWN_STATUS 0x0f
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#define REG_EQUIPMENT_BYTE 0x14
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#define REG_CSUM_HIGH 0x2e
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#define REG_CSUM_LOW 0x2f
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#define REG_IBM_CENTURY_BYTE 0x32 /* alternatives */
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#define REG_IBM_PS2_CENTURY_BYTE 0x37 /* alternatives */
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// Bochs CMOS map
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//
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// Idx Len Description
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// 0x10 1 floppy drive types
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// 0x11 1 configuration bits
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// 0x12 1 harddisk types
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// 0x13 1 advanced configuration bits
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// 0x15 2 base memory in 1k
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// 0x17 2 memory size above 1M in 1k
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// 0x19 2 extended harddisk types
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// 0x1b 9 harddisk configuration (hd0)
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// 0x24 9 harddisk configuration (hd1)
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// 0x2d 1 boot sequence (fd/hd)
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// 0x30 2 memory size above 1M in 1k
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// 0x34 2 memory size above 16M in 64k
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// 0x38 1 eltorito boot sequence (#3) + bootsig check
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// 0x39 2 ata translation policy (ata0...ata3)
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// 0x3d 1 eltorito boot sequence (#1 + #2)
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//
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// Qemu CMOS map
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//
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// Idx Len Description
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// 0x5b 3 extra memory above 4GB
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// 0x5f 1 number of processors
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Bit8u bcd_to_bin(Bit8u value, bx_bool is_binary)
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{
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if (is_binary)
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return value;
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else
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return ((value >> 4) * 10) + (value & 0x0f);
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}
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Bit8u bin_to_bcd(Bit8u value, bx_bool is_binary)
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{
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if (is_binary)
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return value;
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else
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return ((value / 10) << 4) | (value % 10);
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}
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int libcmos_LTX_plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *argv[])
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{
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if (type == PLUGTYPE_CORE) {
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theCmosDevice = new bx_cmos_c();
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bx_devices.pluginCmosDevice = theCmosDevice;
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BX_REGISTER_DEVICE_DEVMODEL(plugin, type, theCmosDevice, BX_PLUGIN_CMOS);
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return 0; // Success
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} else {
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return -1;
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}
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}
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void libcmos_LTX_plugin_fini(void)
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{
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if (theCmosDevice != NULL) {
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delete theCmosDevice;
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theCmosDevice = NULL;
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}
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}
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bx_cmos_c::bx_cmos_c(void)
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{
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put("CMOS");
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memset(&s, 0, sizeof(s));
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s.periodic_timer_index = BX_NULL_TIMER_HANDLE;
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s.one_second_timer_index = BX_NULL_TIMER_HANDLE;
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s.uip_timer_index = BX_NULL_TIMER_HANDLE;
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}
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bx_cmos_c::~bx_cmos_c(void)
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{
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save_image();
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char *tmptime;
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if ((tmptime = strdup(ctime(&(BX_CMOS_THIS s.timeval)))) != NULL) {
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tmptime[strlen(tmptime)-1]='\0';
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BX_INFO(("Last time is %u (%s)", (unsigned) get_timeval(), tmptime));
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free(tmptime);
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}
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BX_DEBUG(("Exit"));
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}
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void bx_cmos_c::init(void)
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{
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BX_DEBUG(("Init $Id$"));
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// CMOS RAM & RTC
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DEV_register_ioread_handler(this, read_handler, 0x0070, "CMOS RAM", 1);
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DEV_register_ioread_handler(this, read_handler, 0x0071, "CMOS RAM", 1);
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DEV_register_iowrite_handler(this, write_handler, 0x0070, "CMOS RAM", 1);
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DEV_register_iowrite_handler(this, write_handler, 0x0071, "CMOS RAM", 1);
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DEV_register_irq(8, "CMOS RTC");
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int clock_sync = SIM->get_param_enum(BXPN_CLOCK_SYNC)->get();
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BX_CMOS_THIS s.rtc_sync = ((clock_sync == BX_CLOCK_SYNC_REALTIME) ||
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(clock_sync == BX_CLOCK_SYNC_BOTH)) &&
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SIM->get_param_bool(BXPN_CLOCK_RTC_SYNC)->get();
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if (BX_CMOS_THIS s.periodic_timer_index == BX_NULL_TIMER_HANDLE) {
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BX_CMOS_THIS s.periodic_timer_index =
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DEV_register_timer(this, periodic_timer_handler,
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1000000, 1,0, "cmos"); // continuous, not-active
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}
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if (BX_CMOS_THIS s.one_second_timer_index == BX_NULL_TIMER_HANDLE) {
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if (BX_CMOS_THIS s.rtc_sync) {
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BX_CMOS_THIS s.one_second_timer_index =
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bx_virt_timer.register_timer(this, one_second_timer_handler,
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1000000, 1, 0, "cmos"); // continuous, not-active
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} else {
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BX_CMOS_THIS s.one_second_timer_index =
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DEV_register_timer(this, one_second_timer_handler,
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1000000, 1,0, "cmos"); // continuous, not-active
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}
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}
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if (BX_CMOS_THIS s.uip_timer_index == BX_NULL_TIMER_HANDLE) {
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BX_CMOS_THIS s.uip_timer_index =
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DEV_register_timer(this, uip_timer_handler,
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244, 0, 0, "cmos"); // one-shot, not-active
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}
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if (SIM->get_param_num(BXPN_CLOCK_TIME0)->get() == BX_CLOCK_TIME0_LOCAL) {
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BX_INFO(("Using local time for initial clock"));
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BX_CMOS_THIS s.timeval = time(NULL);
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} else if (SIM->get_param_num(BXPN_CLOCK_TIME0)->get() == BX_CLOCK_TIME0_UTC) {
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bx_bool utc_ok = 0;
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BX_INFO(("Using utc time for initial clock"));
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BX_CMOS_THIS s.timeval = time(NULL);
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#if BX_HAVE_GMTIME
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#if BX_HAVE_MKTIME
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struct tm *utc_holder = gmtime(&BX_CMOS_THIS s.timeval);
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utc_holder->tm_isdst = -1;
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utc_ok = 1;
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BX_CMOS_THIS s.timeval = mktime(utc_holder);
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#elif BX_HAVE_TIMELOCAL
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struct tm *utc_holder = gmtime(&BX_CMOS_THIS s.timeval);
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utc_holder->tm_isdst = 0; // XXX Is this correct???
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utc_ok = 1;
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BX_CMOS_THIS s.timeval = timelocal(utc_holder);
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#endif //BX_HAVE_MKTIME
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#endif //BX_HAVE_GMTIME
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if (!utc_ok) {
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BX_ERROR(("UTC time is not supported on your platform. Using current time(NULL)"));
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}
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} else {
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BX_INFO(("Using specified time for initial clock"));
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BX_CMOS_THIS s.timeval = SIM->get_param_num(BXPN_CLOCK_TIME0)->get();
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}
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// load CMOS from image file if requested.
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if (SIM->get_param_bool(BXPN_CMOSIMAGE_ENABLED)->get()) {
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int fd, ret;
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struct stat stat_buf;
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fd = open(SIM->get_param_string(BXPN_CMOSIMAGE_PATH)->getptr(), O_RDONLY
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#ifdef O_BINARY
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| O_BINARY
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#endif
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);
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if (fd < 0) {
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BX_PANIC(("trying to open cmos image file '%s'",
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SIM->get_param_string(BXPN_CMOSIMAGE_PATH)->getptr()));
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}
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ret = fstat(fd, &stat_buf);
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if (ret) {
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BX_PANIC(("CMOS: could not fstat() image file."));
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}
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if ((stat_buf.st_size != 64) && (stat_buf.st_size != 128)) {
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BX_PANIC(("CMOS: image file size must be 64 or 128"));
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}
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ret = ::read(fd, (bx_ptr_t) BX_CMOS_THIS s.reg, (unsigned)stat_buf.st_size);
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if (ret != stat_buf.st_size) {
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BX_PANIC(("CMOS: error reading cmos file."));
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}
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close(fd);
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BX_INFO(("successfuly read from image file '%s'.",
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SIM->get_param_string(BXPN_CMOSIMAGE_PATH)->getptr()));
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BX_CMOS_THIS s.rtc_mode_12hour = ((BX_CMOS_THIS s.reg[REG_STAT_B] & 0x02) == 0);
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BX_CMOS_THIS s.rtc_mode_binary = ((BX_CMOS_THIS s.reg[REG_STAT_B] & 0x04) != 0);
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if (SIM->get_param_bool(BXPN_CMOSIMAGE_RTC_INIT)->get()) {
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update_timeval();
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} else {
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update_clock();
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}
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} else {
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// CMOS values generated
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BX_CMOS_THIS s.reg[REG_STAT_A] = 0x26;
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BX_CMOS_THIS s.reg[REG_STAT_B] = 0x02;
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BX_CMOS_THIS s.reg[REG_STAT_C] = 0x00;
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BX_CMOS_THIS s.reg[REG_STAT_D] = 0x80;
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#if BX_SUPPORT_FPU == 1
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BX_CMOS_THIS s.reg[REG_EQUIPMENT_BYTE] |= 0x02;
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#endif
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BX_CMOS_THIS s.rtc_mode_12hour = 0;
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BX_CMOS_THIS s.rtc_mode_binary = 0;
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update_clock();
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}
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char *tmptime;
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while((tmptime = strdup(ctime(&(BX_CMOS_THIS s.timeval)))) == NULL) {
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BX_PANIC(("Out of memory."));
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}
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tmptime[strlen(tmptime)-1]='\0';
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BX_INFO(("Setting initial clock to: %s (time0=%u)", tmptime, (Bit32u)BX_CMOS_THIS s.timeval));
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free(tmptime);
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BX_CMOS_THIS s.timeval_change = 0;
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#if BX_DEBUGGER
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// register device for the 'info device' command (calls debug_dump())
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bx_dbg_register_debug_info("cmos", this);
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#endif
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}
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void bx_cmos_c::reset(unsigned type)
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{
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BX_CMOS_THIS s.cmos_mem_address = 0;
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// RESET affects the following registers:
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// CRA: no effects
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// CRB: bits 4,5,6 forced to 0
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// CRC: bits 4,5,6,7 forced to 0
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// CRD: no effects
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BX_CMOS_THIS s.reg[REG_STAT_B] &= 0x8f;
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BX_CMOS_THIS s.reg[REG_STAT_C] = 0;
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// One second timer for updating clock & alarm functions
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if (BX_CMOS_THIS s.rtc_sync) {
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bx_virt_timer.activate_timer(BX_CMOS_THIS s.one_second_timer_index,
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1000000, 1);
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} else {
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bx_pc_system.activate_timer(BX_CMOS_THIS s.one_second_timer_index,
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1000000, 1);
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}
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// handle periodic interrupt rate select
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BX_CMOS_THIS CRA_change();
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}
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void bx_cmos_c::save_image(void)
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{
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int fd, ret;
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// save CMOS to image file if requested.
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if (SIM->get_param_bool(BXPN_CMOSIMAGE_ENABLED)->get()) {
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fd = open(SIM->get_param_string(BXPN_CMOSIMAGE_PATH)->getptr(), O_WRONLY
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#ifdef O_BINARY
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| O_BINARY
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#endif
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);
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ret = ::write(fd, (bx_ptr_t) BX_CMOS_THIS s.reg, 128);
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if (ret != 128) {
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BX_PANIC(("CMOS: error writing cmos file."));
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}
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close(fd);
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}
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}
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void bx_cmos_c::register_state(void)
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{
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bx_list_c *list = new bx_list_c(SIM->get_bochs_root(), "cmos", "CMOS State");
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BXRS_HEX_PARAM_FIELD(list, mem_address, BX_CMOS_THIS s.cmos_mem_address);
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bx_list_c *ram = new bx_list_c(list, "ram");
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for (unsigned i=0; i<128; i++) {
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char name[6];
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sprintf(name, "0x%02x", i);
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new bx_shadow_num_c(ram, name, &BX_CMOS_THIS s.reg[i], BASE_HEX);
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}
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}
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void bx_cmos_c::after_restore_state(void)
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{
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BX_CMOS_THIS s.rtc_mode_12hour = ((BX_CMOS_THIS s.reg[REG_STAT_B] & 0x02) == 0);
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BX_CMOS_THIS s.rtc_mode_binary = ((BX_CMOS_THIS s.reg[REG_STAT_B] & 0x04) != 0);
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BX_CMOS_THIS update_timeval();
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BX_CMOS_THIS CRA_change();
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}
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void bx_cmos_c::CRA_change(void)
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{
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Bit8u nibble, dcc;
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// Periodic Interrupt timer
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nibble = BX_CMOS_THIS s.reg[REG_STAT_A] & 0x0f;
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dcc = (BX_CMOS_THIS s.reg[REG_STAT_A] >> 4) & 0x07;
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if ((nibble == 0) || ((dcc & 0x06) == 0)) {
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// No Periodic Interrupt Rate when 0, deactivate timer
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bx_pc_system.deactivate_timer(BX_CMOS_THIS s.periodic_timer_index);
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BX_CMOS_THIS s.periodic_interval_usec = (Bit32u) -1; // max value
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} else {
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// values 0001b and 0010b are the same as 1000b and 1001b
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if (nibble <= 2)
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nibble += 7;
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BX_CMOS_THIS s.periodic_interval_usec = (unsigned) (1000000.0L /
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(32768.0L / (1 << (nibble - 1))));
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// if Periodic Interrupt Enable bit set, activate timer
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if (BX_CMOS_THIS s.reg[REG_STAT_B] & 0x40)
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bx_pc_system.activate_timer(BX_CMOS_THIS s.periodic_timer_index,
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BX_CMOS_THIS s.periodic_interval_usec, 1);
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else
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bx_pc_system.deactivate_timer(BX_CMOS_THIS s.periodic_timer_index);
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}
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}
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// static IO port read callback handler
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// redirects to non-static class handler to avoid virtual functions
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Bit32u bx_cmos_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
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{
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#if !BX_USE_CMOS_SMF
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bx_cmos_c *class_ptr = (bx_cmos_c *) this_ptr;
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return class_ptr->read(address, io_len);
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}
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Bit32u bx_cmos_c::read(Bit32u address, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif
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Bit8u ret8;
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BX_DEBUG(("CMOS read of CMOS register 0x%02x", (unsigned) BX_CMOS_THIS s.cmos_mem_address));
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switch (address) {
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case 0x0070:
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// this register is write-only on most machines
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BX_DEBUG(("read of index port 0x70. returning 0xff"));
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return(0xff);
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case 0x0071:
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ret8 = BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address];
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// all bits of Register C are cleared after a read occurs.
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if (BX_CMOS_THIS s.cmos_mem_address == REG_STAT_C) {
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BX_CMOS_THIS s.reg[REG_STAT_C] = 0x00;
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DEV_pic_lower_irq(8);
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}
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return(ret8);
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default:
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BX_PANIC(("unsupported cmos read, address=0x%04x!", (unsigned) address));
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return(0);
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}
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}
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// static IO port write callback handler
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// redirects to non-static class handler to avoid virtual functions
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void bx_cmos_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
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{
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#if !BX_USE_CMOS_SMF
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bx_cmos_c *class_ptr = (bx_cmos_c *) this_ptr;
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class_ptr->write(address, value, io_len);
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}
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void bx_cmos_c::write(Bit32u address, Bit32u value, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_CMOS_SMF
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BX_DEBUG(("CMOS write to address: 0x%04x = 0x%02x", address, value));
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switch (address) {
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case 0x0070:
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BX_CMOS_THIS s.cmos_mem_address = value & 0x7F;
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break;
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case 0x0071:
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switch (BX_CMOS_THIS s.cmos_mem_address) {
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case REG_SEC_ALARM: // seconds alarm
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case REG_MIN_ALARM: // minutes alarm
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case REG_HOUR_ALARM: // hours alarm
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BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address] = value;
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|
BX_DEBUG(("alarm time changed to %02x:%02x:%02x", BX_CMOS_THIS s.reg[REG_HOUR_ALARM],
|
|
BX_CMOS_THIS s.reg[REG_MIN_ALARM], BX_CMOS_THIS s.reg[REG_SEC_ALARM]));
|
|
break;
|
|
|
|
case REG_SEC: // seconds
|
|
case REG_MIN: // minutes
|
|
case REG_HOUR: // hours
|
|
case REG_WEEK_DAY: // day of the week
|
|
case REG_MONTH_DAY: // day of the month
|
|
case REG_MONTH: // month
|
|
case REG_YEAR: // year
|
|
case REG_IBM_CENTURY_BYTE: // century
|
|
case REG_IBM_PS2_CENTURY_BYTE: // century (PS/2)
|
|
BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address] = value;
|
|
if (BX_CMOS_THIS s.cmos_mem_address == REG_IBM_PS2_CENTURY_BYTE) {
|
|
BX_CMOS_THIS s.reg[REG_IBM_CENTURY_BYTE] = value;
|
|
}
|
|
if (BX_CMOS_THIS s.reg[REG_STAT_B] & 0x80) {
|
|
BX_CMOS_THIS s.timeval_change = 1;
|
|
} else {
|
|
update_timeval();
|
|
}
|
|
break;
|
|
|
|
case REG_STAT_A: // Control Register A
|
|
// bit 7: Update in Progress (read-only)
|
|
// 1 = signifies time registers will be updated within 244us
|
|
// 0 = time registers will not occur before 244us
|
|
// note: this bit reads 0 when CRB bit 7 is 1
|
|
// bit 6..4: Divider Chain Control
|
|
// 000 oscillator disabled
|
|
// 001 oscillator disabled
|
|
// 010 Normal operation
|
|
// 011 TEST
|
|
// 100 TEST
|
|
// 101 TEST
|
|
// 110 Divider Chain RESET
|
|
// 111 Divider Chain RESET
|
|
// bit 3..0: Periodic Interrupt Rate Select
|
|
// 0000 None
|
|
// 0001 3.90625 ms
|
|
// 0010 7.8125 ms
|
|
// 0011 122.070 us
|
|
// 0100 244.141 us
|
|
// 0101 488.281 us
|
|
// 0110 976.562 us
|
|
// 0111 1.953125 ms
|
|
// 1000 3.90625 ms
|
|
// 1001 7.8125 ms
|
|
// 1010 15.625 ms
|
|
// 1011 31.25 ms
|
|
// 1100 62.5 ms
|
|
// 1101 125 ms
|
|
// 1110 250 ms
|
|
// 1111 500 ms
|
|
|
|
unsigned dcc;
|
|
dcc = (value >> 4) & 0x07;
|
|
if ((dcc & 0x06) == 0x06) {
|
|
BX_INFO(("CRA: divider chain RESET"));
|
|
} else if (dcc > 0x02) {
|
|
BX_PANIC(("CRA: divider chain control 0x%02x", dcc));
|
|
}
|
|
BX_CMOS_THIS s.reg[REG_STAT_A] &= 0x80;
|
|
BX_CMOS_THIS s.reg[REG_STAT_A] |= (value & 0x7f);
|
|
BX_CMOS_THIS CRA_change();
|
|
break;
|
|
|
|
case REG_STAT_B: // Control Register B
|
|
// bit 0: Daylight Savings Enable
|
|
// 1 = enable daylight savings
|
|
// 0 = disable daylight savings
|
|
// bit 1: 24/12 hour mode
|
|
// 1 = 24 hour format
|
|
// 0 = 12 hour format
|
|
// bit 2: Data Mode
|
|
// 1 = binary format
|
|
// 0 = BCD format
|
|
// bit 3: "square wave enable"
|
|
// Not supported and always read as 0
|
|
// bit 4: Update Ended Interrupt Enable
|
|
// 1 = enable generation of update ended interrupt
|
|
// 0 = disable
|
|
// bit 5: Alarm Interrupt Enable
|
|
// 1 = enable generation of alarm interrupt
|
|
// 0 = disable
|
|
// bit 6: Periodic Interrupt Enable
|
|
// 1 = enable generation of periodic interrupt
|
|
// 0 = disable
|
|
// bit 7: Set mode
|
|
// 1 = user copy of time is "frozen" allowing time registers
|
|
// to be accessed without regard for an occurance of an update
|
|
// 0 = time updates occur normally
|
|
|
|
if (value & 0x01)
|
|
BX_ERROR(("write status reg B, daylight savings unsupported"));
|
|
|
|
value &= 0xf7; // bit3 always 0
|
|
// Note: setting bit 7 clears bit 4
|
|
if (value & 0x80)
|
|
value &= 0xef;
|
|
|
|
unsigned prev_CRB;
|
|
prev_CRB = BX_CMOS_THIS s.reg[REG_STAT_B];
|
|
BX_CMOS_THIS s.reg[REG_STAT_B] = value;
|
|
if ((prev_CRB & 0x02) != (value & 0x02)) {
|
|
BX_CMOS_THIS s.rtc_mode_12hour = ((value & 0x02) == 0);
|
|
update_clock();
|
|
}
|
|
if ((prev_CRB & 0x04) != (value & 0x04)) {
|
|
BX_CMOS_THIS s.rtc_mode_binary = ((value & 0x04) != 0);
|
|
update_clock();
|
|
}
|
|
if ((prev_CRB & 0x40) != (value & 0x40)) {
|
|
// Periodic Interrupt Enabled changed
|
|
if (prev_CRB & 0x40) {
|
|
// transition from 1 to 0, deactivate timer
|
|
bx_pc_system.deactivate_timer(BX_CMOS_THIS s.periodic_timer_index);
|
|
} else {
|
|
// transition from 0 to 1
|
|
// if rate select is not 0, activate timer
|
|
if ((BX_CMOS_THIS s.reg[REG_STAT_A] & 0x0f) != 0) {
|
|
bx_pc_system.activate_timer(
|
|
BX_CMOS_THIS s.periodic_timer_index,
|
|
BX_CMOS_THIS s.periodic_interval_usec, 1);
|
|
}
|
|
}
|
|
}
|
|
if ((prev_CRB >= 0x80) && (value < 0x80) && BX_CMOS_THIS s.timeval_change) {
|
|
update_timeval();
|
|
BX_CMOS_THIS s.timeval_change = 0;
|
|
}
|
|
break;
|
|
|
|
case REG_STAT_C: // Control Register C
|
|
case REG_STAT_D: // Control Register D
|
|
BX_ERROR(("write to control register 0x%02x ignored (read-only)",
|
|
BX_CMOS_THIS s.cmos_mem_address));
|
|
break;
|
|
|
|
case REG_DIAGNOSTIC_STATUS:
|
|
BX_DEBUG(("write register 0x0e: 0x%02x", value));
|
|
BX_CMOS_THIS s.reg[REG_DIAGNOSTIC_STATUS] = value;
|
|
break;
|
|
|
|
case REG_SHUTDOWN_STATUS:
|
|
switch (value) {
|
|
case 0x00: /* proceed with normal POST (soft reset) */
|
|
BX_DEBUG(("Reg 0Fh(00): shutdown action = normal POST"));
|
|
break;
|
|
case 0x01: /* shutdown after memory size check */
|
|
BX_DEBUG(("Reg 0Fh(01): request to change shutdown action"
|
|
" to shutdown after memory size check"));
|
|
break;
|
|
case 0x02: /* shutdown after successful memory test */
|
|
BX_DEBUG(("Reg 0Fh(02): request to change shutdown action"
|
|
" to shutdown after successful memory test"));
|
|
break;
|
|
case 0x03: /* shutdown after failed memory test */
|
|
BX_DEBUG(("Reg 0Fh(03): request to change shutdown action"
|
|
" to shutdown after successful memory test"));
|
|
break;
|
|
case 0x04: /* jump to disk bootstrap routine */
|
|
BX_DEBUG(("Reg 0Fh(04): request to change shutdown action "
|
|
"to jump to disk bootstrap routine."));
|
|
break;
|
|
case 0x05: /* flush keyboard (issue EOI) and jump via 40h:0067h */
|
|
BX_DEBUG(("Reg 0Fh(05): request to change shutdown action "
|
|
"to flush keyboard (issue EOI) and jump via 40h:0067h."));
|
|
break;
|
|
case 0x06:
|
|
BX_DEBUG(("Reg 0Fh(06): Shutdown after memory test !"));
|
|
break;
|
|
case 0x07: /* reset (after failed test in virtual mode) */
|
|
BX_DEBUG(("Reg 0Fh(07): request to change shutdown action "
|
|
"to reset (after failed test in virtual mode)."));
|
|
break;
|
|
case 0x08: /* used by POST during protected-mode RAM test (return to POST) */
|
|
BX_DEBUG(("Reg 0Fh(08): request to change shutdown action "
|
|
"to return to POST (used by POST during protected-mode RAM test)."));
|
|
break;
|
|
case 0x09: /* return to BIOS extended memory block move
|
|
(interrupt 15h, func 87h was in progress) */
|
|
BX_DEBUG(("Reg 0Fh(09): request to change shutdown action "
|
|
"to return to BIOS extended memory block move."));
|
|
break;
|
|
case 0x0a: /* jump to DWORD pointer at 40:67 */
|
|
BX_DEBUG(("Reg 0Fh(0a): request to change shutdown action"
|
|
" to jump to DWORD at 40:67"));
|
|
break;
|
|
case 0x0b: /* iret to DWORD pointer at 40:67 */
|
|
BX_DEBUG(("Reg 0Fh(0b): request to change shutdown action"
|
|
" to iret to DWORD at 40:67"));
|
|
break;
|
|
case 0x0c: /* retf to DWORD pointer at 40:67 */
|
|
BX_DEBUG(("Reg 0Fh(0c): request to change shutdown action"
|
|
" to retf to DWORD at 40:67"));
|
|
break;
|
|
default:
|
|
BX_ERROR(("unsupported shutdown status: 0x%02x!", value));
|
|
}
|
|
BX_CMOS_THIS s.reg[REG_SHUTDOWN_STATUS] = value;
|
|
break;
|
|
|
|
default:
|
|
BX_DEBUG(("write reg 0x%02x: value = 0x%02x",
|
|
BX_CMOS_THIS s.cmos_mem_address, value));
|
|
BX_CMOS_THIS s.reg[BX_CMOS_THIS s.cmos_mem_address] = value;
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
void bx_cmos_c::checksum_cmos(void)
|
|
{
|
|
Bit16u sum = 0;
|
|
for (unsigned i=0x10; i<=0x2d; i++)
|
|
sum += BX_CMOS_THIS s.reg[i];
|
|
BX_CMOS_THIS s.reg[REG_CSUM_HIGH] = (sum >> 8) & 0xff; /* checksum high */
|
|
BX_CMOS_THIS s.reg[REG_CSUM_LOW] = (sum & 0xff); /* checksum low */
|
|
}
|
|
|
|
void bx_cmos_c::periodic_timer_handler(void *this_ptr)
|
|
{
|
|
bx_cmos_c *class_ptr = (bx_cmos_c *) this_ptr;
|
|
class_ptr->periodic_timer();
|
|
}
|
|
|
|
void bx_cmos_c::periodic_timer()
|
|
{
|
|
// if periodic interrupts are enabled, trip IRQ 8, and
|
|
// update status register C
|
|
if (BX_CMOS_THIS s.reg[REG_STAT_B] & 0x40) {
|
|
BX_CMOS_THIS s.reg[REG_STAT_C] |= 0xc0; // Interrupt Request, Periodic Int
|
|
DEV_pic_raise_irq(8);
|
|
}
|
|
}
|
|
|
|
void bx_cmos_c::one_second_timer_handler(void *this_ptr)
|
|
{
|
|
bx_cmos_c *class_ptr = (bx_cmos_c *) this_ptr;
|
|
class_ptr->one_second_timer();
|
|
}
|
|
|
|
void bx_cmos_c::one_second_timer()
|
|
{
|
|
// divider chain reset - RTC stopped
|
|
if ((BX_CMOS_THIS s.reg[REG_STAT_A] & 0x60) == 0x60)
|
|
return;
|
|
|
|
// update internal time/date buffer
|
|
BX_CMOS_THIS s.timeval++;
|
|
|
|
// Dont update CMOS user copy of time/date if CRB bit7 is 1
|
|
// Nothing else do to
|
|
if (BX_CMOS_THIS s.reg[REG_STAT_B] & 0x80)
|
|
return;
|
|
|
|
BX_CMOS_THIS s.reg[REG_STAT_A] |= 0x80; // set UIP bit
|
|
|
|
// UIP timer for updating clock & alarm functions
|
|
bx_pc_system.activate_timer(BX_CMOS_THIS s.uip_timer_index, 244, 0);
|
|
}
|
|
|
|
void bx_cmos_c::uip_timer_handler(void *this_ptr)
|
|
{
|
|
bx_cmos_c *class_ptr = (bx_cmos_c *) this_ptr;
|
|
class_ptr->uip_timer();
|
|
}
|
|
|
|
void bx_cmos_c::uip_timer()
|
|
{
|
|
update_clock();
|
|
|
|
// if update interrupts are enabled, trip IRQ 8, and
|
|
// update status register C
|
|
if (BX_CMOS_THIS s.reg[REG_STAT_B] & 0x10) {
|
|
BX_CMOS_THIS s.reg[REG_STAT_C] |= 0x90; // Interrupt Request, Update Ended
|
|
DEV_pic_raise_irq(8);
|
|
}
|
|
|
|
// compare CMOS user copy of time/date to alarm time/date here
|
|
if (BX_CMOS_THIS s.reg[REG_STAT_B] & 0x20) {
|
|
// Alarm interrupts enabled
|
|
bx_bool alarm_match = 1;
|
|
if ((BX_CMOS_THIS s.reg[REG_SEC_ALARM] & 0xc0) != 0xc0) {
|
|
// seconds alarm not in dont care mode
|
|
if (BX_CMOS_THIS s.reg[REG_SEC] != BX_CMOS_THIS s.reg[REG_SEC_ALARM])
|
|
alarm_match = 0;
|
|
}
|
|
if ((BX_CMOS_THIS s.reg[REG_MIN_ALARM] & 0xc0) != 0xc0) {
|
|
// minutes alarm not in dont care mode
|
|
if (BX_CMOS_THIS s.reg[REG_MIN] != BX_CMOS_THIS s.reg[REG_MIN_ALARM])
|
|
alarm_match = 0;
|
|
}
|
|
if ((BX_CMOS_THIS s.reg[REG_HOUR_ALARM] & 0xc0) != 0xc0) {
|
|
// hours alarm not in dont care mode
|
|
if (BX_CMOS_THIS s.reg[REG_HOUR] != BX_CMOS_THIS s.reg[REG_HOUR_ALARM])
|
|
alarm_match = 0;
|
|
}
|
|
if (alarm_match) {
|
|
BX_CMOS_THIS s.reg[REG_STAT_C] |= 0xa0; // Interrupt Request, Alarm Int
|
|
DEV_pic_raise_irq(8);
|
|
}
|
|
}
|
|
BX_CMOS_THIS s.reg[REG_STAT_A] &= 0x7f; // clear UIP bit
|
|
}
|
|
|
|
void bx_cmos_c::update_clock()
|
|
{
|
|
struct tm *time_calendar;
|
|
unsigned year, month, day, century;
|
|
Bit8u val_bcd, hour;
|
|
|
|
time_calendar = localtime(& BX_CMOS_THIS s.timeval);
|
|
|
|
// update seconds
|
|
BX_CMOS_THIS s.reg[REG_SEC] = bin_to_bcd(time_calendar->tm_sec,
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
|
|
// update minutes
|
|
BX_CMOS_THIS s.reg[REG_MIN] = bin_to_bcd(time_calendar->tm_min,
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
|
|
// update hours
|
|
if (BX_CMOS_THIS s.rtc_mode_12hour) {
|
|
hour = time_calendar->tm_hour;
|
|
val_bcd = (hour > 11) ? 0x80 : 0x00;
|
|
if (hour > 11) hour -= 12;
|
|
if (hour == 0) hour = 12;
|
|
val_bcd |= bin_to_bcd(hour, BX_CMOS_THIS s.rtc_mode_binary);
|
|
BX_CMOS_THIS s.reg[REG_HOUR] = val_bcd;
|
|
} else {
|
|
BX_CMOS_THIS s.reg[REG_HOUR] = bin_to_bcd(time_calendar->tm_hour,
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
}
|
|
|
|
// update day of the week
|
|
day = time_calendar->tm_wday + 1; // 0..6 to 1..7
|
|
BX_CMOS_THIS s.reg[REG_WEEK_DAY] = bin_to_bcd(day,
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
|
|
// update day of the month
|
|
day = time_calendar->tm_mday;
|
|
BX_CMOS_THIS s.reg[REG_MONTH_DAY] = bin_to_bcd(day,
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
|
|
// update month
|
|
month = time_calendar->tm_mon + 1;
|
|
BX_CMOS_THIS s.reg[REG_MONTH] = bin_to_bcd(month,
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
|
|
// update year
|
|
year = time_calendar->tm_year % 100;
|
|
BX_CMOS_THIS s.reg[REG_YEAR] = bin_to_bcd(year,
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
|
|
// update century
|
|
century = (time_calendar->tm_year / 100) + 19;
|
|
BX_CMOS_THIS s.reg[REG_IBM_CENTURY_BYTE] = bin_to_bcd(century,
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
|
|
// Raul Hudea pointed out that some bioses also use reg 0x37 for the
|
|
// century byte. Tony Heller says this is critical in getting WinXP to run.
|
|
BX_CMOS_THIS s.reg[REG_IBM_PS2_CENTURY_BYTE] =
|
|
BX_CMOS_THIS s.reg[REG_IBM_CENTURY_BYTE];
|
|
}
|
|
|
|
void bx_cmos_c::update_timeval()
|
|
{
|
|
struct tm time_calendar;
|
|
Bit8u val_bin, pm_flag;
|
|
|
|
// update seconds
|
|
time_calendar.tm_sec = bcd_to_bin(BX_CMOS_THIS s.reg[REG_SEC],
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
|
|
// update minutes
|
|
time_calendar.tm_min = bcd_to_bin(BX_CMOS_THIS s.reg[REG_MIN],
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
|
|
// update hours
|
|
if (BX_CMOS_THIS s.rtc_mode_12hour) {
|
|
pm_flag = BX_CMOS_THIS s.reg[REG_HOUR] & 0x80;
|
|
val_bin = bcd_to_bin(BX_CMOS_THIS s.reg[REG_HOUR] & 0x70,
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
if ((val_bin < 12) & (pm_flag > 0)) {
|
|
val_bin += 12;
|
|
} else if ((val_bin == 12) & (pm_flag == 0)) {
|
|
val_bin = 0;
|
|
}
|
|
time_calendar.tm_hour = val_bin;
|
|
} else {
|
|
time_calendar.tm_hour = bcd_to_bin(BX_CMOS_THIS s.reg[REG_HOUR],
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
}
|
|
|
|
// update day of the month
|
|
time_calendar.tm_mday = bcd_to_bin(BX_CMOS_THIS s.reg[REG_MONTH_DAY],
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
|
|
// update month
|
|
time_calendar.tm_mon = bcd_to_bin(BX_CMOS_THIS s.reg[REG_MONTH],
|
|
BX_CMOS_THIS s.rtc_mode_binary) - 1;
|
|
|
|
// update year
|
|
val_bin = bcd_to_bin(BX_CMOS_THIS s.reg[REG_IBM_CENTURY_BYTE],
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
val_bin = (val_bin - 19) * 100;
|
|
val_bin += bcd_to_bin(BX_CMOS_THIS s.reg[REG_YEAR],
|
|
BX_CMOS_THIS s.rtc_mode_binary);
|
|
time_calendar.tm_year = val_bin;
|
|
|
|
BX_CMOS_THIS s.timeval = mktime(& time_calendar);
|
|
}
|
|
|
|
#if BX_DEBUGGER
|
|
void bx_cmos_c::debug_dump(int argc, char **argv)
|
|
{
|
|
int i, j, r;
|
|
|
|
dbg_printf("CMOS RTC\n\n");
|
|
dbg_printf("Index register: 0x%02x\n\n", BX_CMOS_THIS s.cmos_mem_address);
|
|
r = 0;
|
|
for (i=0; i<8; i++) {
|
|
dbg_printf("%04x ", r);
|
|
for (j=0; j<16; j++) {
|
|
dbg_printf(" %02x", BX_CMOS_THIS s.reg[r++]);
|
|
}
|
|
dbg_printf("\n");
|
|
}
|
|
if (argc > 0) {
|
|
dbg_printf("\nAdditional options not supported\n");
|
|
}
|
|
}
|
|
#endif
|