118 lines
4.7 KiB
Plaintext
118 lines
4.7 KiB
Plaintext
----------------------------------------------------------------------
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Patch name: patch.no-busy-in-tr-cache
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Author: Peter Lammich, Bryce Denney
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Date: Tue Oct 9 17:05:37 EDT 2001
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RCS Id: $Id: patch.no-busy-in-tr-cache,v 1.1 2001-10-09 21:13:30 bdenney Exp $
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Detailed description:
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This patch fixes a bug reported by Peter Lammich,
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[ #461730 ] IRETD causes problems if NT-flag is set
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The problem is that all functions that look at tr.cache.type assume that the
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busy bit (bit 2) is off, and they frequently check that the type is either 1 or
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9, and panic otherwise. Conceptually the task in TR is always busy, since it's
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the currently executing task, but the busy bit is apprantly never expected to
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appear in tr.cache.type since it crashes the simulator.
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So the choice was to change every place that tr.cache.type gets set, or change
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every place that tr.cache.type is interpreted. At Peter's suggestion, I
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changed the code where tr.cache.type gets set. In a few cases, I was virtually
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certain that bit 2 was not creeping in, but I added BX_ASSERTs just to be sure.
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Thank you to Peter Lammich for his analysis of the bug and suggested fix!
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Patch was created with:
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cvs diff -u
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Apply patch to what version:
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cvs checked out on DATE, release version VER
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Instructions:
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To patch, go to main bochs directory.
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Type "patch -p0 < THIS_PATCH_FILE".
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----------------------------------------------------------------------
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Index: cpu/debugstuff.cc
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===================================================================
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RCS file: /cvsroot/bochs/bochs/cpu/debugstuff.cc,v
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retrieving revision 1.10
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diff -u -r1.10 debugstuff.cc
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--- cpu/debugstuff.cc 2001/10/03 13:10:37 1.10
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+++ cpu/debugstuff.cc 2001/10/09 21:00:48
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@@ -866,6 +866,7 @@
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// TR
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type = (cpu->tr.des_h >> 8) & 0x0f;
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+ type &= ~2; // never allow busy bit in tr.cache.type
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BX_CPU_THIS_PTR tr.selector.value = cpu->tr.sel;
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BX_CPU_THIS_PTR tr.selector.index = cpu->tr.sel >> 3;
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BX_CPU_THIS_PTR tr.selector.ti = (cpu->tr.sel >> 2) & 0x01;
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Index: cpu/proc_ctrl.cc
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===================================================================
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RCS file: /cvsroot/bochs/bochs/cpu/proc_ctrl.cc,v
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retrieving revision 1.14
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diff -u -r1.14 proc_ctrl.cc
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--- cpu/proc_ctrl.cc 2001/10/03 13:10:37 1.14
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+++ cpu/proc_ctrl.cc 2001/10/09 21:00:50
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@@ -681,7 +681,8 @@
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BX_CPU_THIS_PTR tr.cache.p = (access & 0x80) >> 7;
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BX_CPU_THIS_PTR tr.cache.dpl = (access & 0x60) >> 5;
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BX_CPU_THIS_PTR tr.cache.segment = (access & 0x10) >> 4;
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- BX_CPU_THIS_PTR tr.cache.type = (access & 0x0f);
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+ // don't allow busy bit in tr.cache.type, so bit 2 is masked away too.
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+ BX_CPU_THIS_PTR tr.cache.type = (access & 0x0d);
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BX_CPU_THIS_PTR tr.cache.u.tss286.base = (base_23_16 << 16) | base_15_0;
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BX_CPU_THIS_PTR tr.cache.u.tss286.limit = limit;
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Index: cpu/protect_ctrl.cc
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===================================================================
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RCS file: /cvsroot/bochs/bochs/cpu/protect_ctrl.cc,v
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retrieving revision 1.9
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diff -u -r1.9 protect_ctrl.cc
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--- cpu/protect_ctrl.cc 2001/10/03 13:10:37 1.9
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+++ cpu/protect_ctrl.cc 2001/10/09 21:00:50
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@@ -524,6 +524,9 @@
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BX_CPU_THIS_PTR tr.selector = selector;
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BX_CPU_THIS_PTR tr.cache = descriptor;
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BX_CPU_THIS_PTR tr.cache.valid = 1;
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+ // tr.cache.type should not have busy bit, or it would not get
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+ // through the conditions above.
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+ BX_ASSERT((BX_CPU_THIS_PTR tr.cache.type & 2) == 0);
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/* mark as busy */
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dword2 |= 0x00000200; /* set busy bit */
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Index: cpu/tasking.cc
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===================================================================
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RCS file: /cvsroot/bochs/bochs/cpu/tasking.cc,v
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retrieving revision 1.7
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diff -u -r1.7 tasking.cc
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--- cpu/tasking.cc 2001/10/03 13:10:37 1.7
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+++ cpu/tasking.cc 2001/10/09 21:00:51
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@@ -180,6 +180,8 @@
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// Gather info about old TSS
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if (BX_CPU_THIS_PTR tr.cache.type <= 3) {
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+ // sanity check type: cannot have busy bit
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+ BX_ASSERT ((BX_CPU_THIS_PTR tr.cache.type & 2) == 0);
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obase32 = BX_CPU_THIS_PTR tr.cache.u.tss286.base;
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old_TSS_max = 43;
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old_TSS_limit = BX_CPU_THIS_PTR tr.cache.u.tss286.limit;
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@@ -342,6 +344,8 @@
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//
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if (BX_CPU_THIS_PTR tr.cache.type <= 3) {
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+ // sanity check: tr.cache.type cannot have busy bit
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+ BX_ASSERT ((BX_CPU_THIS_PTR tr.cache.type & 2) == 0);
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temp16 = IP; access_linear(obase32 + 14, 2, 0, BX_WRITE, &temp16);
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temp16 = oldEFLAGS; access_linear(obase32 + 16, 2, 0, BX_WRITE, &temp16);
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temp16 = AX; access_linear(obase32 + 18, 2, 0, BX_WRITE, &temp16);
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@@ -454,6 +458,9 @@
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BX_CPU_THIS_PTR tr.selector = *tss_selector;
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BX_CPU_THIS_PTR tr.cache = *tss_descriptor;
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+ // Reset the busy-flag, because all functions expect non-busy types in
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+ // tr.cache. From Peter Lammich <peterl@sourceforge.net>.
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+ BX_CPU_THIS_PTR tr.cache.type &= ~2;
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//
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