473 lines
14 KiB
C++
473 lines
14 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2020 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#include "bochs.h"
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#include "cpu/cpu.h"
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#include "iodev/iodev.h"
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#define LOG_THIS BX_MEM_THIS
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//
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// Memory map inside the 1st megabyte:
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//
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// 0x00000 - 0x7ffff DOS area (512K)
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// 0x80000 - 0x9ffff Optional fixed memory hole (128K)
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// 0xa0000 - 0xbffff Standard PCI/ISA Video Mem / SMMRAM (128K)
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// 0xc0000 - 0xdffff Expansion Card BIOS and Buffer Area (128K)
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// 0xe0000 - 0xeffff Lower BIOS Area (64K)
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// 0xf0000 - 0xfffff Upper BIOS Area (64K)
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//
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void BX_MEM_C::writePhysicalPage(BX_CPU_C *cpu, bx_phy_address addr, unsigned len, void *data)
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{
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Bit8u *data_ptr;
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bx_phy_address a20addr = A20ADDR(addr);
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struct memory_handler_struct *memory_handler = NULL;
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// Note: accesses should always be contained within a single page
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if ((addr>>12) != ((addr+len-1)>>12)) {
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BX_PANIC(("writePhysicalPage: cross page access at address 0x" FMT_PHY_ADDRX ", len=%d", addr, len));
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}
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#if BX_SUPPORT_MONITOR_MWAIT
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BX_MEM_THIS check_monitor(a20addr, len);
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#endif
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bool is_bios = (a20addr >= (bx_phy_address)BX_MEM_THIS bios_rom_addr);
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#if BX_PHY_ADDRESS_LONG
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if (a20addr > BX_CONST64(0xffffffff)) is_bios = 0;
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#endif
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if (cpu != NULL) {
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#if BX_SUPPORT_IODEBUG
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bx_devices.pluginIODebug->mem_write(cpu, a20addr, len, data);
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#endif
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if ((a20addr >= 0x000a0000 && a20addr < 0x000c0000) && BX_MEM_THIS smram_available)
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{
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// SMRAM memory space
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if (BX_MEM_THIS smram_enable || (cpu->smm_mode() && !BX_MEM_THIS smram_restricted))
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goto mem_write;
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}
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}
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memory_handler = BX_MEM_THIS memory_handlers[a20addr >> 20];
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while (memory_handler) {
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if (memory_handler->write_handler != NULL) {
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if (memory_handler->begin <= a20addr &&
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memory_handler->end >= a20addr &&
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memory_handler->write_handler(a20addr, len, data, memory_handler->param))
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{
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return;
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}
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}
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memory_handler = memory_handler->next;
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}
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mem_write:
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// all memory access fits in single 4K page
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if ((a20addr < BX_MEM_THIS len) && !is_bios) {
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// all of data is within limits of physical memory
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if (a20addr < 0x000a0000 || a20addr >= 0x00100000)
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{
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if (len == 8) {
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pageWriteStampTable.decWriteStamp(a20addr, 8);
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WriteHostQWordToLittleEndian((Bit64u*) BX_MEM_THIS get_vector(a20addr), *(Bit64u*)data);
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return;
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}
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if (len == 4) {
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pageWriteStampTable.decWriteStamp(a20addr, 4);
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WriteHostDWordToLittleEndian((Bit32u*) BX_MEM_THIS get_vector(a20addr), *(Bit32u*)data);
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return;
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}
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if (len == 2) {
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pageWriteStampTable.decWriteStamp(a20addr, 2);
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WriteHostWordToLittleEndian((Bit16u*) BX_MEM_THIS get_vector(a20addr), *(Bit16u*)data);
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return;
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}
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if (len == 1) {
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pageWriteStampTable.decWriteStamp(a20addr, 1);
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* (BX_MEM_THIS get_vector(a20addr)) = * (Bit8u *) data;
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return;
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}
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// len == other, just fall thru to special cases handling
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}
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#ifdef BX_LITTLE_ENDIAN
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data_ptr = (Bit8u *) data;
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#else // BX_BIG_ENDIAN
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data_ptr = (Bit8u *) data + (len - 1);
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#endif
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if (a20addr < 0x000a0000 || a20addr >= 0x00100000)
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{
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// addr *not* in range 000A0000 .. 000FFFFF
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while(1) {
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// Write in chunks of 8 bytes if we can
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if ((len & 7) == 0) {
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pageWriteStampTable.decWriteStamp(a20addr, 8);
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WriteHostQWordToLittleEndian((Bit64u*) BX_MEM_THIS get_vector(a20addr), *(Bit64u*)data_ptr);
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len -= 8;
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a20addr += 8;
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#ifdef BX_LITTLE_ENDIAN
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data_ptr += 8;
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#else
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data_ptr -= 8;
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#endif
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if (len == 0) return;
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} else {
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pageWriteStampTable.decWriteStamp(a20addr, 1);
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*(BX_MEM_THIS get_vector(a20addr)) = *data_ptr;
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if (len == 1) return;
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len--;
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a20addr++;
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#ifdef BX_LITTLE_ENDIAN
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data_ptr++;
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#else // BX_BIG_ENDIAN
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data_ptr--;
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#endif
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}
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}
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}
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pageWriteStampTable.decWriteStamp(a20addr);
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// addr must be in range 000A0000 .. 000FFFFF
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for(unsigned i=0; i<len; i++) {
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// SMMRAM
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if (a20addr < 0x000c0000) {
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// devices are not allowed to access SMMRAM under VGA memory
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if (cpu) {
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*(BX_MEM_THIS get_vector(a20addr)) = *data_ptr;
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}
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goto inc_one;
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}
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// adapter ROM C0000 .. DFFFF
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// ROM BIOS memory E0000 .. FFFFF
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#if BX_SUPPORT_PCI == 0
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// ignore write to ROM
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#else
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// Write Based on 440fx Programming
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if (BX_MEM_THIS pci_enabled && ((a20addr & 0xfffc0000) == 0x000c0000)) {
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unsigned area = (unsigned)(a20addr >> 14) & 0x0f;
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if (area > BX_MEM_AREA_F0000) area = BX_MEM_AREA_F0000;
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if (BX_MEM_THIS memory_type[area][1] == 1) {
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// Writes to ShadowRAM
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BX_DEBUG(("Writing to ShadowRAM: address 0x" FMT_PHY_ADDRX ", data %02x", a20addr, *data_ptr));
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*(BX_MEM_THIS get_vector(a20addr)) = *data_ptr;
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} else if ((area >= BX_MEM_AREA_E0000) && BX_MEM_THIS bios_write_enabled) {
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// volatile BIOS write support
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#ifdef BX_LITTLE_ENDIAN
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data_ptr = (Bit8u *) data;
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#else // BX_BIG_ENDIAN
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data_ptr = (Bit8u *) data + (len - 1);
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#endif
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for (unsigned i = 0; i < len; i++) {
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if (BX_MEM_THIS flash_type > 0) {
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BX_MEM_THIS flash_write(BIOS_MAP_LAST128K(a20addr), *data_ptr);
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} else {
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BX_MEM_THIS rom[BIOS_MAP_LAST128K(a20addr)] = *data_ptr;
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}
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a20addr++;
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#ifdef BX_LITTLE_ENDIAN
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data_ptr++;
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#else // BX_BIG_ENDIAN
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data_ptr--;
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#endif
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}
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} else {
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// Writes to ROM, Inhibit
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BX_DEBUG(("Write to ROM ignored: address 0x" FMT_PHY_ADDRX ", data %02x", a20addr, *data_ptr));
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}
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}
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#endif
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inc_one:
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a20addr++;
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#ifdef BX_LITTLE_ENDIAN
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data_ptr++;
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#else // BX_BIG_ENDIAN
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data_ptr--;
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#endif
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}
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} else if (BX_MEM_THIS bios_write_enabled && is_bios) {
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// volatile BIOS write support
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#ifdef BX_LITTLE_ENDIAN
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data_ptr = (Bit8u *) data;
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#else // BX_BIG_ENDIAN
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data_ptr = (Bit8u *) data + (len - 1);
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#endif
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for (unsigned i = 0; i < len; i++) {
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if (BX_MEM_THIS flash_type > 0) {
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BX_MEM_THIS flash_write(a20addr & BIOS_MASK, *data_ptr);
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} else {
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BX_MEM_THIS rom[a20addr & BIOS_MASK] = *data_ptr;
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}
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a20addr++;
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#ifdef BX_LITTLE_ENDIAN
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data_ptr++;
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#else // BX_BIG_ENDIAN
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data_ptr--;
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#endif
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}
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} else {
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// access outside limits of physical memory, ignore
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BX_DEBUG(("Write outside the limits of physical memory (0x" FMT_PHY_ADDRX ") (ignore)", a20addr));
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}
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}
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void BX_MEM_C::readPhysicalPage(BX_CPU_C *cpu, bx_phy_address addr, unsigned len, void *data)
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{
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Bit8u *data_ptr;
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bx_phy_address a20addr = A20ADDR(addr);
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struct memory_handler_struct *memory_handler = NULL;
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// Note: accesses should always be contained within a single page
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if ((addr>>12) != ((addr+len-1)>>12)) {
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BX_PANIC(("readPhysicalPage: cross page access at address 0x" FMT_PHY_ADDRX ", len=%d", addr, len));
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}
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bool is_bios = (a20addr >= (bx_phy_address)BX_MEM_THIS bios_rom_addr);
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#if BX_PHY_ADDRESS_LONG
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if (a20addr > BX_CONST64(0xffffffff)) is_bios = 0;
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#endif
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if (cpu != NULL) {
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#if BX_SUPPORT_IODEBUG
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bx_devices.pluginIODebug->mem_read(cpu, a20addr, len, data);
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#endif
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if ((a20addr >= 0x000a0000 && a20addr < 0x000c0000) && BX_MEM_THIS smram_available)
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{
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// SMRAM memory space
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if (BX_MEM_THIS smram_enable || (cpu->smm_mode() && !BX_MEM_THIS smram_restricted))
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goto mem_read;
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}
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}
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memory_handler = BX_MEM_THIS memory_handlers[a20addr >> 20];
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while (memory_handler) {
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if (memory_handler->begin <= a20addr &&
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memory_handler->end >= a20addr &&
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memory_handler->read_handler(a20addr, len, data, memory_handler->param))
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{
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return;
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}
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memory_handler = memory_handler->next;
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}
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mem_read:
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if ((a20addr < BX_MEM_THIS len) && !is_bios) {
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// all of data is within limits of physical memory
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if (a20addr < 0x000a0000 || a20addr >= 0x00100000)
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{
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if (len == 8) {
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* (Bit64u*) data = ReadHostQWordFromLittleEndian((Bit64u*) BX_MEM_THIS get_vector(a20addr));
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return;
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}
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if (len == 4) {
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* (Bit32u*) data = ReadHostDWordFromLittleEndian((Bit32u*) BX_MEM_THIS get_vector(a20addr));
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return;
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}
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if (len == 2) {
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* (Bit16u*) data = ReadHostWordFromLittleEndian((Bit16u*) BX_MEM_THIS get_vector(a20addr));
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return;
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}
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if (len == 1) {
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* (Bit8u *) data = * (BX_MEM_THIS get_vector(a20addr));
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return;
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}
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// len == other case can just fall thru to special cases handling
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}
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#ifdef BX_LITTLE_ENDIAN
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data_ptr = (Bit8u *) data;
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#else // BX_BIG_ENDIAN
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data_ptr = (Bit8u *) data + (len - 1);
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#endif
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if (a20addr < 0x000a0000 || a20addr >= 0x00100000)
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{
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// addr *not* in range 000A0000 .. 000FFFFF
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while(1) {
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// Read in chunks of 8 bytes if we can
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if ((len & 7) == 0) {
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*((Bit64u*)data_ptr) = ReadHostQWordFromLittleEndian((Bit64u*) BX_MEM_THIS get_vector(a20addr));
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len -= 8;
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a20addr += 8;
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#ifdef BX_LITTLE_ENDIAN
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data_ptr += 8;
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#else
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data_ptr -= 8;
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#endif
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if (len == 0) return;
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} else {
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*data_ptr = *(BX_MEM_THIS get_vector(a20addr));
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if (len == 1) return;
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len--;
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a20addr++;
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#ifdef BX_LITTLE_ENDIAN
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data_ptr++;
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#else // BX_BIG_ENDIAN
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data_ptr--;
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#endif
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}
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}
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}
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// addr must be in range 000A0000 .. 000FFFFF
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for (unsigned i=0; i<len; i++) {
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// SMMRAM
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if (a20addr < 0x000c0000) {
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// devices are not allowed to access SMMRAM under VGA memory
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if (cpu) *data_ptr = *(BX_MEM_THIS get_vector(a20addr));
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goto inc_one;
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}
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#if BX_SUPPORT_PCI
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if (BX_MEM_THIS pci_enabled && ((a20addr & 0xfffc0000) == 0x000c0000)) {
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unsigned area = (unsigned)(a20addr >> 14) & 0x0f;
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if (area > BX_MEM_AREA_F0000) area = BX_MEM_AREA_F0000;
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if (BX_MEM_THIS memory_type[area][0] == 0) {
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// Read from ROM
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if ((a20addr & 0xfffe0000) == 0x000e0000) {
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// last 128K of BIOS ROM mapped to 0xE0000-0xFFFFF
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if (BX_MEM_THIS flash_type > 0) {
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*data_ptr = BX_MEM_THIS flash_read(BIOS_MAP_LAST128K(a20addr));
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} else {
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*data_ptr = BX_MEM_THIS rom[BIOS_MAP_LAST128K(a20addr)];
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}
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} else {
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*data_ptr = BX_MEM_THIS rom[(a20addr & EXROM_MASK) + BIOSROMSZ];
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}
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} else {
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// Read from ShadowRAM
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*data_ptr = *(BX_MEM_THIS get_vector(a20addr));
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}
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}
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else
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#endif // #if BX_SUPPORT_PCI
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{
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if ((a20addr & 0xfffc0000) != 0x000c0000) {
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*data_ptr = *(BX_MEM_THIS get_vector(a20addr));
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}
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else if ((a20addr & 0xfffe0000) == 0x000e0000) {
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// last 128K of BIOS ROM mapped to 0xE0000-0xFFFFF
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*data_ptr = BX_MEM_THIS rom[BIOS_MAP_LAST128K(a20addr)];
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}
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else {
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*data_ptr = BX_MEM_THIS rom[(a20addr & EXROM_MASK) + BIOSROMSZ];
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}
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}
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inc_one:
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a20addr++;
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#ifdef BX_LITTLE_ENDIAN
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data_ptr++;
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#else // BX_BIG_ENDIAN
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data_ptr--;
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#endif
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}
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}
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else // access outside limits of physical memory
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{
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#if BX_PHY_ADDRESS_LONG
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if (a20addr > BX_CONST64(0xffffffff)) {
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memset(data, 0xFF, len);
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return;
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}
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#endif
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#ifdef BX_LITTLE_ENDIAN
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data_ptr = (Bit8u *) data;
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#else // BX_BIG_ENDIAN
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data_ptr = (Bit8u *) data + (len - 1);
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#endif
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if (is_bios) {
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for (unsigned i = 0; i < len; i++) {
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if (BX_MEM_THIS flash_type > 0) {
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*data_ptr = BX_MEM_THIS flash_read(a20addr & BIOS_MASK);
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} else {
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*data_ptr = BX_MEM_THIS rom[a20addr & BIOS_MASK];
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}
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a20addr++;
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#ifdef BX_LITTLE_ENDIAN
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data_ptr++;
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#else // BX_BIG_ENDIAN
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data_ptr--;
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#endif
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}
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} else {
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// bogus memory
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memset(data, 0xFF, len);
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}
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}
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}
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void BX_MEM_C::dmaReadPhysicalPage(bx_phy_address addr, unsigned len, Bit8u *data)
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{
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// Note: accesses should always be contained within a single page
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if ((addr>>12) != ((addr+len-1)>>12)) {
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BX_PANIC(("dmaReadPhysicalPage: cross page access at address 0x" FMT_PHY_ADDRX ", len=%d", addr, len));
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}
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Bit8u *memptr = getHostMemAddr(NULL, addr, BX_READ);
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if (memptr != NULL) {
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memcpy(data, memptr, len);
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}
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else {
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for (unsigned i=0;i < len; i++) {
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readPhysicalPage(NULL, addr+i, 1, &data[i]);
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}
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}
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}
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void BX_MEM_C::dmaWritePhysicalPage(bx_phy_address addr, unsigned len, Bit8u *data)
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{
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// Note: accesses should always be contained within a single page
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if ((addr>>12) != ((addr+len-1)>>12)) {
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BX_PANIC(("dmaWritePhysicalPage: cross page access at address 0x" FMT_PHY_ADDRX ", len=%d", addr, len));
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}
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Bit8u *memptr = getHostMemAddr(NULL, addr, BX_WRITE);
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if (memptr != NULL) {
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pageWriteStampTable.decWriteStamp(addr);
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memcpy(memptr, data, len);
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}
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else {
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for (unsigned i=0;i < len; i++) {
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writePhysicalPage(NULL, addr+i, 1, &data[i]);
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}
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}
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}
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