551 lines
19 KiB
C++
551 lines
19 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2011-2018 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_AVX
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#include "simd_int.h"
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#include "simd_compare.h"
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#define AVX_2OP(HANDLER, func) \
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/* AVX instruction with two src operands */ \
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void BX_CPP_AttrRegparmN(1) BX_CPU_C :: HANDLER (bxInstruction_c *i) \
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{ \
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BxPackedAvxRegister op1 = BX_READ_AVX_REG(i->src1()), op2 = BX_READ_AVX_REG(i->src2()); \
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unsigned len = i->getVL(); \
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\
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for (unsigned n=0; n < len; n++) \
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(func)(&op1.vmm128(n), &op2.vmm128(n)); \
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\
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BX_WRITE_AVX_REGZ(i->dst(), op1, len); \
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\
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BX_NEXT_INSTR(i); \
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}
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AVX_2OP(VANDPS_VpsHpsWpsR, xmm_andps)
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AVX_2OP(VANDNPS_VpsHpsWpsR, xmm_andnps)
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AVX_2OP(VXORPS_VpsHpsWpsR, xmm_xorps)
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AVX_2OP(VORPS_VpsHpsWpsR, xmm_orps)
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AVX_2OP(VUNPCKLPS_VpsHpsWpsR, xmm_unpcklps)
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AVX_2OP(VUNPCKLPD_VpdHpdWpdR, xmm_unpcklpd)
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AVX_2OP(VUNPCKHPS_VpsHpsWpsR, xmm_unpckhps)
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AVX_2OP(VUNPCKHPD_VpdHpdWpdR, xmm_unpckhpd)
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AVX_2OP(VPADDB_VdqHdqWdqR, xmm_paddb)
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AVX_2OP(VPADDW_VdqHdqWdqR, xmm_paddw)
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AVX_2OP(VPADDD_VdqHdqWdqR, xmm_paddd)
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AVX_2OP(VPADDQ_VdqHdqWdqR, xmm_paddq)
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AVX_2OP(VPSUBB_VdqHdqWdqR, xmm_psubb)
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AVX_2OP(VPSUBW_VdqHdqWdqR, xmm_psubw)
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AVX_2OP(VPSUBD_VdqHdqWdqR, xmm_psubd)
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AVX_2OP(VPSUBQ_VdqHdqWdqR, xmm_psubq)
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AVX_2OP(VPCMPEQB_VdqHdqWdqR, xmm_pcmpeqb)
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AVX_2OP(VPCMPEQW_VdqHdqWdqR, xmm_pcmpeqw)
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AVX_2OP(VPCMPEQD_VdqHdqWdqR, xmm_pcmpeqd)
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AVX_2OP(VPCMPEQQ_VdqHdqWdqR, xmm_pcmpeqq)
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AVX_2OP(VPCMPGTB_VdqHdqWdqR, xmm_pcmpgtb)
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AVX_2OP(VPCMPGTW_VdqHdqWdqR, xmm_pcmpgtw)
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AVX_2OP(VPCMPGTD_VdqHdqWdqR, xmm_pcmpgtd)
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AVX_2OP(VPCMPGTQ_VdqHdqWdqR, xmm_pcmpgtq)
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AVX_2OP(VPMINSB_VdqHdqWdqR, xmm_pminsb)
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AVX_2OP(VPMINSW_VdqHdqWdqR, xmm_pminsw)
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AVX_2OP(VPMINSD_VdqHdqWdqR, xmm_pminsd)
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AVX_2OP(VPMINSQ_VdqHdqWdqR, xmm_pminsq)
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AVX_2OP(VPMINUB_VdqHdqWdqR, xmm_pminub)
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AVX_2OP(VPMINUW_VdqHdqWdqR, xmm_pminuw)
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AVX_2OP(VPMINUD_VdqHdqWdqR, xmm_pminud)
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AVX_2OP(VPMINUQ_VdqHdqWdqR, xmm_pminuq)
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AVX_2OP(VPMAXSB_VdqHdqWdqR, xmm_pmaxsb)
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AVX_2OP(VPMAXSW_VdqHdqWdqR, xmm_pmaxsw)
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AVX_2OP(VPMAXSD_VdqHdqWdqR, xmm_pmaxsd)
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AVX_2OP(VPMAXSQ_VdqHdqWdqR, xmm_pmaxsq)
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AVX_2OP(VPMAXUB_VdqHdqWdqR, xmm_pmaxub)
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AVX_2OP(VPMAXUW_VdqHdqWdqR, xmm_pmaxuw)
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AVX_2OP(VPMAXUD_VdqHdqWdqR, xmm_pmaxud)
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AVX_2OP(VPMAXUQ_VdqHdqWdqR, xmm_pmaxuq)
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AVX_2OP(VPSIGNB_VdqHdqWdqR, xmm_psignb)
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AVX_2OP(VPSIGNW_VdqHdqWdqR, xmm_psignw)
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AVX_2OP(VPSIGND_VdqHdqWdqR, xmm_psignd)
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AVX_2OP(VPSUBSB_VdqHdqWdqR, xmm_psubsb)
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AVX_2OP(VPSUBSW_VdqHdqWdqR, xmm_psubsw)
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AVX_2OP(VPSUBUSB_VdqHdqWdqR, xmm_psubusb)
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AVX_2OP(VPSUBUSW_VdqHdqWdqR, xmm_psubusw)
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AVX_2OP(VPADDSB_VdqHdqWdqR, xmm_paddsb)
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AVX_2OP(VPADDSW_VdqHdqWdqR, xmm_paddsw)
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AVX_2OP(VPADDUSB_VdqHdqWdqR, xmm_paddusb)
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AVX_2OP(VPADDUSW_VdqHdqWdqR, xmm_paddusw)
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AVX_2OP(VPHADDW_VdqHdqWdqR, xmm_phaddw)
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AVX_2OP(VPHADDD_VdqHdqWdqR, xmm_phaddd)
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AVX_2OP(VPHADDSW_VdqHdqWdqR, xmm_phaddsw)
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AVX_2OP(VPHSUBW_VdqHdqWdqR, xmm_phsubw)
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AVX_2OP(VPHSUBD_VdqHdqWdqR, xmm_phsubd)
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AVX_2OP(VPHSUBSW_VdqHdqWdqR, xmm_phsubsw)
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AVX_2OP(VPAVGB_VdqHdqWdqR, xmm_pavgb)
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AVX_2OP(VPAVGW_VdqHdqWdqR, xmm_pavgw)
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AVX_2OP(VPACKUSWB_VdqHdqWdqR, xmm_packuswb)
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AVX_2OP(VPACKSSWB_VdqHdqWdqR, xmm_packsswb)
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AVX_2OP(VPACKUSDW_VdqHdqWdqR, xmm_packusdw)
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AVX_2OP(VPACKSSDW_VdqHdqWdqR, xmm_packssdw)
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AVX_2OP(VPUNPCKLBW_VdqHdqWdqR, xmm_punpcklbw)
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AVX_2OP(VPUNPCKLWD_VdqHdqWdqR, xmm_punpcklwd)
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AVX_2OP(VPUNPCKHBW_VdqHdqWdqR, xmm_punpckhbw)
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AVX_2OP(VPUNPCKHWD_VdqHdqWdqR, xmm_punpckhwd)
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AVX_2OP(VPMULLQ_VdqHdqWdqR, xmm_pmullq)
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AVX_2OP(VPMULLD_VdqHdqWdqR, xmm_pmulld)
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AVX_2OP(VPMULLW_VdqHdqWdqR, xmm_pmullw)
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AVX_2OP(VPMULHW_VdqHdqWdqR, xmm_pmulhw)
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AVX_2OP(VPMULHUW_VdqHdqWdqR, xmm_pmulhuw)
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AVX_2OP(VPMULDQ_VdqHdqWdqR, xmm_pmuldq)
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AVX_2OP(VPMULUDQ_VdqHdqWdqR, xmm_pmuludq)
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AVX_2OP(VPMULHRSW_VdqHdqWdqR, xmm_pmulhrsw)
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AVX_2OP(VPMADDWD_VdqHdqWdqR, xmm_pmaddwd)
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AVX_2OP(VPMADDUBSW_VdqHdqWdqR, xmm_pmaddubsw)
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AVX_2OP(VPSADBW_VdqHdqWdqR, xmm_psadbw)
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AVX_2OP(VPSRAVW_VdqHdqWdqR, xmm_psravw)
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AVX_2OP(VPSRAVD_VdqHdqWdqR, xmm_psravd)
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AVX_2OP(VPSRAVQ_VdqHdqWdqR, xmm_psravq)
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AVX_2OP(VPSLLVW_VdqHdqWdqR, xmm_psllvw)
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AVX_2OP(VPSLLVD_VdqHdqWdqR, xmm_psllvd)
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AVX_2OP(VPSLLVQ_VdqHdqWdqR, xmm_psllvq)
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AVX_2OP(VPSRLVW_VdqHdqWdqR, xmm_psrlvw)
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AVX_2OP(VPSRLVD_VdqHdqWdqR, xmm_psrlvd)
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AVX_2OP(VPSRLVQ_VdqHdqWdqR, xmm_psrlvq)
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AVX_2OP(VPROLVD_VdqHdqWdqR, xmm_prolvd)
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AVX_2OP(VPROLVQ_VdqHdqWdqR, xmm_prolvq)
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AVX_2OP(VPRORVD_VdqHdqWdqR, xmm_prorvd)
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AVX_2OP(VPRORVQ_VdqHdqWdqR, xmm_prorvq)
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#define AVX_1OP(HANDLER, func) \
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/* AVX instruction with single src operand */ \
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void BX_CPP_AttrRegparmN(1) BX_CPU_C :: HANDLER (bxInstruction_c *i) \
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{ \
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BxPackedAvxRegister op = BX_READ_AVX_REG(i->src()); \
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unsigned len = i->getVL(); \
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\
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for (unsigned n=0; n < len; n++) \
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(func)(&op.vmm128(n)); \
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\
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BX_WRITE_AVX_REGZ(i->dst(), op, len); \
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\
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BX_NEXT_INSTR(i); \
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}
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AVX_1OP(VPABSB_VdqWdqR, xmm_pabsb)
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AVX_1OP(VPABSW_VdqWdqR, xmm_pabsw)
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AVX_1OP(VPABSD_VdqWdqR, xmm_pabsd)
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AVX_1OP(VPABSQ_VdqWdqR, xmm_pabsq)
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#define AVX_PSHIFT(HANDLER, func) \
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/* AVX packed shift instruction */ \
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void BX_CPP_AttrRegparmN(1) BX_CPU_C:: HANDLER (bxInstruction_c *i) \
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{ \
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BxPackedAvxRegister op = BX_READ_AVX_REG(i->src1()); \
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Bit64u count = BX_READ_XMM_REG_LO_QWORD(i->src2()); \
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unsigned len = i->getVL(); \
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\
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for (unsigned n=0; n < len; n++) \
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(func)(&op.vmm128(n), count); \
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\
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BX_WRITE_AVX_REGZ(i->dst(), op, len); \
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\
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BX_NEXT_INSTR(i); \
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}
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AVX_PSHIFT(VPSRLW_VdqHdqWdqR, xmm_psrlw);
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AVX_PSHIFT(VPSRLD_VdqHdqWdqR, xmm_psrld);
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AVX_PSHIFT(VPSRLQ_VdqHdqWdqR, xmm_psrlq);
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AVX_PSHIFT(VPSRAW_VdqHdqWdqR, xmm_psraw);
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AVX_PSHIFT(VPSRAD_VdqHdqWdqR, xmm_psrad);
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AVX_PSHIFT(VPSRAQ_VdqHdqWdqR, xmm_psraq);
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AVX_PSHIFT(VPSLLW_VdqHdqWdqR, xmm_psllw);
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AVX_PSHIFT(VPSLLD_VdqHdqWdqR, xmm_pslld);
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AVX_PSHIFT(VPSLLQ_VdqHdqWdqR, xmm_psllq);
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#define AVX_PSHIFT_IMM(HANDLER, func) \
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/* AVX packed shift with imm8 instruction */ \
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void BX_CPP_AttrRegparmN(1) BX_CPU_C:: HANDLER (bxInstruction_c *i) \
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{ \
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BxPackedAvxRegister op = BX_READ_AVX_REG(i->src()); \
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unsigned len = i->getVL(); \
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\
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for (unsigned n=0; n < len; n++) \
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(func)(&op.vmm128(n), i->Ib()); \
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\
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BX_WRITE_AVX_REGZ(i->dst(), op, len); \
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\
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BX_NEXT_INSTR(i); \
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}
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AVX_PSHIFT_IMM(VPSRLW_UdqIb, xmm_psrlw);
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AVX_PSHIFT_IMM(VPSRLD_UdqIb, xmm_psrld);
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AVX_PSHIFT_IMM(VPSRLQ_UdqIb, xmm_psrlq);
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AVX_PSHIFT_IMM(VPSRAW_UdqIb, xmm_psraw);
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AVX_PSHIFT_IMM(VPSRAD_UdqIb, xmm_psrad);
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AVX_PSHIFT_IMM(VPSRAQ_UdqIb, xmm_psraq);
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AVX_PSHIFT_IMM(VPSLLW_UdqIb, xmm_psllw);
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AVX_PSHIFT_IMM(VPSLLD_UdqIb, xmm_pslld);
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AVX_PSHIFT_IMM(VPSLLQ_UdqIb, xmm_psllq);
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AVX_PSHIFT_IMM(VPROLD_UdqIb, xmm_prold);
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AVX_PSHIFT_IMM(VPROLQ_UdqIb, xmm_prolq);
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AVX_PSHIFT_IMM(VPRORD_UdqIb, xmm_prord);
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AVX_PSHIFT_IMM(VPRORQ_UdqIb, xmm_prorq);
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AVX_PSHIFT_IMM(VPSRLDQ_UdqIb, xmm_psrldq);
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AVX_PSHIFT_IMM(VPSLLDQ_UdqIb, xmm_pslldq);
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPSHUFHW_VdqWdqIbR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op = BX_READ_AVX_REG(i->src()), result;
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Bit8u order = i->Ib();
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unsigned len = i->getVL();
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for (unsigned n=0; n < len; n++)
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xmm_pshufhw(&result.vmm128(n), &op.vmm128(n), order);
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BX_WRITE_AVX_REGZ(i->dst(), result, len);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPSHUFLW_VdqWdqIbR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op = BX_READ_AVX_REG(i->src()), result;
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Bit8u order = i->Ib();
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unsigned len = i->getVL();
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for (unsigned n=0; n < len; n++)
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xmm_pshuflw(&result.vmm128(n), &op.vmm128(n), order);
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BX_WRITE_AVX_REGZ(i->dst(), result, len);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPSHUFB_VdqHdqWdqR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op1 = BX_READ_AVX_REG(i->src1());
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BxPackedAvxRegister op2 = BX_READ_AVX_REG(i->src2()), result;
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unsigned len = i->getVL();
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for (unsigned n=0; n < len; n++)
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xmm_pshufb(&result.vmm128(n), &op1.vmm128(n), &op2.vmm128(n));
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BX_WRITE_AVX_REGZ(i->dst(), result, len);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VMPSADBW_VdqHdqWdqIbR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op1 = BX_READ_AVX_REG(i->src1());
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BxPackedAvxRegister op2 = BX_READ_AVX_REG(i->src2()), result;
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Bit8u control = i->Ib();
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unsigned len = i->getVL();
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for (unsigned n=0; n < len; n++) {
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xmm_mpsadbw(&result.vmm128(n), &op1.vmm128(n), &op2.vmm128(n), control & 0x7);
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control >>= 3;
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}
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BX_WRITE_AVX_REGZ(i->dst(), result, len);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBLENDW_VdqHdqWdqIbR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op1 = BX_READ_AVX_REG(i->src1()), op2 = BX_READ_AVX_REG(i->src2());
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unsigned len = i->getVL();
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Bit8u mask = i->Ib();
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for (unsigned n=0; n < len; n++)
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xmm_pblendw(&op1.vmm128(n), &op2.vmm128(n), mask);
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BX_WRITE_AVX_REGZ(i->dst(), op1, len);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTB_VdqWbR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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Bit8u val_8 = BX_READ_XMM_REG_LO_BYTE(i->src());
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for (unsigned n=0; n < len; n++)
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xmm_pbroadcastb(&op.vmm128(n), val_8);
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BX_WRITE_AVX_REGZ(i->dst(), op, len);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTW_VdqWwR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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Bit16u val_16 = BX_READ_XMM_REG_LO_WORD(i->src());
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for (unsigned n=0; n < len; n++)
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xmm_pbroadcastw(&op.vmm128(n), val_16);
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BX_WRITE_AVX_REGZ(i->dst(), op, len);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTD_VdqWdR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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Bit32u val_32 = BX_READ_XMM_REG_LO_DWORD(i->src());
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for (unsigned n=0; n < len; n++)
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xmm_pbroadcastd(&op.vmm128(n), val_32);
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BX_WRITE_AVX_REGZ(i->dst(), op, len);
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BX_NEXT_INSTR(i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPBROADCASTQ_VdqWqR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op;
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unsigned len = i->getVL();
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Bit64u val_64 = BX_READ_XMM_REG_LO_QWORD(i->src());
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|
|
for (unsigned n=0; n < len; n++)
|
|
xmm_pbroadcastq(&op.vmm128(n), val_64);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), op, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMOVSXBW_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedYmmRegister op = BX_READ_YMM_REG(i->src());
|
|
BxPackedAvxRegister result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < WORD_ELEMENTS(len); n++)
|
|
result.vmm16s(n) = (Bit16s) op.ymmsbyte(n);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), result, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMOVSXBD_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
BxPackedAvxRegister result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < DWORD_ELEMENTS(len); n++)
|
|
result.vmm32s(n) = (Bit32s) op.xmmsbyte(n);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), result, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMOVSXBQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
BxPackedAvxRegister result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < QWORD_ELEMENTS(len); n++)
|
|
result.vmm64s(n) = (Bit64s) op.xmmsbyte(n);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), result, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMOVSXWD_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedYmmRegister op = BX_READ_YMM_REG(i->src());
|
|
BxPackedAvxRegister result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < DWORD_ELEMENTS(len); n++)
|
|
result.vmm32s(n) = (Bit32s) op.ymm16s(n);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), result, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMOVSXWQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
BxPackedAvxRegister result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < QWORD_ELEMENTS(len); n++)
|
|
result.vmm64s(n) = (Bit64s) op.xmm16s(n);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), result, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMOVSXDQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedYmmRegister op = BX_READ_YMM_REG(i->src());
|
|
BxPackedAvxRegister result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < QWORD_ELEMENTS(len); n++)
|
|
result.vmm64s(n) = (Bit64s) op.ymm32s(n);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), result, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMOVZXBW_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedYmmRegister op = BX_READ_YMM_REG(i->src());
|
|
BxPackedAvxRegister result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < WORD_ELEMENTS(len); n++)
|
|
result.vmm16u(n) = (Bit16u) op.ymmubyte(n);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), result, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMOVZXBD_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
BxPackedAvxRegister result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < DWORD_ELEMENTS(len); n++)
|
|
result.vmm32u(n) = (Bit32u) op.xmmubyte(n);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), result, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMOVZXBQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
BxPackedAvxRegister result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < QWORD_ELEMENTS(len); n++)
|
|
result.vmm64u(n) = (Bit64u) op.xmmubyte(n);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), result, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMOVZXWD_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedYmmRegister op = BX_READ_YMM_REG(i->src());
|
|
BxPackedAvxRegister result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < DWORD_ELEMENTS(len); n++)
|
|
result.vmm32u(n) = (Bit32u) op.ymm16u(n);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), result, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMOVZXWQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedXmmRegister op = BX_READ_XMM_REG(i->src());
|
|
BxPackedAvxRegister result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < QWORD_ELEMENTS(len); n++)
|
|
result.vmm64u(n) = (Bit64u) op.xmm16u(n);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), result, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPMOVZXDQ_VdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedYmmRegister op = BX_READ_YMM_REG(i->src());
|
|
BxPackedAvxRegister result;
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n < QWORD_ELEMENTS(len); n++)
|
|
result.vmm64u(n) = (Bit64u) op.ymm32u(n);
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), result, len);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPALIGNR_VdqHdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedAvxRegister op1 = BX_READ_AVX_REG(i->src1()), op2 = BX_READ_AVX_REG(i->src2());
|
|
unsigned len = i->getVL();
|
|
|
|
for (unsigned n=0; n<len; n++)
|
|
xmm_palignr(&op2.vmm128(n), &op1.vmm128(n), i->Ib());
|
|
|
|
BX_WRITE_AVX_REGZ(i->dst(), op2, i->getVL());
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPERMD_VdqHdqWdqR(bxInstruction_c *i)
|
|
{
|
|
BxPackedYmmRegister op1 = BX_READ_YMM_REG(i->src1());
|
|
BxPackedYmmRegister op2 = BX_READ_YMM_REG(i->src2()), result;
|
|
|
|
for (unsigned n=0;n < 8;n++)
|
|
result.ymm32u(n) = op2.ymm32u(op1.ymm32u(n) & 0x7);
|
|
|
|
BX_WRITE_YMM_REGZ(i->dst(), result);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::VPERMQ_VdqWdqIbR(bxInstruction_c *i)
|
|
{
|
|
BxPackedYmmRegister op = BX_READ_YMM_REG(i->src()), result;
|
|
|
|
ymm_vpermq(&result, &op, i->Ib());
|
|
|
|
BX_WRITE_YMM_REGZ(i->dst(), result);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
#endif
|