51e03f071d
Small optimization for lazy flags for ADD/ADC/SUB/SBB instructions Enable RETF64 for same privelege level return
131 lines
3.3 KiB
C++
131 lines
3.3 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: data_xfer8.cc,v 1.22 2005-07-21 01:59:05 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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void BX_CPU_C::MOV_RLIb(bxInstruction_c *i)
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{
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BX_READ_8BIT_REGx(i->opcodeReg(),i->extend8bitL()) = i->Ib();
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}
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void BX_CPU_C::MOV_RHIb(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR gen_reg[i->b1() & 0x03].word.byte.rh = i->Ib();
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}
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void BX_CPU_C::MOV_EEbGb(bxInstruction_c *i)
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{
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write_virtual_byte(i->seg(), RMAddr(i), &BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL()));
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}
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void BX_CPU_C::MOV_EGbGb(bxInstruction_c *i)
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{
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Bit8u op2 = BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL());
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), op2);
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}
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void BX_CPU_C::MOV_GbEEb(bxInstruction_c *i)
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{
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read_virtual_byte(i->seg(), RMAddr(i), &BX_READ_8BIT_REGx(i->nnn(),i->extend8bitL()));
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}
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void BX_CPU_C::MOV_GbEGb(bxInstruction_c *i)
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{
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Bit8u op2 = BX_READ_8BIT_REGx(i->rm(),i->extend8bitL());
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BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op2);
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}
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void BX_CPU_C::MOV_ALOb(bxInstruction_c *i)
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{
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read_virtual_byte(i->seg(), i->Id(), &AL);
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}
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void BX_CPU_C::MOV_ObAL(bxInstruction_c *i)
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{
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write_virtual_byte(i->seg(), i->Id(), &AL);
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}
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void BX_CPU_C::MOV_EbIb(bxInstruction_c *i)
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{
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Bit8u op2 = i->Ib();
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if (i->modC0()) {
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), op2);
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}
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else {
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write_virtual_byte(i->seg(), RMAddr(i), &op2);
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}
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}
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void BX_CPU_C::XLAT(bxInstruction_c *i)
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{
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bx_address offset;
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#if BX_SUPPORT_X86_64
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if (i->as64L()) {
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offset = RBX + AL;
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}
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else
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#endif
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if (i->as32L()) {
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offset = EBX + AL;
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}
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else {
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offset = BX + AL;
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}
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if (!BX_NULL_SEG_REG(i->seg())) {
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read_virtual_byte(i->seg(), offset, &AL);
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}
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else {
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read_virtual_byte(BX_SEG_REG_DS, offset, &AL);
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}
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}
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void BX_CPU_C::XCHG_EbGb(bxInstruction_c *i)
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{
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Bit8u op2, op1;
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op2 = BX_READ_8BIT_REGx(i->nnn(), i->extend8bitL());
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/* op1 is a register or memory reference */
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if (i->modC0()) {
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op1 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
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BX_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), op2);
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}
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else {
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/* pointer, segment address pair */
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read_RMW_virtual_byte(i->seg(), RMAddr(i), &op1);
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Write_RMW_virtual_byte(op2);
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}
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BX_WRITE_8BIT_REGx(i->nnn(), i->extend8bitL(), op1);
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}
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