401321d500
If log module name not specified, use device log prefix converted to lower case as the name and simplified setting up some short prefixes.
550 lines
17 KiB
C++
550 lines
17 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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/*
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* PCIDEV: PCI host device mapping
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* Copyright (C) 2003 - Frank Cornelis
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License version 2 as published by the Free Software Foundation.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* Based on pcivga code:
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* Copyright (C) 2002,2003 Mike Nordell
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*/
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// Define BX_PLUGGABLE in files that can be compiled into plugins. For
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// platforms that require a special tag on exported symbols, BX_PLUGGABLE
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// is used to know when we are exporting symbols and when we are importing.
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#define BX_PLUGGABLE
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#include "iodev.h"
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#if BX_SUPPORT_PCI && BX_SUPPORT_PCIDEV
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#include "pcidev.h"
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#include "kernel_pcidev.h"
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#include <sys/ioctl.h>
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#include <signal.h>
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#include <linux/pci.h>
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#define LOG_THIS thePciDevAdapter->
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bx_pcidev_c* thePciDevAdapter = NULL;
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// builtin configuration handling functions
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void pcidev_init_options(void)
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{
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bx_param_c *pci = SIM->get_param("pci");
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bx_list_c *pcidev = new bx_list_c(pci, "pcidev", "Host PCI Device Mapping");
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bx_param_num_c *pcivid = new bx_param_num_c(pcidev,
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"vendor",
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"PCI Vendor ID",
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"The vendor ID of the host PCI device to map",
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0, 0xffff,
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0xffff); // vendor id 0xffff = no pci device present
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pcivid->set_base(16);
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pcivid->set_format("0x%04x");
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pcivid->set_long_format("PCI Vendor ID: 0x%04x");
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bx_param_num_c *pcidid = new bx_param_num_c(pcidev,
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"device",
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"PCI Device ID",
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"The device ID of the host PCI device to map",
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0, 0xffff,
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0x0);
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pcidid->set_base(16);
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pcidid->set_format("0x%04x");
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pcidid->set_long_format("PCI Device ID: 0x%04x");
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pcidev->set_options(pcidev->SHOW_PARENT | pcidev->USE_BOX_TITLE);
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bx_list_c *deplist = ((bx_param_bool_c*)SIM->get_param(BXPN_PCI_ENABLED))->get_dependent_list();
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deplist->add(pcidev);
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deplist->add(pcivid);
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deplist->add(pcidid);
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}
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Bit32s pcidev_options_parser(const char *context, int num_params, char *params[])
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{
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if (!strcmp(params[0], "pcidev")) {
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if (num_params != 3) {
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BX_PANIC(("%s: pcidev directive malformed.", context));
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}
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for (int i = 1; i < num_params; i++) {
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if (!strncmp(params[i], "vendor=", 7)) {
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if ((params[i][7] == '0') && (toupper(params[i][8]) == 'X'))
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SIM->get_param_num(BXPN_PCIDEV_VENDOR)->set(strtoul(¶ms[i][7], NULL, 16));
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else
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SIM->get_param_num(BXPN_PCIDEV_VENDOR)->set(strtoul(¶ms[i][7], NULL, 10));
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} else if (!strncmp(params[i], "device=", 7)) {
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if ((params[i][7] == '0') && (toupper(params[i][8]) == 'X'))
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SIM->get_param_num(BXPN_PCIDEV_DEVICE)->set(strtoul(¶ms[i][7], NULL, 16));
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else
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SIM->get_param_num(BXPN_PCIDEV_DEVICE)->set(strtoul(¶ms[i][7], NULL, 10));
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} else {
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BX_ERROR(("%s: unknown parameter for pcidev ignored.", context));
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}
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}
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} else {
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BX_PANIC(("%s: unknown directive '%s'", context, params[0]));
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}
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return 0;
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}
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Bit32s pcidev_options_save(FILE *fp)
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{
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if (SIM->get_param_num(BXPN_PCIDEV_VENDOR)->get() != 0xffff) {
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fprintf(fp, "pcidev: vendor=0x%04x, device=0x%04x\n",
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SIM->get_param_num(BXPN_PCIDEV_VENDOR)->get(),
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SIM->get_param_num(BXPN_PCIDEV_DEVICE)->get());
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}
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return 0;
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}
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// device plugin entry points
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int libpcidev_LTX_plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *argv[])
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{
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thePciDevAdapter = new bx_pcidev_c();
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BX_REGISTER_DEVICE_DEVMODEL(plugin, type, thePciDevAdapter, BX_PLUGIN_PCIDEV);
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// add new configuration parameter for the config interface
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pcidev_init_options();
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// register add-on option for bochsrc and command line
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SIM->register_addon_option("pcidev", pcidev_options_parser, pcidev_options_save);
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return 0; // Success
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}
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void libpcidev_LTX_plugin_fini(void)
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{
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SIM->unregister_addon_option("pcidev");
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bx_list_c *menu = (bx_list_c*)SIM->get_param("network");
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menu->remove("pcidev");
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delete thePciDevAdapter;
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}
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// the device object
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bx_pcidev_c::bx_pcidev_c()
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{
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put("PCIDEV");
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}
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bx_pcidev_c::~bx_pcidev_c()
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{
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BX_DEBUG(("Exit"));
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}
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static void pcidev_sighandler(int param)
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{
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bx_pcidev_c *pcidev = thePciDevAdapter;
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BX_INFO(("Interrupt received."));
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DEV_pci_set_irq(pcidev->devfunc, pcidev->intpin, 0);
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/*
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* We need to first lower the IRQ line or else we don't
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* get any IRQs through
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*/
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DEV_pci_set_irq(pcidev->devfunc, pcidev->intpin, 1);
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}
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static bx_bool pcidev_mem_read_handler(bx_phy_address addr, unsigned len, void *data, void *param)
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{
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struct region_struct *region = (struct region_struct *)param;
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bx_pcidev_c *pcidev = region->pcidev;
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int fd = pcidev->pcidev_fd;
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int ret = -1;
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if (fd == -1)
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return false; /* we failed to handle the request, so let a default handler do it for us */
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BX_INFO(("Reading I/O memory at 0x%08x", (unsigned)addr));
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struct pcidev_io_struct io;
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io.address = addr + region->host_start - region->start;
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switch(len) {
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case 1:
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ret = ioctl(fd, PCIDEV_IOCTL_READ_MEM_BYTE, &io);
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*(Bit8u *)data = io.value;
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break;
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case 2:
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ret = ioctl(fd, PCIDEV_IOCTL_READ_MEM_WORD, &io);
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*(Bit16u *)data = io.value;
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break;
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case 4:
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ret = ioctl(fd, PCIDEV_IOCTL_READ_MEM_DWORD, &io);
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*(Bit32u *)data = io.value;
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break;
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default:
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BX_ERROR(("Unsupported pcidev read mem operation"));
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break;
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}
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if (ret == -1) {
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BX_ERROR(("pcidev read mem error"));
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}
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return true; // ok, we handled the request
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}
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static bx_bool pcidev_mem_write_handler(bx_phy_address addr, unsigned len, void *data, void *param)
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{
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struct region_struct *region = (struct region_struct *)param;
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bx_pcidev_c *pcidev = region->pcidev;
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int fd = pcidev->pcidev_fd;
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int ret = -1;
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if (fd == -1)
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return false; /* we failed to handle the request, so let a default handler do it for us */
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BX_INFO(("Writing I/O memory at 0x%08x", (unsigned)addr));
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struct pcidev_io_struct io;
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io.address = addr + region->host_start - region->start;
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switch(len) {
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case 1:
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io.value = *(Bit8u *)data;
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ret = ioctl(fd, PCIDEV_IOCTL_WRITE_MEM_BYTE, &io);
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break;
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case 2:
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io.value = *(Bit16u *)data;
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ret = ioctl(fd, PCIDEV_IOCTL_WRITE_MEM_WORD, &io);
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break;
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case 4:
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io.value = *(Bit32u *)data;
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ret = ioctl(fd, PCIDEV_IOCTL_WRITE_MEM_DWORD, &io);
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break;
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default:
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BX_ERROR(("Unsupported pcidev write mem operation"));
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break;
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}
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if (ret == -1) {
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BX_ERROR(("pcidev write mem error"));
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}
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return true;
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}
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static const char * const pcidev_name = "Experimental PCI 2 host PCI";
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void bx_pcidev_c::init(void)
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{
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// Check if the device is disabled or not configured
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if (SIM->get_param_num(BXPN_PCIDEV_VENDOR)->get() == 0xffff) {
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BX_INFO(("Host PCI device mapping disabled"));
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BX_UNREGISTER_DEVICE_DEVMODEL("pcidev");
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return;
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}
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BX_PCIDEV_THIS pcidev_fd = -1;
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int fd;
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fd = open("/dev/pcidev", O_RDWR);
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if (fd == -1) {
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switch(errno) {
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case ENODEV:
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BX_PANIC(("The pcidev kernel module is not loaded!"));
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break;
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default:
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BX_PANIC(("open /dev/pcidev: %s", strerror(errno)));
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break;
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}
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return;
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}
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BX_PCIDEV_THIS pcidev_fd = fd;
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struct pcidev_find_struct find;
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unsigned short vendor = SIM->get_param_num(BXPN_PCIDEV_VENDOR)->get();
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unsigned short device = SIM->get_param_num(BXPN_PCIDEV_DEVICE)->get();
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find.deviceID = device;
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find.vendorID = vendor;
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if (ioctl(fd, PCIDEV_IOCTL_FIND, &find) == -1) {
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switch (errno) {
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case ENOENT:
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BX_PANIC(("PCI device not found on host system."));
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break;
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case EBUSY:
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BX_PANIC(("PCI device already used by another kernel module."));
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break;
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default:
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perror("ioctl");
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break;
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}
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close(fd);
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BX_PCIDEV_THIS pcidev_fd = -1;
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return;
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}
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BX_INFO(("vendor: %04x; device: %04x @ host %04x:%04x.%d", vendor, device,
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(unsigned)find.bus, (unsigned)find.device, (unsigned)find.func));
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BX_PCIDEV_THIS devfunc = 0x00;
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DEV_register_pci_handlers(this, &BX_PCIDEV_THIS devfunc, BX_PLUGIN_PCIDEV,
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pcidev_name);
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BX_PCIDEV_THIS irq = 0;
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struct pcidev_io_struct io;
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io.address = 0x3d;
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int ret = ioctl(fd, PCIDEV_IOCTL_READ_CONFIG_BYTE, &io);
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if (ret != -1) {
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BX_PCIDEV_THIS intpin = io.value;
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} else {
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BX_PCIDEV_THIS intpin = 0;
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}
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for (int idx = 0; idx < PCIDEV_COUNT_RESOURCES; idx++) {
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BX_PCIDEV_THIS regions[idx].start = 0; // emulated device not yet initialized
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if (!find.resources[idx].start)
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continue;
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BX_INFO(("PCI resource @ %x-%x (%s)", (unsigned)find.resources[idx].start,
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(unsigned)find.resources[idx].end,
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(find.resources[idx].flags & PCIDEV_RESOURCE_IO ? "I/O" : "Mem")));
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BX_PCIDEV_THIS regions[idx].size = find.resources[idx].end - find.resources[idx].start + 1;
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BX_PCIDEV_THIS regions[idx].host_start = find.resources[idx].start;
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struct pcidev_io_struct io;
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io.address = PCI_BASE_ADDRESS_0 + idx * 4;
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if (ioctl(fd, PCIDEV_IOCTL_READ_CONFIG_DWORD, &io) == -1)
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BX_ERROR(("Error reading a base address config reg"));
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BX_PCIDEV_THIS regions[idx].config_value = io.value;
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/*
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* We will use ®ion[idx] as parameter for our I/O or memory
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* handler. So we provide a pcidev pointer to the pcidev object
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* in order for the handle to be able to use its pcidev object
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*/
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BX_PCIDEV_THIS regions[idx].pcidev = this;
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}
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struct sigaction sa;
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sa.sa_handler = pcidev_sighandler;
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sigemptyset(&sa.sa_mask);
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sa.sa_flags = 0;
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sigaction(SIGUSR1, &sa, NULL);
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/*
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* The kernel pcidev will fire SIGUSR1 signals when it receives
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* interrupts from the host PCI device.
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*/
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ioctl(fd, PCIDEV_IOCTL_INTERRUPT, 1);
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}
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void bx_pcidev_c::reset(unsigned type) { }
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// pci configuration space read callback handler
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Bit32u bx_pcidev_c::pci_read_handler(Bit8u address, unsigned io_len)
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{
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int ret = -1;
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int fd = BX_PCIDEV_THIS pcidev_fd;
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if (fd == -1)
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return 0xffffffff;
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struct pcidev_io_struct io;
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io.address = address;
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switch(io_len) {
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case 1:
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ret = ioctl(fd, PCIDEV_IOCTL_READ_CONFIG_BYTE, &io);
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break;
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case 2:
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ret = ioctl(fd, PCIDEV_IOCTL_READ_CONFIG_WORD, &io);
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break;
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case 4:
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ret = ioctl(fd, PCIDEV_IOCTL_READ_CONFIG_DWORD, &io);
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break;
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}
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if (ret == -1)
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BX_ERROR(("pcidev config read error"));
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// we don't use the host irq line but our own bochs irq line
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if (address == PCI_INTERRUPT_LINE) {
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io.value = (io.value & 0xffffff00) | (BX_PCIDEV_THIS irq & 0xff);
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}
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if (PCI_BASE_ADDRESS_0 <= address && address <= PCI_BASE_ADDRESS_5) {
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BX_INFO(("Reading pcidev base address #%d", (address - PCI_BASE_ADDRESS_0) / 4));
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io.value = BX_PCIDEV_THIS regions[(address - PCI_BASE_ADDRESS_0) >> 2].config_value;
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if (address & 3) {
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io.value >>= (8 * (address & 3));
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}
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}
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return io.value;
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}
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// pci configuration space write callback handler
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void bx_pcidev_c::pci_write_handler(Bit8u address, Bit32u value, unsigned io_len)
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{
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int ret = -1;
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Bit8u *iomask;
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Bit32u bitmask;
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int fd = BX_PCIDEV_THIS pcidev_fd;
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if (fd == -1)
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return;
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// we do a host 2 guest irq line mapping
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if (address == PCI_INTERRUPT_LINE) {
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value &= 0xff;
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BX_INFO(("Changing the pcidev irq line from %d to %d", BX_PCIDEV_THIS irq, value));
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BX_PCIDEV_THIS irq = value;
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return;
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}
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if ((PCI_BASE_ADDRESS_0 <= address) && (address <= PCI_BASE_ADDRESS_5)) {
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/*
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* Two things to do here:
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* - update the cached config space value via a probe
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* - remap the I/O or memory handler if required
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*/
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int io_reg_idx = (address - PCI_BASE_ADDRESS_0) >> 2;
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switch (io_len) {
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case 1: bitmask = 0xff; break;
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case 2: bitmask = 0xffff; break;
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default: bitmask = 0xffffffff;
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}
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bitmask <<= (8 * (address & 3));
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value <<= (8 * (address & 3));
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value |= BX_PCIDEV_THIS regions[io_reg_idx].config_value & ~bitmask;
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BX_INFO(("Changing pcidev base address #%d - New value: %#x",
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(address - PCI_BASE_ADDRESS_0) / 4, value));
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struct pcidev_io_struct io;
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io.address = address;
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io.value = value;
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ret = ioctl(fd, PCIDEV_IOCTL_PROBE_CONFIG_DWORD, &io);
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if (ret == -1) {
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BX_ERROR(("Error probing a base address reg!"));
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return;
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}
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unsigned long base = io.value;
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BX_PCIDEV_THIS regions[io_reg_idx].config_value = base;
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/* remap the I/O or memory handler if required using io.value
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* We assume that an I/O memory region will stay and I/O memory
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* region. And that an I/O port region also will stay an I/O port
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* region.
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*/
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if ((base & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) {
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if (DEV_pci_set_base_mem(&(BX_PCIDEV_THIS regions[io_reg_idx]),
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pcidev_mem_read_handler,
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pcidev_mem_write_handler,
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&BX_PCIDEV_THIS regions[io_reg_idx].start,
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(Bit8u*)&BX_PCIDEV_THIS regions[io_reg_idx].config_value,
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BX_PCIDEV_THIS regions[io_reg_idx].size)) {
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BX_INFO(("new base #%d memory address: 0x%08x", io_reg_idx,
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BX_PCIDEV_THIS regions[io_reg_idx].start));
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}
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} else {
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/*
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* Remap our I/O port handlers here.
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*/
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iomask = (Bit8u*)malloc(BX_PCIDEV_THIS regions[io_reg_idx].size);
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memset(iomask, 7, BX_PCIDEV_THIS regions[io_reg_idx].size);
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if (DEV_pci_set_base_io(&(BX_PCIDEV_THIS regions[io_reg_idx]),
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read_handler, write_handler,
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&BX_PCIDEV_THIS regions[io_reg_idx].start,
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(Bit8u*)&BX_PCIDEV_THIS regions[io_reg_idx].config_value,
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BX_PCIDEV_THIS regions[io_reg_idx].size, iomask, "pcidev")) {
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BX_INFO(("new base #%d i/o address: 0x%04x", io_reg_idx,
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(Bit16u)BX_PCIDEV_THIS regions[io_reg_idx].start));
|
|
}
|
|
free(iomask);
|
|
}
|
|
return;
|
|
}
|
|
|
|
struct pcidev_io_struct io;
|
|
io.address = address;
|
|
io.value = value;
|
|
|
|
switch(io_len) {
|
|
case 1:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_WRITE_CONFIG_BYTE, &io);
|
|
break;
|
|
case 2:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_WRITE_CONFIG_WORD, &io);
|
|
break;
|
|
case 4:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_WRITE_CONFIG_DWORD, &io);
|
|
break;
|
|
}
|
|
if (ret == -1)
|
|
BX_ERROR(("pcidev config write error"));
|
|
}
|
|
|
|
Bit32u bx_pcidev_c::read_handler(void *param, Bit32u address, unsigned io_len)
|
|
{
|
|
#if !BX_USE_PCIDEV_SMF
|
|
bx_pcidev_c *class_ptr = ((struct region_struct *)param)->pcidev;
|
|
return class_ptr->read(param, address, io_len);
|
|
}
|
|
|
|
Bit32u bx_pcidev_c::read(void *param, Bit32u address, unsigned io_len)
|
|
{
|
|
#endif
|
|
struct region_struct *region = (struct region_struct *)param;
|
|
int ret = -1;
|
|
|
|
int fd = BX_PCIDEV_THIS pcidev_fd;
|
|
if (fd == -1)
|
|
return 0xffffffff;
|
|
|
|
struct pcidev_io_struct io;
|
|
// here we map the io address
|
|
io.address = address + region->host_start - region->start;
|
|
switch(io_len) {
|
|
case 1:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_READ_IO_BYTE, &io);
|
|
break;
|
|
case 2:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_READ_IO_WORD, &io);
|
|
break;
|
|
case 4:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_READ_IO_DWORD, &io);
|
|
break;
|
|
}
|
|
if (ret == -1) {
|
|
BX_ERROR(("pcidev read I/O error"));
|
|
io.value = 0xffffffff;
|
|
}
|
|
|
|
return io.value;
|
|
}
|
|
|
|
void bx_pcidev_c::write_handler(void *param, Bit32u address, Bit32u value, unsigned io_len)
|
|
{
|
|
#if !BX_USE_PCIDEV_SMF
|
|
bx_pcidev_c *class_ptr = ((struct region_struct *)param)->pcidev;
|
|
class_ptr->write(param, address, value, io_len);
|
|
}
|
|
|
|
void bx_pcidev_c::write(void *param, Bit32u address, Bit32u value, unsigned io_len)
|
|
{
|
|
#endif
|
|
struct region_struct *region = (struct region_struct *)param;
|
|
int ret = -1;
|
|
|
|
int fd = BX_PCIDEV_THIS pcidev_fd;
|
|
if (fd == -1)
|
|
return;
|
|
|
|
struct pcidev_io_struct io;
|
|
// here we map the I/O address
|
|
io.address = address + region->host_start - region->start;
|
|
io.value = value;
|
|
|
|
switch(io_len) {
|
|
case 1:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_WRITE_IO_BYTE, &io);
|
|
break;
|
|
case 2:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_WRITE_IO_WORD, &io);
|
|
break;
|
|
case 4:
|
|
ret = ioctl(fd, PCIDEV_IOCTL_WRITE_IO_DWORD, &io);
|
|
break;
|
|
}
|
|
if (ret == -1)
|
|
BX_ERROR(("pcidev I/O write error"));
|
|
}
|
|
|
|
#endif // BX_SUPPORT_PCI && BX_SUPPORT_PCIDEV
|