557976bee1
This is the start of the Experimental USB Debugger (currently for the Windows platform only). Currently only supports the UHCI and xHCI controllers. The remaining function of these two controllers and the two remaining controllers are in the works and will be added to when time allows. The User.dbk has been updated with (temporary) html files at https://www.fysnet.net/bochs/user/index.html showing the process to invoke and use the USB debugger (Section 5.8). In its completion, this debugger will allow you to view and modify most aspects of the specified USB controller. For example, currently you can view and modify a TRB listed in the xHCI's Command or Event Ring. Other aspects will be added. I do not use and am not fluent in the use of `configure`, `configure.ac`, and associated configuration files. I also don't use the `gui/Makefile.in` file. Someone that is more fluent in the way these files work, please add the necessary items to successfully compile this PR. --------- Co-authored-by: Shwartsman <stanislav.shwartsman@intel.com>
346 lines
14 KiB
C
346 lines
14 KiB
C
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#define USB_DEBUG_UHCI_DLG 3900
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#define USB_DEBUG_OHCI_DLG 3901
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#define USB_DEBUG_EHCI_DLG 3902
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#define USB_DEBUG_XHCI_DLG 3903
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#define USB_DEBUG_UHCI_DLG_QUEUE 4000
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#define USB_DEBUG_UHCI_DLG_TD 4001
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#define USB_DEBUG_DLG_DUMP 4010
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#define USB_DEBUG_XHCI_DLG_NORM_TRB 4104
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#define USB_DEBUG_XHCI_DLG_SETUP_TRB 4105
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#define USB_DEBUG_XHCI_DLG_DATA_TRB 4106
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#define USB_DEBUG_XHCI_DLG_STATUS_TRB 4107
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#define USB_DEBUG_XHCI_DLG_LINK_TRB 4108
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#define USB_DEBUG_XHCI_DLG_EVENT_TRB 4109
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#define USB_DEBUG_XHCI_DLG_NOOP_TRB 4110
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#define USB_DEBUG_XHCI_DLG_ENSLOT_TRB 4111
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#define USB_DEBUG_XHCI_DLG_DISSLOT_TRB 4112
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#define USB_DEBUG_XHCI_DLG_ADDRESS_TRB 4113
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#define USB_DEBUG_XHCI_DLG_CONFIGEP_TRB 4114
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#define USB_DEBUG_XHCI_DLG_EVALUATE_TRB 4115
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#define USB_DEBUG_XHCI_DLG_RESETEP_TRB 4116
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#define USB_DEBUG_XHCI_DLG_STOPEP_TRB 4117
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#define USB_DEBUG_XHCI_DLG_SETTRPTR_TRB 4118
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#define USB_DEBUG_XHCI_DLG_RESETDEV_TRB 4119
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#define USB_DEBUG_XHCI_DLG_FORCE_TRB 4120
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#define USB_DEBUG_XHCI_DLG_SETLAT_TRB 4121
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#define USB_DEBUG_XHCI_DLG_GETBAND_TRB 4122
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#define USB_DEBUG_XHCI_DLG_FORCEHDR_TRB 4123
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#define USB_DEBUG_XHCI_DLG_TRANSEVENT_TRB 4124
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#define USB_DEBUG_XHCI_DLG_CMNDCOMP_TRB 4125
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#define USB_DEBUG_XHCI_DLG_PSCHANGE_TRB 4126
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#define USB_DEBUG_XHCI_DLG_BANDREQU_TRB 4127
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#define USB_DEBUG_XHCI_DLG_DOORBELL_TRB 4128
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#define USB_DEBUG_XHCI_DLG_HOSTEVENT_TRB 4129
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#define USB_DEBUG_XHCI_DLG_DEVNOTEVENT_TRB 4130
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#define USB_DEBUG_XHCI_DLG_NECFW_TRB 4140
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#define USB_DEBUG_XHCI_DLG_NECUN_TRB 4141
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#define USB_DEBUG_XHCI_DLG_NECFWEVENT_TRB 4142
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#define IDD_ATTRIBUTE 4150
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#define USB_DEBUG_XHCI_DLG_CONTEXT 4151
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#define USB_DEBUG_XHCI_DLG_STR_CONTEXT 4152
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#define IDC_LIST 4160
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#define IDC_CAPTION 4161
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#define IDC_DUMP 4162
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// common to all for HCs
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#define ID_QUIT_EMU 4200
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#define ID_CONTINUE_EMU 4201
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#define IDC_PORT_ADDR 4202
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#define IDC_FRAME_ADDRESS 4203
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#define ID_APPLY 4204
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#define IDC_STACK 4205
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#define IDC_TREE_COMMENT 4206
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#define IDC_STATIC -1
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// UHCI items start with 5000
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// (items that we want to trigger an EN_CHANGE must start with 5000
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// and end in 5020)
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#define IDC_U_EN_START 5000
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#define IDC_U_REG_COMMAND 5000
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#define IDC_U_REG_STATUS 5001
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#define IDC_U_REG_INTERRUPT 5002
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#define IDC_U_REG_FRAME_NUM 5003
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#define IDC_U_REG_FRAME_ADDRESS 5004
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#define IDC_U_REG_SOF 5005
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#define IDC_U_REG_PORT0 5006
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#define IDC_U_REG_PORT1 5007
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#define IDC_U_EN_END 5020
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#define IDC_U_REG_COMMAND_B 5100
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#define IDC_U_REG_STATUS_B 5101
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#define IDC_U_REG_INTERRUPT_B 5102
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#define IDC_U_REG_PORT0_B 5103
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#define IDC_U_REG_PORT1_B 5104
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#define IDC_U_REG_PORT0_TYPE 5140
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#define IDC_U_REG_PORT1_TYPE 5141
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#define IDC_HORZ_PTR 5200
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#define IDC_HORZ_T 5201
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#define IDC_HORZ_Q 5202
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#define IDC_VERT_PTR 5203
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#define IDC_VERT_T 5204
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#define IDC_VERT_Q 5205
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#define IDC_VERT_VF 5206
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#define IDC_LINK_PTR 5210
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#define IDC_LINK_T 5211
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#define IDC_LINK_Q 5212
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#define IDC_LINK_VF 5213
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#define IDC_STATUS_LS 5214
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#define IDC_ACTUAL_LEN 5215
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#define IDC_STATUS_NAK 5216
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#define IDC_STATUS_CRC 5217
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#define IDC_STATUS_BITSTUFF 5218
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#define IDC_STATUS_RSVD 5219
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#define IDC_STATUS_ACTIVE 5220
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#define IDC_STATUS_STALLED 5221
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#define IDC_STATUS_DATA_BUFF_ERR 5222
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#define IDC_STATUS_BABBLE 5223
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#define IDC_STATUS_SPD 5224
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#define IDC_STATUS_IOC 5225
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#define IDC_STATUS_ISO 5226
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#define IDC_STATUS_CERR 5227
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#define IDC_DEVICE_ADDR 5228
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#define IDC_DEVICE_EP 5229
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#define IDC_DEVICE_MAXLEN 5230
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#define IDC_DEVICE_TOGGLE 5231
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#define IDC_DEVICE_BUFFER 5232
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#define IDC_COMBO_PID 5233
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#define IDC_DUMP_BUFFER 5234
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// OHCI items start with 6000
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// EHCI items start with 7000
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// xHCI items start with 8000
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// (items that we want to trigger an EN_CHANGE must start with 8000
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// and end in 8019)
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#define IDC_X_EN_START 8000
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#define IDC_X_REG_CAPLENGTH 8000
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#define IDC_X_REG_HCSPARAMS1 8001
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#define IDC_X_REG_HCSPARAMS2 8002
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#define IDC_X_REG_HCSPARAMS3 8003
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#define IDC_X_REG_HCCPARAMS1 8004
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#define IDC_X_REG_DBOFF 8005
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#define IDC_X_REG_RTSOFF 8006
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#define IDC_X_REG_HCCPARAMS2 8007
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#define IDC_X_REG_COMMAND 8008
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#define IDC_X_REG_STATUS 8009
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#define IDC_X_REG_PAGESIZE 8010
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#define IDC_X_REG_DEVICE_NOTE 8011
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#define IDC_X_REG_COMMAND_RING 8012
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#define IDC_X_REG_DEV_CONTEXT_BASE 8013
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#define IDC_X_REG_CONFIGURE 8014
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#define IDC_X_REG_PORT0 8015
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#define IDC_X_REG_PORT1 8016
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#define IDC_X_REG_PORT2 8017
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#define IDC_X_REG_PORT3 8018
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#define IDC_X_REG_PORT4 8019
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#define IDC_X_REG_PORT5 8020
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#define IDC_X_REG_PORT6 8021
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#define IDC_X_REG_PORT7 8022
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#define IDC_X_REG_PORT8 8023
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#define IDC_X_REG_PORT9 8024
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#define IDC_X_REG_MFINDEX 8025
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#define IDC_X_EN_END 8025
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#define IDC_X_REG_EPORT0 8040
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#define IDC_X_REG_EPORT1 8041
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#define IDC_X_REG_EPORT2 8042
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#define IDC_X_REG_EPORT3 8043
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#define IDC_X_REG_EPORT4 8044
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#define IDC_X_REG_EPORT5 8045
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#define IDC_X_REG_EPORT6 8046
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#define IDC_X_REG_EPORT7 8047
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#define IDC_X_REG_EPORT8 8048
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#define IDC_X_REG_EPORT9 8049
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#define IDC_X_REG_PORT0_B 8050
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#define IDC_X_REG_PORT1_B 8051
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#define IDC_X_REG_PORT2_B 8052
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#define IDC_X_REG_PORT3_B 8053
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#define IDC_X_REG_PORT4_B 8054
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#define IDC_X_REG_PORT5_B 8055
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#define IDC_X_REG_PORT6_B 8056
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#define IDC_X_REG_PORT7_B 8057
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#define IDC_X_REG_PORT8_B 8058
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#define IDC_X_REG_PORT9_B 8059
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#define IDC_X_REG_PORT0_TYPE 8060
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#define IDC_X_REG_PORT1_TYPE 8061
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#define IDC_X_REG_PORT2_TYPE 8062
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#define IDC_X_REG_PORT3_TYPE 8063
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#define IDC_X_REG_PORT4_TYPE 8064
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#define IDC_X_REG_PORT5_TYPE 8065
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#define IDC_X_REG_PORT6_TYPE 8066
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#define IDC_X_REG_PORT7_TYPE 8067
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#define IDC_X_REG_PORT8_TYPE 8068
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#define IDC_X_REG_PORT9_TYPE 8069
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#define IDC_X_REG_PORT0_ETYPE 8070
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#define IDC_X_REG_PORT1_ETYPE 8071
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#define IDC_X_REG_PORT2_ETYPE 8072
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#define IDC_X_REG_PORT3_ETYPE 8073
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#define IDC_X_REG_PORT4_ETYPE 8074
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#define IDC_X_REG_PORT5_ETYPE 8075
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#define IDC_X_REG_PORT6_ETYPE 8076
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#define IDC_X_REG_PORT7_ETYPE 8077
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#define IDC_X_REG_PORT8_ETYPE 8078
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#define IDC_X_REG_PORT9_ETYPE 8079
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#define IDC_VIEW_TRB 8080
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#define IDC_VIEW_TD 8080
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#define IDC_DEBUG_RESET 8081
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#define IDC_DEBUG_ENABLE 8082
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#define IDC_DEBUG_DOORBELL 8083
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#define IDC_DEBUG_EVENT 8084
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#define IDC_DEBUG_SOF 8085
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#define IDC_DEBUG_NONEXIST 8086
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#define IDC_TRB_DATA_PTR 8100
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#define IDC_TRB_INT_TARGET 8101
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#define IDC_TRB_TD_SIZE 8102
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#define IDC_TRB_TRANS_LEN 8103
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#define IDC_TRB_TYPE 8104
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#define IDC_TRB_BEI 8105
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#define IDC_TRB_IDT 8106
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#define IDC_TRB_IOC 8107
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#define IDC_TRB_CH 8108
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#define IDC_TRB_NS 8109
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#define IDC_TRB_ISP 8110
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#define IDC_TRB_ENT 8111
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#define IDC_TRB_C 8112
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#define IDC_TRB_WVALUE 8120
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#define IDC_TRB_BREQUEST 8121
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#define IDC_TRB_BREQUESTTYPE 8122
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#define IDC_TRB_WLENGTH 8123
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#define IDC_TRB_WINDEX 8124
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#define IDC_TRB_TRT 8125
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#define IDC_TRB_DIR 8126
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#define IDC_TRB_TC 8127
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#define IDC_TRB_SLOT_TYPE 8128
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#define IDC_TRB_SLOT_ID 8129
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#define IDC_TRB_BSR 8130
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#define IDC_TRB_DECONFIG 8131
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#define IDC_TRB_EP_ID 8132
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#define IDC_TRB_TSP 8133
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#define IDC_TRB_SP 8134
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#define IDC_TRB_STREAMID 8135
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#define IDC_TRB_VF_ID 8136
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#define IDC_TRB_BELT 8137
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#define IDC_TRB_DEV_SPEED 8138
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#define IDC_TRB_SCT 8139
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#define IDC_TRB_DCS 8140
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#define IDC_TRB_HDR_HI 8141
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#define IDC_TRB_FTYPE 8142
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#define IDC_TRB_COMP_CODE 8143
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#define IDC_TRB_ED 8144
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#define IDC_TRB_COMP_LPARAM 8145
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#define IDC_TRB_COMP_HPARAM 8146
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#define IDC_TRB_NOT_TYPE 8147
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#define IDC_RING_TYPE 8148
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#define IDC_IN_CONTEXT 8149
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// context structure
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#define IDC_CONTEXT_NEXT 8200
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#define IDC_CONTEXT_PREV 8201
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#define IDC_CONTEXT_DROP 8202
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#define IDC_CONTEXT_DROP_B 8203
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#define IDC_CONTEXT_ADD 8204
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#define IDC_CONTEXT_ADD_B 8205
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#define IDC_CONTEXT_ALT_SETTING 8206
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#define IDC_CONTEXT_INTFACE_NUM 8207
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#define IDC_CONTEXT_CONFIG_VALUE 8208
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#define IDC_CONTEXT_OF_STR 8209
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#define IDC_CONTEXT_STREAM_CONTEXT 8210
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#define IDC_CONTEXT_ENTRIES 8220
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#define IDC_CONTEXT_HUB 8221
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#define IDC_CONTEXT_MTT 8222
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#define IDC_CONTEXT_SPEED 8223
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#define IDC_CONTEXT_ROUTE_STRING 8224
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#define IDC_CONTEXT_NUM_PORTS 8225
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#define IDC_CONTEXT_RH_PORT_NUM 8226
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#define IDC_CONTEXT_MAX_EXIT_LAT 8227
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#define IDC_CONTEXT_INT_TARGET 8228
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#define IDC_CONTEXT_TTT 8229
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#define IDC_CONTEXT_TT_PORT_NUM 8230
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#define IDC_CONTEXT_TT_HUB_SLOT_ID 8231
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#define IDC_CONTEXT_SLOT_STATE 8232
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#define IDC_CONTEXT_DEV_ADDRESS 8233
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#define IDC_CONTEXT_RSVDO_SLOT_0 8234
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#define IDC_CONTEXT_RSVDO_SLOT_1 8235
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#define IDC_CONTEXT_RSVDO_SLOT_2 8236
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#define IDC_CONTEXT_RSVDO_SLOT_3 8237
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#define IDC_CONTEXT_RSVDO_SLOT_4 8238
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#define IDC_CONTEXT_RSVDO_SLOT_5 8239
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#define IDC_CONTEXT_RSVDO_SLOT_6 8240
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#define IDC_CONTEXT_RSVDO_SLOT_7 8241
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#define IDC_CONTEXT_RSVDO_SLOT_8 8242
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#define IDC_CONTEXT_RSVDO_SLOT_9 8243
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#define IDC_CONTEXT_RSVDO_SLOT_10 8244
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#define IDC_CONTEXT_RSVDO_SLOT_11 8245
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#define IDC_CONTEXT_SPEED_STR 8246
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#define IDC_CONTEXT_SLOT_STATE_STR 8247
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#define IDC_CONTEXT_MAX_ESIT_HI 8260
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#define IDC_CONTEXT_INTERVAL 8261
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#define IDC_CONTEXT_LSA 8262
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#define IDC_CONTEXT_MAX_PSTREAMS 8263
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#define IDC_CONTEXT_MULT 8264
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#define IDC_CONTEXT_EP_STATE 8265
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#define IDC_CONTEXT_MAX_PACKET_SIZE 8266
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#define IDC_CONTEXT_MAX_BURST_SIZE 8267
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#define IDC_CONTEXT_HID 8268
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#define IDC_CONTEXT_EP_TYPE 8269
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#define IDC_CONTEXT_CERR 8270
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#define IDC_CONTEXT_TR_DEQUEUE_PTR 8271
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#define IDC_CONTEXT_DCS 8272
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#define IDC_CONTEXT_MAX_ESIT_LO 8273
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#define IDC_CONTEXT_AVERAGE_LEN 8274
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#define IDC_CONTEXT_RSVDO_EP_0 8275
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#define IDC_CONTEXT_RSVDO_EP_1 8276
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#define IDC_CONTEXT_RSVDO_EP_2 8277
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#define IDC_CONTEXT_RSVDO_EP_3 8278
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#define IDC_CONTEXT_RSVDO_EP_4 8279
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#define IDC_CONTEXT_RSVDO_EP_5 8280
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#define IDC_CONTEXT_RSVDO_EP_6 8281
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#define IDC_CONTEXT_RSVDO_EP_7 8282
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#define IDC_CONTEXT_RSVDO_EP_8 8283
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#define IDC_CONTEXT_RSVDO_EP_9 8284
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#define IDC_CONTEXT_RSVDO_EP_10 8285
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#define IDC_CONTEXT_EP_STATE_STR 8286
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#define IDC_CONTEXT_EP_TYPE_STR 8287
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#define IDC_CONTEXT_MAXPS_STR 8288
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// string context
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#define IDC_STR_CONTEXT_DQPTR 8301
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#define IDC_STR_CONTEXT_SCT 8302
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#define IDC_STR_CONTEXT_DCS 8303
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#define IDC_STR_CONTEXT_STOPPED 8304
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#define IDC_STR_CONTEXT_RSVDO_0 8305
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#define IDC_STR_CONTEXT_RSVDO_1 8306
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#define IDC_CONTEXT_SCT_STR 8307
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