Stanislav Shwartsman 6dc5cfe80b fixed typo in opcode name		2019-01-24 20:10:46 +00:00
..
decoder.h	dump all supported CPU fetures into Bochs log from CPUID object	2019-01-05 20:17:39 +00:00
disasm.cc	fixed compilation with EVEX disabled	2018-03-29 08:50:38 +00:00
fetchdecode32.cc	added MOVDIRI opcode implementation	2018-04-06 05:06:36 +00:00
fetchdecode64.cc	added MOVDIRI opcode implementation	2018-04-06 05:06:36 +00:00
fetchdecode_avx.h	VMOVSS/VMOVSD are VEX.VL ignore form and not VEX.L0	2017-11-11 11:58:07 +00:00
fetchdecode_evex.h	fixed comment in the opcode table for EVEX	2019-01-22 18:31:39 +00:00
fetchdecode_opmap_0f3a.h	correctly decode PINSRQ instruction	2017-12-13 20:59:41 +00:00
fetchdecode_opmap_0f38.h	added MOVDIRI opcode implementation	2018-04-06 05:06:36 +00:00
fetchdecode_opmap.h	correct disasm for movsxd opcode	2017-12-13 18:44:13 +00:00
fetchdecode_x87.h	fix disasm of FISTTP opcodes	2017-12-19 20:36:55 +00:00
fetchdecode_xop.h	step 1 of rewrite Bochs decoder: legacy decoder tables done. TODO: avx/evex decoder tables, merge decoder and disasm together	2017-01-10 20:15:17 +00:00
fetchdecode.h	implement disasm of implicit memory reference for maskmovdqu/maskmovq opcodes. fix vmaskmovdqu disasm for legacy disasm as well	2017-12-19 19:45:30 +00:00
ia_opcodes.def	fixed typo in opcode name	2019-01-24 20:10:46 +00:00
ia_opcodes.h	small change to extract ia_opcodes.h from instr.h to dedicated file. this would remove compilation dep of all files on ia_opcodes.h (now called ia_opcdes.def). regenerating dep ober all files in Makefiles.in	2017-10-19 21:27:25 +00:00
instr.h	cleanup return value of all instruction handlers	2018-02-16 07:57:32 +00:00