6d9b16e0f7
Implemented AVX512 shift/rotate instructions
221 lines
7.0 KiB
C++
221 lines
7.0 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2008-2013 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Eb(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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TMP8L = read_virtual_byte(i->seg(), eaddr);
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Ew(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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TMP16 = read_virtual_word(i->seg(), eaddr);
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Ed(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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TMP32 = read_virtual_dword(i->seg(), eaddr);
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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}
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#if BX_SUPPORT_X86_64
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Eq(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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TMP64 = read_virtual_qword_64(i->seg(), eaddr);
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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}
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#endif
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Wb(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit8u val_8 = read_virtual_byte(i->seg(), eaddr);
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BX_WRITE_XMM_REG_LO_BYTE(BX_VECTOR_TMP_REGISTER, val_8);
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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#endif
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Ww(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit16u val_16 = read_virtual_word(i->seg(), eaddr);
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BX_WRITE_XMM_REG_LO_WORD(BX_VECTOR_TMP_REGISTER, val_16);
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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#endif
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Wss(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u val_32 = read_virtual_dword(i->seg(), eaddr);
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BX_WRITE_XMM_REG_LO_DWORD(BX_VECTOR_TMP_REGISTER, val_32);
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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#endif
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Wsd(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit64u val_64 = read_virtual_qword(i->seg(), eaddr);
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BX_WRITE_XMM_REG_LO_QWORD(BX_VECTOR_TMP_REGISTER, val_64);
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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#endif
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Wdq(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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if (BX_CPU_THIS_PTR mxcsr.get_MM())
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read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_TMP_REGISTER));
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else
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read_virtual_xmmword_aligned(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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#endif
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOADU_Wdq(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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#endif
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}
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#if BX_SUPPORT_AVX
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Vector(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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BX_ASSERT(i->getVL() != BX_VL512);
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if (i->getVL() == BX_VL256)
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read_virtual_ymmword(i->seg(), eaddr, &BX_READ_YMM_REG(BX_VECTOR_TMP_REGISTER));
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else
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read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_Half_Vector(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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BX_ASSERT(i->getVL() != BX_VL512);
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if (i->getVL() == BX_VL256) {
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read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
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}
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else {
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Bit64u val_64 = read_virtual_qword(i->seg(), eaddr);
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BX_WRITE_XMM_REG_LO_QWORD(BX_VECTOR_TMP_REGISTER, val_64);
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}
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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}
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#endif
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#if BX_SUPPORT_EVEX
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#include "simd_int.h"
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_BROADCAST_VectorD(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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unsigned vl = i->getVL();
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Bit16u opmask = BX_READ_16BIT_OPMASK(i->opmask());
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if (i->opmask() != 0 && opmask == 0) {
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BX_CPU_CALL_METHOD(i->execute2(), (i)); // for now let execute method to deal with zero/merge masking semantics
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return;
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}
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if (i->getEvexb()) {
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Bit32u val_32 = read_virtual_dword(i->seg(), eaddr);
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simd_pbroadcastd(&BX_AVX_REG(BX_VECTOR_TMP_REGISTER), val_32, vl * 4);
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}
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else {
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if (vl == BX_VL512)
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read_virtual_zmmword(i->seg(), eaddr, &BX_READ_AVX_REG(BX_VECTOR_TMP_REGISTER));
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if (vl == BX_VL256)
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read_virtual_ymmword(i->seg(), eaddr, &BX_READ_YMM_REG(BX_VECTOR_TMP_REGISTER));
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else
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read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
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}
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOAD_BROADCAST_VectorQ(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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unsigned vl = i->getVL();
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Bit16u opmask = BX_READ_8BIT_OPMASK(i->opmask());
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if (i->opmask() != 0 && opmask == 0) {
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BX_CPU_CALL_METHOD(i->execute2(), (i)); // for now let execute method to deal with zero/merge masking semantics
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return;
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}
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if (i->getEvexb()) {
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Bit64u val_64 = read_virtual_qword(i->seg(), eaddr);
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simd_pbroadcastq(&BX_AVX_REG(BX_VECTOR_TMP_REGISTER), val_64, vl * 2);
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}
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else {
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if (vl == BX_VL512)
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read_virtual_zmmword(i->seg(), eaddr, &BX_READ_AVX_REG(BX_VECTOR_TMP_REGISTER));
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if (vl == BX_VL256)
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read_virtual_ymmword(i->seg(), eaddr, &BX_READ_YMM_REG(BX_VECTOR_TMP_REGISTER));
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else
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read_virtual_xmmword(i->seg(), eaddr, &BX_READ_XMM_REG(BX_VECTOR_TMP_REGISTER));
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}
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BX_CPU_CALL_METHOD(i->execute2(), (i));
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}
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#endif
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