205 lines
6.2 KiB
C++
205 lines
6.2 KiB
C++
////////////////////////////////////////////////////////////////////////
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// $Id: ctrl_xfer_pro.cc,v 1.55 2006-06-12 16:58:26 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_X86_64==0
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// Make life easier merging cpu64 & cpu code.
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#define RIP EIP
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#endif
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/* pass zero in check_rpl if no needed selector RPL checking for
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non-conforming segments */
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void BX_CPU_C::check_cs(bx_descriptor_t *descriptor, Bit16u cs_raw, Bit8u check_rpl, Bit8u check_cpl)
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{
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// descriptor AR byte must indicate code segment else #GP(selector)
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if (descriptor->valid==0 || descriptor->segment==0 ||
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IS_DATA_SEGMENT(descriptor->type))
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{
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BX_ERROR(("check_cs: not a valid code segment !"));
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exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
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}
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#if BX_SUPPORT_X86_64
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if (descriptor->u.segment.l)
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{
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if (! BX_CPU_THIS_PTR msr.lma) {
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BX_PANIC(("check_cs: attempt to jump to long mode without enabling EFER.LMA !"));
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}
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if (descriptor->u.segment.d_b) {
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BX_ERROR(("check_cs: Both L and D bits enabled for segment descriptor !"));
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exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
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}
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}
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#endif
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// if non-conforming, code segment descriptor DPL must = CPL else #GP(selector)
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if (IS_CODE_SEGMENT_NON_CONFORMING(descriptor->type)) {
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if (descriptor->dpl != check_cpl) {
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BX_ERROR(("check_cs: non-conforming code seg descriptor dpl != cpl"));
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exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
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}
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/* RPL of destination selector must be <= CPL else #GP(selector) */
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if (check_rpl > check_cpl) {
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BX_ERROR(("check_cs: non-conforming code seg selector rpl > cpl"));
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exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
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}
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}
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// if conforming, then code segment descriptor DPL must <= CPL else #GP(selector)
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else {
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if (descriptor->dpl > check_cpl) {
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BX_ERROR(("check_cs: conforming code seg descriptor dpl > cpl"));
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exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
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}
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}
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// code segment must be present else #NP(selector)
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if (! descriptor->p) {
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BX_ERROR(("check_cs: code segment not present !"));
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exception(BX_NP_EXCEPTION, cs_raw & 0xfffc, 0);
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}
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}
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void BX_CPP_AttrRegparmN(3)
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BX_CPU_C::load_cs(bx_selector_t *selector, bx_descriptor_t *descriptor, Bit8u cpl)
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{
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector = *selector;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache = *descriptor;
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/* caller may request different CPL then in selector */
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl = cpl;
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.valid = 1;
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// Added cpl to the selector value.
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value =
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(0xfffc & BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value) | cpl;
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#if BX_SUPPORT_X86_64
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if (BX_CPU_THIS_PTR msr.lma) {
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if (descriptor->u.segment.l) {
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BX_CPU_THIS_PTR cpu_mode = BX_MODE_LONG_64;
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BX_DEBUG(("Long Mode Activated"));
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loadSRegLMNominal(BX_SEG_REG_CS, selector->value, 0, cpl);
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}
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else {
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BX_DEBUG(("Compatibility Mode Activated"));
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BX_CPU_THIS_PTR cpu_mode = BX_MODE_LONG_COMPAT;
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}
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}
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#endif
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#if BX_SUPPORT_ICACHE
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BX_CPU_THIS_PTR updateFetchModeMask();
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#endif
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// Loading CS will invalidate the EIP fetch window.
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invalidate_prefetch_q();
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}
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void BX_CPP_AttrRegparmN(1)
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BX_CPU_C::branch_near32(Bit32u new_EIP)
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{
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// check always, not only in protected mode
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if (new_EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled)
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{
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BX_ERROR(("branch_near: offset outside of CS limits"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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EIP = new_EIP;
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}
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void BX_CPU_C::branch_far32(bx_selector_t *selector,
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bx_descriptor_t *descriptor, Bit32u eip, Bit8u cpl)
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{
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/* instruction pointer must be in code segment limit else #GP(0) */
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if (eip > descriptor->u.segment.limit_scaled) {
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BX_ERROR(("branch_far: EIP > limit"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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/* Load CS:IP from destination pointer */
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/* Load CS-cache with new segment descriptor */
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load_cs(selector, descriptor, cpl);
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/* Change the EIP value */
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EIP = eip;
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}
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#if BX_SUPPORT_X86_64
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void BX_CPP_AttrRegparmN(1)
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BX_CPU_C::branch_near64(bxInstruction_c *i)
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{
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Bit64u new_RIP = RIP + (Bit32s) i->Id();
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if (! i->os32L()) {
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new_RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
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}
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else {
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if (! IsCanonical(new_RIP)) {
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BX_ERROR(("branch_near64: canonical RIP violation"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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RIP = new_RIP;
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}
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#endif
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void BX_CPU_C::branch_far64(bx_selector_t *selector,
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bx_descriptor_t *descriptor, bx_address rip, Bit8u cpl)
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{
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#if BX_SUPPORT_X86_64
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if (descriptor->u.segment.l)
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{
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if (! IsCanonical(rip)) {
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BX_ERROR(("branch_far: canonical RIP violation"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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else
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#endif
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{
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/* instruction pointer must be in code segment limit else #GP(0) */
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if (rip > descriptor->u.segment.limit_scaled) {
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BX_ERROR(("branch_far: RIP > limit"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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/* Load CS:IP from destination pointer */
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/* Load CS-cache with new segment descriptor */
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load_cs(selector, descriptor, cpl);
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/* Change the RIP value */
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RIP = rip;
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}
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