98 lines
3.5 KiB
C++
98 lines
3.5 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002-2009 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#ifndef BX_IODEV_PIC_H
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#define BX_IODEV_PIC_H
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#if BX_USE_PIC_SMF
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# define BX_PIC_SMF static
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# define BX_PIC_THIS thePic->
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#else
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# define BX_PIC_SMF
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# define BX_PIC_THIS this->
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#endif
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typedef struct {
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Bit8u single_PIC; /* 0=cascaded PIC, 1=master only */
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Bit8u interrupt_offset; /* programmable interrupt vector offset */
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union {
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Bit8u slave_connect_mask; /* for master, a bit for each interrupt line
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0=not connect to a slave, 1=connected */
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Bit8u slave_id; /* for slave, id number of slave PIC */
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} u;
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Bit8u sfnm; /* specially fully nested mode: 0=no, 1=yes*/
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Bit8u buffered_mode; /* 0=no buffered mode, 1=buffered mode */
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Bit8u master_slave; /* master/slave: 0=slave PIC, 1=master PIC */
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Bit8u auto_eoi; /* 0=manual EOI, 1=automatic EOI */
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Bit8u imr; /* interrupt mask register, 1=masked */
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Bit8u isr; /* in service register */
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Bit8u irr; /* interrupt request register */
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Bit8u read_reg_select; /* 0=IRR, 1=ISR */
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Bit8u irq; /* current IRQ number */
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Bit8u lowest_priority; /* current lowest priority irq */
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bx_bool INT; /* INT request pin of PIC */
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Bit8u IRQ_in; /* IRQ pins of PIC */
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struct {
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bx_bool in_init;
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bx_bool requires_4;
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Bit8u byte_expected;
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} init;
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bx_bool special_mask;
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bx_bool polled; /* Set when poll command is issued. */
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bx_bool rotate_on_autoeoi; /* Set when should rotate in auto-eoi mode. */
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Bit8u edge_level; /* bitmap for irq mode (0=edge, 1=level) */
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} bx_pic_t;
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class bx_pic_c : public bx_pic_stub_c {
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public:
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bx_pic_c();
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virtual ~bx_pic_c();
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virtual void init(void);
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virtual void reset(unsigned type);
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virtual void lower_irq(unsigned irq_no);
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virtual void raise_irq(unsigned irq_no);
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virtual void set_mode(bx_bool ma_sl, Bit8u mode);
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virtual Bit8u IAC(void);
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#if BX_DEBUGGER
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virtual void debug_dump(void);
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#endif
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virtual void register_state(void);
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private:
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struct {
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bx_pic_t master_pic;
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bx_pic_t slave_pic;
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} s;
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static Bit32u read_handler(void *this_ptr, Bit32u address, unsigned io_len);
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static void write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
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#if !BX_USE_PIC_SMF
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Bit32u read(Bit32u address, unsigned io_len);
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void write(Bit32u address, Bit32u value, unsigned io_len);
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#endif
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BX_PIC_SMF void service_master_pic(void);
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BX_PIC_SMF void service_slave_pic(void);
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BX_PIC_SMF void clear_highest_interrupt(bx_pic_t *pic);
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};
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#endif
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