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Bochs/bochs/disasm
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Stanislav Shwartsman 94864fb9bc Implement AVX512BW and AVX512DQ extensions published in recently published Intel Archtecture Extensions manual rev20. 
https://software.intel.com/sites/default/files/managed/c6/a9/319433-020.pdf

Most of the instructions are implemented, more on the way.

+ few bugfixes for legacy AVX-512 emulation

AVX-512: Fixed bug in VCMPPS masked instruction implementation with 512-bit data size
AVX-512: Fixed AVX-512 masked convert instructions with non-k0 mask (behaved as non masked versions)
AVX-512: Fixed missed #UD due to invalid EVEX prefix fields for several AVX-512 opcodes (VFIXUPIMMSS/SD, FMA)
2014-07-18 11:14:25 +00:00
..
dis_decode.cc apply same optimization to disasm as well 2013-10-10 21:00:26 +00:00
dis_groups.cc fixes for disasm 2013-10-15 17:19:18 +00:00
dis_tables_avx.inc finish sse tables cleanup in disasm and fetchdecode 2013-10-11 20:09:51 +00:00
dis_tables_sse.inc finish sse tables cleanup in disasm and fetchdecode 2013-10-11 20:09:51 +00:00
dis_tables_x87.inc - deleted executable properties from source files 2011-04-03 10:29:19 +00:00
dis_tables_xop.inc optimize old disasm code 2013-10-07 19:23:19 +00:00
dis_tables.h finish sse tables cleanup in disasm and fetchdecode 2013-10-11 20:09:51 +00:00
dis_tables.inc Implemented XSAVEC instruction emulation and XINUSE optimization in the XSAVEOPT instruction 2014-03-17 20:29:44 +00:00
disasm.h Implement AVX512BW and AVX512DQ extensions published in recently published Intel Archtecture Extensions manual rev20. 2014-07-18 11:14:25 +00:00
Makefile.in - fixes based on Debian patches by Guillem Jover 2012-07-14 07:01:43 +00:00
opcodes.inc Implemented XSAVEC instruction emulation and XINUSE optimization in the XSAVEOPT instruction 2014-03-17 20:29:44 +00:00
resolve.cc optimize old disasm code 2013-10-07 19:23:19 +00:00
syntax.cc fixed zmm reg name in disasm 2013-11-29 20:49:20 +00:00