377 lines
11 KiB
C++
377 lines
11 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2011-2014 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_AVX
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extern void mxcsr_to_softfloat_status_word(float_status_t &status, bx_mxcsr_t mxcsr);
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/* Opcode: VEX.F3.0F 2A (VEX.W=0) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTSI2SS_VssEdR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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softfloat_status_word_rc_override(status, i);
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op1.xmm32u(0) = int32_to_float32(BX_READ_32BIT_REG(i->src2()), status);
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check_exceptionsSSE(get_exception_flags(status));
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.F3.0F 2A (VEX.W=1) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTSI2SS_VssEqR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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softfloat_status_word_rc_override(status, i);
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op1.xmm32u(0) = int64_to_float32(BX_READ_64BIT_REG(i->src2()), status);
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check_exceptionsSSE(get_exception_flags(status));
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.F2.0F 2A (VEX.W=0) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTSI2SD_VsdEdR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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op1.xmm64u(0) = int32_to_float64(BX_READ_32BIT_REG(i->src2()));
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.F2.0F 2A (VEX.W=1) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTSI2SD_VsdEqR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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softfloat_status_word_rc_override(status, i);
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op1.xmm64u(0) = int64_to_float64(BX_READ_64BIT_REG(i->src2()), status);
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check_exceptionsSSE(get_exception_flags(status));
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.0F 5A (VEX.W ignore, VEX.VVV #UD) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPS2PD_VpdWpsR(bxInstruction_c *i)
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{
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BxPackedAvxRegister result;
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BxPackedYmmRegister op = BX_READ_YMM_REG(i->src());
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unsigned len = i->getVL();
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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softfloat_status_word_rc_override(status, i);
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for (unsigned n=0; n < QWORD_ELEMENTS(len); n++) {
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result.vmm64u(n) = float32_to_float64(op.ymm32u(n), status);
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}
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check_exceptionsSSE(get_exception_flags(status));
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BX_WRITE_AVX_REGZ(i->dst(), result, len);
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.66.0F 5A (VEX.W ignore, VEX.VVV #UD) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPD2PS_VpsWpdR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op = BX_READ_AVX_REG(i->src()), result;
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unsigned len = i->getVL();
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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softfloat_status_word_rc_override(status, i);
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for (unsigned n=0; n < QWORD_ELEMENTS(len); n++) {
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result.vmm32u(n) = float64_to_float32(op.vmm64u(n), status);
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}
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check_exceptionsSSE(get_exception_flags(status));
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if (len == BX_VL128) {
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BX_WRITE_XMM_REG_LO_QWORD_CLEAR_HIGH(i->dst(), result.vmm64u(0));
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}
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else {
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BX_WRITE_AVX_REGZ(i->dst(), result, len >> 1); // write half vector
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}
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.F3.0F 5A (VEX.W ignore) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTSS2SD_VsdWssR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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float32 op2 = BX_READ_XMM_REG_LO_DWORD(i->src2());
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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softfloat_status_word_rc_override(status, i);
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op1.xmm64u(0) = float32_to_float64(op2, status);
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check_exceptionsSSE(get_exception_flags(status));
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.F3.0F 5A (VEX.W ignore) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTSD2SS_VssWsdR(bxInstruction_c *i)
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{
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BxPackedXmmRegister op1 = BX_READ_XMM_REG(i->src1());
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float64 op2 = BX_READ_XMM_REG_LO_QWORD(i->src2());
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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softfloat_status_word_rc_override(status, i);
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op1.xmm32u(0) = float64_to_float32(op2, status);
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check_exceptionsSSE(get_exception_flags(status));
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BX_WRITE_XMM_REG_CLEAR_HIGH(i->dst(), op1);
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.NDS.0F 5B (VEX.W ignore, VEX.VVV #UD) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTDQ2PS_VpsWdqR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op = BX_READ_AVX_REG(i->src());
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unsigned len = i->getVL();
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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softfloat_status_word_rc_override(status, i);
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for (unsigned n=0; n < DWORD_ELEMENTS(len); n++) {
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op.vmm32u(n) = int32_to_float32(op.vmm32s(n), status);
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}
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check_exceptionsSSE(get_exception_flags(status));
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BX_WRITE_AVX_REGZ(i->dst(), op, len);
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.NDS.66.0F 5B (VEX.W ignore, VEX.VVV #UD) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPS2DQ_VdqWpsR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op = BX_READ_AVX_REG(i->src());
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unsigned len = i->getVL();
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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softfloat_status_word_rc_override(status, i);
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for (unsigned n=0; n < DWORD_ELEMENTS(len); n++) {
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op.vmm32s(n) = float32_to_int32(op.vmm32u(n), status);
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}
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check_exceptionsSSE(get_exception_flags(status));
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BX_WRITE_AVX_REGZ(i->dst(), op, len);
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.NDS.F3.0F 5B (VEX.W ignore, VEX.VVV #UD) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTTPS2DQ_VdqWpsR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op = BX_READ_AVX_REG(i->src());
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unsigned len = i->getVL();
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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softfloat_status_word_rc_override(status, i);
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for (unsigned n=0; n < DWORD_ELEMENTS(len); n++) {
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op.vmm32s(n) = float32_to_int32_round_to_zero(op.vmm32u(n), status);
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}
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check_exceptionsSSE(get_exception_flags(status));
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BX_WRITE_AVX_REGZ(i->dst(), op, len);
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.66.0F.E6 (VEX.W ignore, VEX.VVV #UD) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTTPD2DQ_VdqWpdR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op = BX_READ_AVX_REG(i->src()), result;
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unsigned len = i->getVL();
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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softfloat_status_word_rc_override(status, i);
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for (unsigned n=0; n < QWORD_ELEMENTS(len); n++) {
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result.vmm32s(n) = float64_to_int32_round_to_zero(op.vmm64u(n), status);
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}
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check_exceptionsSSE(get_exception_flags(status));
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if (len == BX_VL128) {
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BX_WRITE_XMM_REG_LO_QWORD_CLEAR_HIGH(i->dst(), result.vmm64u(0));
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}
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else {
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BX_WRITE_AVX_REGZ(i->dst(), result, len >> 1); // write half vector
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}
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.F2.0F.E6 (VEX.W ignore, VEX.VVV #UD) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPD2DQ_VdqWpdR(bxInstruction_c *i)
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{
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BxPackedAvxRegister op = BX_READ_AVX_REG(i->src()), result;
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unsigned len = i->getVL();
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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softfloat_status_word_rc_override(status, i);
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for (unsigned n=0; n < QWORD_ELEMENTS(len); n++) {
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result.vmm32s(n) = float64_to_int32(op.vmm64u(n), status);
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}
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check_exceptionsSSE(get_exception_flags(status));
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if (len == BX_VL128) {
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BX_WRITE_XMM_REG_LO_QWORD_CLEAR_HIGH(i->dst(), result.vmm64u(0));
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}
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else {
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BX_WRITE_AVX_REGZ(i->dst(), result, len >> 1); // write half vector
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}
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.F3.0F.E6 (VEX.W ignore, VEX.VVV #UD) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTDQ2PD_VpdWdqR(bxInstruction_c *i)
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{
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BxPackedAvxRegister result;
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BxPackedYmmRegister op = BX_READ_YMM_REG(i->src());
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unsigned len = i->getVL();
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for (unsigned n=0; n < QWORD_ELEMENTS(len); n++) {
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result.vmm64u(n) = int32_to_float64(op.ymm32s(n));
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}
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BX_WRITE_AVX_REGZ(i->dst(), result, len);
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BX_NEXT_INSTR(i);
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}
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// float16 convert
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/* Opcode: VEX.66.0F.3A.13 (VEX.W=0) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPH2PS_VpsWpsR(bxInstruction_c *i)
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{
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BxPackedAvxRegister result;
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BxPackedYmmRegister op = BX_READ_YMM_REG(i->src());
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unsigned len = i->getVL();
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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status.denormals_are_zeros = 0; // ignore MXCSR.DAZ
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// no denormal exception is reported on MXCSR
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status.float_suppress_exception = float_flag_denormal;
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for (unsigned n=0; n < DWORD_ELEMENTS(len); n++) {
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result.vmm32u(n) = float16_to_float32(op.ymm16u(n), status);
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}
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check_exceptionsSSE(get_exception_flags(status));
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BX_WRITE_AVX_REGZ(i->dst(), result, len);
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BX_NEXT_INSTR(i);
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}
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/* Opcode: VEX.66.0F.3A.1D (VEX.W=0) */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VCVTPS2PH_WpsVpsIb(bxInstruction_c *i)
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{
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BxPackedAvxRegister op = BX_READ_AVX_REG(i->src()), result;
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float_status_t status;
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mxcsr_to_softfloat_status_word(status, MXCSR);
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unsigned len = i->getVL();
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Bit8u control = i->Ib();
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status.flush_underflow_to_zero = 0; // ignore MXCSR.FUZ
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// override MXCSR rounding mode with control coming from imm8
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if ((control & 0x4) == 0)
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status.float_rounding_mode = control & 0x3;
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for (unsigned n=0; n < DWORD_ELEMENTS(len); n++) {
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result.vmm16u(n) = float32_to_float16(op.vmm32u(n), status);
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}
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check_exceptionsSSE(get_exception_flags(status));
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if (i->modC0()) {
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if (len == BX_VL128) {
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BX_WRITE_XMM_REG_LO_QWORD_CLEAR_HIGH(i->dst(), result.vmm64u(0));
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}
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else {
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BX_WRITE_AVX_REGZ(i->dst(), result, len >> 1); // write half vector
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}
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}
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else {
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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#if BX_SUPPORT_EVEX
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if (len == BX_VL512)
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write_virtual_ymmword(i->seg(), eaddr, &result.vmm256(0));
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else
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#endif
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{
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if (len == BX_VL256)
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write_virtual_xmmword(i->seg(), eaddr, &result.vmm128(0));
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else
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write_virtual_qword(i->seg(), eaddr, result.vmm64u(0));
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}
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}
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BX_NEXT_INSTR(i);
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}
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#endif // BX_SUPPORT_AVX
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