277 lines
7.1 KiB
C++
277 lines
7.1 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2011-2014 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_X86_64
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#if BX_SUPPORT_AVX
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#include "scalar_arith.h"
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ANDN_GqBqEqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->src1());
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Bit64u op2_64 = BX_READ_64BIT_REG(i->src2());
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op1_64 = ~op1_64 & op2_64;
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SET_FLAGS_OSZAxC_LOGIC_64(op1_64); // keep PF unchanged
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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BX_NEXT_INSTR(i);
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}
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extern void long_mul(Bit128u *product, Bit64u op1, Bit64u op2);
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MULX_GqBqEqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = RDX;
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Bit64u op2_64 = BX_READ_64BIT_REG(i->src2());
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Bit128u product_128;
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// product_128 = ((Bit128u) op1_64) * ((Bit128u) op2_64);
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// product_64l = (Bit64u) (product_128 & 0xFFFFFFFFFFFFFFFF);
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// product_64h = (Bit64u) (product_128 >> 64);
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long_mul(&product_128,op1_64,op2_64);
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BX_WRITE_64BIT_REG(i->src1(), product_128.lo);
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BX_WRITE_64BIT_REG(i->dst(), product_128.hi);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLSI_BqEqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->src());
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bx_bool tmpCF = (op1_64 != 0);
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op1_64 = (-op1_64) & op1_64;
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SET_FLAGS_OSZAxC_LOGIC_64(op1_64); // keep PF unchanged
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set_CF(tmpCF);
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLSMSK_BqEqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->src());
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bx_bool tmpCF = (op1_64 == 0);
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op1_64 = (op1_64-1) ^ op1_64;
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SET_FLAGS_OSZAxC_LOGIC_64(op1_64); // keep PF unchanged
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set_CF(tmpCF);
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLSR_BqEqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->src());
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bx_bool tmpCF = (op1_64 == 0);
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op1_64 = (op1_64-1) & op1_64;
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SET_FLAGS_OSZAxC_LOGIC_64(op1_64); // keep PF unchanged
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set_CF(tmpCF);
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RORX_GqEqIbR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->src());
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unsigned count = i->Ib() & 0x3f;
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if (count) {
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op1_64 = (op1_64 >> count) | (op1_64 << (64 - count));
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}
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SHRX_GqEqBqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->src1());
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unsigned count = BX_READ_32BIT_REG(i->src2()) & 0x3f;
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if (count)
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op1_64 >>= count;
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SARX_GqEqBqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->src1());
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unsigned count = BX_READ_32BIT_REG(i->src2()) & 0x3f;
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if (count) {
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/* count < 64, since only lower 6 bits used */
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op1_64 = ((Bit64s) op1_64) >> count;
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}
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::SHLX_GqEqBqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->src1());
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unsigned count = BX_READ_32BIT_REG(i->src2()) & 0x3f;
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if (count)
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op1_64 <<= count;
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BEXTR_GqEqBqR(bxInstruction_c *i)
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{
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Bit16u control = BX_READ_16BIT_REG(i->src2());
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unsigned start = control & 0xff;
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unsigned len = control >> 8;
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Bit64u op1_64 = bextrq(BX_READ_64BIT_REG(i->src1()), start, len);
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SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BZHI_GqBqEqR(bxInstruction_c *i)
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{
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unsigned control = BX_READ_8BIT_REGL(i->src1());
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bx_bool tmpCF = 0;
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Bit64u op1_64 = BX_READ_64BIT_REG(i->src2());
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if (control < 64) {
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Bit64u mask = (BX_CONST64(1) << control) - 1;
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op1_64 &= mask;
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}
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else {
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tmpCF = 1;
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}
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SET_FLAGS_OSZAxC_LOGIC_64(op1_64); // keep PF unchanged
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set_CF(tmpCF);
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BX_WRITE_64BIT_REG(i->dst(), op1_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PEXT_GqBqEqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->src1());
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Bit64u op2_64 = BX_READ_64BIT_REG(i->src2()), result_64 = 0;
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Bit64u wr_mask = 0x1;
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for (; op2_64 != 0; op2_64 >>= 1)
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{
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if (op2_64 & 0x1) {
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if (op1_64 & 0x1) result_64 |= wr_mask;
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wr_mask <<= 1;
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}
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op1_64 >>= 1;
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}
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BX_WRITE_64BIT_REG(i->dst(), result_64);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::PDEP_GqBqEqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->src1());
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Bit64u op2_64 = BX_READ_64BIT_REG(i->src2()), result_64 = 0;
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Bit64u wr_mask = 0x1;
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for (; op2_64 != 0; op2_64 >>= 1)
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{
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if (op2_64 & 0x1) {
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if (op1_64 & 0x1) result_64 |= wr_mask;
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op1_64 >>= 1;
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}
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wr_mask <<= 1;
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}
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BX_WRITE_64BIT_REG(i->dst(), result_64);
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BX_NEXT_INSTR(i);
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}
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#endif // BX_SUPPORT_AVX
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADCX_GqEqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->dst());
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Bit64u op2_64 = BX_READ_64BIT_REG(i->src());
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Bit64u sum_64 = op1_64 + op2_64 + getB_CF();
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BX_WRITE_64BIT_REG(i->dst(), sum_64);
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Bit64u carry_out = ADD_COUT_VEC(op1_64, op2_64, sum_64);
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set_CF(carry_out >> 63);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADOX_GqEqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->dst());
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Bit64u op2_64 = BX_READ_64BIT_REG(i->src());
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Bit64u sum_64 = op1_64 + op2_64 + getB_OF();
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BX_WRITE_64BIT_REG(i->dst(), sum_64);
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Bit64u overflow = GET_ADD_OVERFLOW(op1_64, op2_64, sum_64, BX_CONST64(0x8000000000000000));
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set_OF(!!overflow);
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BX_NEXT_INSTR(i);
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}
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#endif
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