5cc04b9955
XOP: few instructions are still missing, coming soon
BX_PANIC(("VPERMILPS_VpsHpsWpsVIbR: not implemented yet"));
BX_PANIC(("VPERMILPD_VpdHpdWpdVIbR: not implemented yet"));
BX_PANIC(("VPMADCSSWD_VdqHdqWdqVIbR: not implemented yet"));
BX_PANIC(("VPMADCSWD_VdqHdqWdqVIbR: not implemented yet"));
BX_PANIC(("VFRCZPS_VpsWpsR: not implemented yet"));
BX_PANIC(("VFRCZPD_VpdWpdR: not implemented yet"));
BX_PANIC(("VFRCZSS_VssWssR: not implemented yet"));
BX_PANIC(("VFRCZSD_VsdWsdR: not implemented yet"));
180 lines
4.3 KiB
C++
Executable File
180 lines
4.3 KiB
C++
Executable File
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2011 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_AVX
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BEXTR_GdEdIdR(bxInstruction_c *i)
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{
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Bit16u control = (Bit16u) i->Id();
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unsigned start = control & 0xff;
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unsigned len = control >> 8;
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Bit32u op1_32 = 0;
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if (start < 32 && len > 0) {
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op1_32 = BX_READ_32BIT_REG(i->rm());
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op1_32 >>= start;
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if (len < 32) {
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Bit32u extract_mask = (1 << len) - 1;
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op1_32 &= extract_mask;
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}
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}
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SET_FLAGS_OSZAPC_LOGIC_32(op1_32);
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BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLCFILL_BdEdR(bxInstruction_c *i)
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{
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Bit32u op_32 = BX_READ_32BIT_REG(i->rm());
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Bit32u result_32 = (op_32 + 1) & op_32;
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SET_FLAGS_OSZAPC_LOGIC_32(result_32);
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set_CF((op_32 + 1) == 0);
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BX_WRITE_32BIT_REGZ(i->vvv(), result_32);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLCI_BdEdR(bxInstruction_c *i)
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{
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Bit32u op_32 = BX_READ_32BIT_REG(i->rm());
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Bit32u result_32 = ~(op_32 + 1) | op_32;
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SET_FLAGS_OSZAPC_LOGIC_32(result_32);
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set_CF((op_32 + 1) == 0);
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BX_WRITE_32BIT_REGZ(i->vvv(), result_32);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLCIC_BdEdR(bxInstruction_c *i)
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{
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Bit32u op_32 = BX_READ_32BIT_REG(i->rm());
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Bit32u result_32 = (op_32 + 1) & ~op_32;
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SET_FLAGS_OSZAPC_LOGIC_32(result_32);
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set_CF((op_32 + 1) == 0);
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BX_WRITE_32BIT_REGZ(i->vvv(), result_32);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLCMSK_BdEdR(bxInstruction_c *i)
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{
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Bit32u op_32 = BX_READ_32BIT_REG(i->rm());
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Bit32u result_32 = (op_32 + 1) ^ op_32;
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SET_FLAGS_OSZAPC_LOGIC_32(result_32);
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set_CF((op_32 + 1) == 0);
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BX_WRITE_32BIT_REGZ(i->vvv(), result_32);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLCS_BdEdR(bxInstruction_c *i)
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{
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Bit32u op_32 = BX_READ_32BIT_REG(i->rm());
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Bit32u result_32 = (op_32 + 1) | op_32;
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SET_FLAGS_OSZAPC_LOGIC_32(result_32);
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set_CF((op_32 + 1) == 0);
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BX_WRITE_32BIT_REGZ(i->vvv(), result_32);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLSFILL_BdEdR(bxInstruction_c *i)
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{
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Bit32u op_32 = BX_READ_32BIT_REG(i->rm());
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Bit32u result_32 = (op_32 - 1) | op_32;
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SET_FLAGS_OSZAPC_LOGIC_32(result_32);
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set_CF(op_32 == 0);
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BX_WRITE_32BIT_REGZ(i->vvv(), result_32);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BLSIC_BdEdR(bxInstruction_c *i)
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{
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Bit32u op_32 = BX_READ_32BIT_REG(i->rm());
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Bit32u result_32 = (op_32 - 1) | ~op_32;
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SET_FLAGS_OSZAPC_LOGIC_32(result_32);
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set_CF(op_32 == 0);
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BX_WRITE_32BIT_REGZ(i->vvv(), result_32);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::T1MSKC_BdEdR(bxInstruction_c *i)
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{
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Bit32u op_32 = BX_READ_32BIT_REG(i->rm());
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Bit32u result_32 = (op_32 + 1) | ~op_32;
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SET_FLAGS_OSZAPC_LOGIC_32(result_32);
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set_CF((op_32 + 1) == 0);
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BX_WRITE_32BIT_REGZ(i->vvv(), result_32);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TZMSK_BdEdR(bxInstruction_c *i)
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{
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Bit32u op_32 = BX_READ_32BIT_REG(i->rm());
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Bit32u result_32 = (op_32 - 1) & ~op_32;
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SET_FLAGS_OSZAPC_LOGIC_32(result_32);
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set_CF(op_32 == 0);
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BX_WRITE_32BIT_REGZ(i->vvv(), result_32);
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BX_NEXT_INSTR(i);
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}
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#endif
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