2f3c7ff8e4
fixed enabling of ADX extensions in generic CPUID when enabled through .bochsrc Small code cleanups on the way to implementation of APIC Registers Virtualization features disclosed in recent Intel SDM rev043
121 lines
4.1 KiB
C++
121 lines
4.1 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2012 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_VMX && BX_SUPPORT_X86_64
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bx_bool BX_CPP_AttrRegparmN(1) BX_CPU_C::is_virtual_apic_page(bx_phy_address paddr)
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{
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if (BX_CPU_THIS_PTR in_vmx_guest) {
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VMCS_CACHE *vm = &BX_CPU_THIS_PTR vmcs;
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if (SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_VIRTUALIZE_APIC_ACCESSES))
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if (PPFOf(paddr) == PPFOf(vm->apic_access_page)) return 1;
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}
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return 0;
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}
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Bit32u BX_CPU_C::VMX_Read_Virtual_APIC(unsigned offset)
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{
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bx_phy_address pAddr = BX_CPU_THIS_PTR vmcs.virtual_apic_page_addr + offset;
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Bit32u field32;
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access_read_physical(pAddr, 4, (Bit8u*)(&field32));
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BX_NOTIFY_PHY_MEMORY_ACCESS(pAddr, 4, BX_READ, BX_VMX_VAPIC_ACCESS, (Bit8u*)(&field32));
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return field32;
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}
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void BX_CPU_C::VMX_Write_Virtual_APIC(unsigned offset, Bit32u val32)
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{
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bx_phy_address pAddr = BX_CPU_THIS_PTR vmcs.virtual_apic_page_addr + offset;
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access_write_physical(pAddr, 4, (Bit8u*)(&val32));
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BX_NOTIFY_PHY_MEMORY_ACCESS(pAddr, 4, BX_WRITE, BX_VMX_VAPIC_ACCESS, (Bit8u*)(&val32));
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}
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void BX_CPU_C::VMX_Write_VTPR(Bit8u vtpr)
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{
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VMX_Write_Virtual_APIC(BX_LAPIC_TPR, vtpr);
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VMX_TPR_Virtualization(vtpr);
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}
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void BX_CPU_C::VMX_Virtual_Apic_Read(bx_phy_address paddr, unsigned len, void *data)
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{
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BX_ASSERT(SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_VIRTUALIZE_APIC_ACCESSES));
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Bit32u offset = PAGE_OFFSET(paddr);
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// access is not instruction fetch because cpu::prefetch will crash them
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if (VMEXIT(VMX_VM_EXEC_CTRL2_TPR_SHADOW) && offset == BX_LAPIC_TPR && len <= 4) {
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// VTPR access
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Bit32u vtpr = VMX_Read_Virtual_APIC(BX_LAPIC_TPR);
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if (len == 1)
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*((Bit8u *) data) = vtpr & 0xff;
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else if (len == 2)
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*((Bit16u *) data) = vtpr & 0xffff;
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else if (len == 4)
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*((Bit32u *) data) = vtpr;
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else
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BX_PANIC(("PANIC: Unsupported Virtual APIC access len = 3 !"));
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return;
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}
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Bit32u qualification = offset |
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(BX_CPU_THIS_PTR in_event) ? VMX_APIC_ACCESS_DURING_EVENT_DELIVERY : VMX_APIC_READ_INSTRUCTION_EXECUTION;
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VMexit(VMX_VMEXIT_APIC_ACCESS, qualification);
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}
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void BX_CPU_C::VMX_Virtual_Apic_Write(bx_phy_address paddr, unsigned len, void *data)
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{
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BX_ASSERT(SECONDARY_VMEXEC_CONTROL(VMX_VM_EXEC_CTRL3_VIRTUALIZE_APIC_ACCESSES));
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Bit32u offset = PAGE_OFFSET(paddr);
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if (VMEXIT(VMX_VM_EXEC_CTRL2_TPR_SHADOW) && offset == BX_LAPIC_TPR && len <= 4) {
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// VTPR access
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VMX_Write_VTPR(*((Bit8u *) data));
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return;
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}
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Bit32u qualification = offset |
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(BX_CPU_THIS_PTR in_event) ? VMX_APIC_ACCESS_DURING_EVENT_DELIVERY : VMX_APIC_WRITE_INSTRUCTION_EXECUTION;
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VMexit(VMX_VMEXIT_APIC_ACCESS, qualification);
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}
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void BX_CPU_C::VMX_TPR_Virtualization(Bit8u vtpr)
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{
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VMCS_CACHE *vm = &BX_CPU_THIS_PTR vmcs;
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Bit8u tpr_shadow = vtpr >> 4;
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if (tpr_shadow < vm->vm_tpr_threshold) {
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// commit current instruction to produce trap-like VMexit
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BX_CPU_THIS_PTR prev_rip = RIP; // commit new RIP
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VMexit(VMX_VMEXIT_TPR_THRESHOLD, 0);
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}
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}
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#endif // BX_SUPPORT_VMX && BX_SUPPORT_X86_64
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