49664f7503
tries to fix it. The shortcuts to register names such as AX and DL are #defines in cpu/cpu.h, and they are defined in terms of BX_CPU_THIS_PTR. When BX_USE_CPU_SMF=1, this works fine. (This is what bochs used for a long time, and nobody used the SMF=0 mode at all.) To make SMP bochs work, I had to get SMF=0 mode working for the CPU so that there could be an array of cpus. When SMF=0 for the CPU, BX_CPU_THIS_PTR is defined to be "this->" which only works within methods of BX_CPU_C. Code outside of BX_CPU_C must reference BX_CPU(num) instead. - to try to enforce the correct use of AL/AX/DL/etc. shortcuts, they are now only #defined when "NEED_CPU_REG_SHORTCUTS" is #defined. This is only done in the cpu/*.cc code.
219 lines
5.0 KiB
C++
219 lines
5.0 KiB
C++
// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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void
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BX_CPU_C::LES_GvMp(BxInstruction_t *i)
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{
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if (i->mod == 0xc0) {
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// (BW) NT seems to use this when booting.
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BX_INFO(("invalid use of LES, must use memory reference!\n"));
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UndefinedOpcode(i);
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}
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#if BX_CPU_LEVEL > 2
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if (i->os_32) {
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Bit16u es;
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Bit32u reg_32;
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read_virtual_dword(i->seg, i->rm_addr, ®_32);
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read_virtual_word(i->seg, i->rm_addr + 4, &es);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], es);
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BX_WRITE_32BIT_REG(i->nnn, reg_32);
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}
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else
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#endif /* BX_CPU_LEVEL > 2 */
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{ /* 16 bit mode */
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Bit16u reg_16, es;
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read_virtual_word(i->seg, i->rm_addr, ®_16);
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read_virtual_word(i->seg, i->rm_addr + 2, &es);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], es);
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BX_WRITE_16BIT_REG(i->nnn, reg_16);
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}
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}
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void
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BX_CPU_C::LDS_GvMp(BxInstruction_t *i)
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{
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if (i->mod == 0xc0) {
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BX_PANIC(("invalid use of LDS, must use memory reference!\n"));
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UndefinedOpcode(i);
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}
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#if BX_CPU_LEVEL > 2
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if (i->os_32) {
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Bit16u ds;
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Bit32u reg_32;
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read_virtual_dword(i->seg, i->rm_addr, ®_32);
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read_virtual_word(i->seg, i->rm_addr + 4, &ds);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], ds);
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BX_WRITE_32BIT_REG(i->nnn, reg_32);
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}
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else
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#endif /* BX_CPU_LEVEL > 2 */
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{ /* 16 bit mode */
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Bit16u reg_16, ds;
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read_virtual_word(i->seg, i->rm_addr, ®_16);
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read_virtual_word(i->seg, i->rm_addr + 2, &ds);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], ds);
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BX_WRITE_16BIT_REG(i->nnn, reg_16);
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}
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}
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void
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BX_CPU_C::LFS_GvMp(BxInstruction_t *i)
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{
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#if BX_CPU_LEVEL < 3
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BX_PANIC(("lfs_gvmp: not supported on 8086\n"));
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#else /* 386+ */
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if (i->mod == 0xc0) {
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BX_PANIC(("invalid use of LFS, must use memory reference!\n"));
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UndefinedOpcode(i);
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}
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if (i->os_32) {
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Bit32u reg_32;
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Bit16u fs;
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read_virtual_dword(i->seg, i->rm_addr, ®_32);
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read_virtual_word(i->seg, i->rm_addr + 4, &fs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs);
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BX_WRITE_32BIT_REG(i->nnn, reg_32);
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}
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else { /* 16 bit operand size */
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Bit16u reg_16;
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Bit16u fs;
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read_virtual_word(i->seg, i->rm_addr, ®_16);
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read_virtual_word(i->seg, i->rm_addr + 2, &fs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs);
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BX_WRITE_16BIT_REG(i->nnn, reg_16);
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}
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#endif
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}
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void
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BX_CPU_C::LGS_GvMp(BxInstruction_t *i)
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{
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#if BX_CPU_LEVEL < 3
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BX_PANIC(("lgs_gvmp: not supported on 8086\n"));
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#else /* 386+ */
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if (i->mod == 0xc0) {
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BX_PANIC(("invalid use of LGS, must use memory reference!\n"));
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UndefinedOpcode(i);
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}
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if (i->os_32) {
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Bit32u reg_32;
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Bit16u gs;
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read_virtual_dword(i->seg, i->rm_addr, ®_32);
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read_virtual_word(i->seg, i->rm_addr + 4, &gs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs);
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BX_WRITE_32BIT_REG(i->nnn, reg_32);
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}
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else { /* 16 bit operand size */
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Bit16u reg_16;
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Bit16u gs;
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read_virtual_word(i->seg, i->rm_addr, ®_16);
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read_virtual_word(i->seg, i->rm_addr + 2, &gs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs);
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BX_WRITE_16BIT_REG(i->nnn, reg_16);
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}
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#endif
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}
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void
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BX_CPU_C::LSS_GvMp(BxInstruction_t *i)
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{
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#if BX_CPU_LEVEL < 3
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BX_PANIC(("lss_gvmp: not supported on 8086\n"));
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#else /* 386+ */
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if (i->mod == 0xc0) {
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BX_PANIC(("invalid use of LSS, must use memory reference!\n"));
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UndefinedOpcode(i);
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}
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if (i->os_32) {
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Bit32u reg_32;
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Bit16u ss_raw;
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read_virtual_dword(i->seg, i->rm_addr, ®_32);
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read_virtual_word(i->seg, i->rm_addr + 4, &ss_raw);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss_raw);
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BX_WRITE_32BIT_REG(i->nnn, reg_32);
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}
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else { /* 16 bit operand size */
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Bit16u reg_16;
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Bit16u ss_raw;
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read_virtual_word(i->seg, i->rm_addr, ®_16);
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read_virtual_word(i->seg, i->rm_addr + 2, &ss_raw);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss_raw);
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BX_WRITE_16BIT_REG(i->nnn, reg_16);
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}
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#endif
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}
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