ec1ff39a5f
The 64-bit code got >10% speedup, the 32-bit code also got about 2% because laddr cacluation optimization
380 lines
9.8 KiB
C++
Executable File
380 lines
9.8 KiB
C++
Executable File
/////////////////////////////////////////////////////////////////////////
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// $Id: bit64.cc,v 1.12 2008-05-10 18:10:52 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_X86_64
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BSF_GqEq(bxInstruction_c *i)
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{
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/* for 64 bit operand size mode */
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Bit64u op1_64, op2_64;
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/* op2_64 is a register or memory reference */
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if (i->modC0()) {
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op2_64 = BX_READ_64BIT_REG(i->rm());
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}
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else {
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op2_64 = read_virtual_qword_64(i->seg(), RMAddr(i));
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}
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if (op2_64 == 0) {
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assert_ZF(); /* op1_64 undefined */
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return;
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}
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op1_64 = 0;
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while ((op2_64 & 0x01) == 0) {
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op1_64++;
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op2_64 >>= 1;
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}
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SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
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clear_ZF();
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/* now write result back to destination */
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BX_WRITE_64BIT_REG(i->nnn(), op1_64);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BSR_GqEq(bxInstruction_c *i)
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{
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/* for 64 bit operand size mode */
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Bit64u op1_64, op2_64;
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/* op2_64 is a register or memory reference */
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if (i->modC0()) {
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op2_64 = BX_READ_64BIT_REG(i->rm());
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}
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else {
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op2_64 = read_virtual_qword_64(i->seg(), RMAddr(i));
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}
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if (op2_64 == 0) {
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assert_ZF(); /* op1_64 undefined */
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return;
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}
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op1_64 = 63;
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while ((op2_64 & BX_CONST64(0x8000000000000000)) == 0) {
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op1_64--;
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op2_64 <<= 1;
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}
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SET_FLAGS_OSZAPC_LOGIC_64(op1_64);
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clear_ZF();
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/* now write result back to destination */
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BX_WRITE_64BIT_REG(i->nnn(), op1_64);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqGqM(bxInstruction_c *i)
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{
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bx_address op1_addr;
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Bit64u op1_64, op2_64;
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Bit64s displacement64;
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Bit64u index;
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op2_64 = BX_READ_64BIT_REG(i->nnn());
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index = op2_64 & 0x3f;
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displacement64 = ((Bit64s) (op2_64 & BX_CONST64(0xffffffffffffffc0))) / 64;
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op1_addr = RMAddr(i) + 8 * displacement64;
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if (! i->as64L())
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op1_addr = (Bit32u) op1_addr;
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/* pointer, segment address pair */
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op1_64 = read_virtual_qword_64(i->seg(), op1_addr);
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set_CF((op1_64 >> index) & 0x01);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqGqR(bxInstruction_c *i)
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{
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Bit64u op1_64, op2_64;
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op1_64 = BX_READ_64BIT_REG(i->rm());
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op2_64 = BX_READ_64BIT_REG(i->nnn());
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op2_64 &= 0x3f;
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set_CF((op1_64 >> op2_64) & 0x01);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqGqM(bxInstruction_c *i)
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{
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bx_address op1_addr;
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Bit64u op1_64, op2_64, index;
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Bit64s displacement64;
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bx_bool bit_i;
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op2_64 = BX_READ_64BIT_REG(i->nnn());
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index = op2_64 & 0x3f;
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displacement64 = ((Bit64s) (op2_64 & BX_CONST64(0xffffffffffffffc0))) / 64;
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op1_addr = RMAddr(i) + 8 * displacement64;
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if (! i->as64L())
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op1_addr = (Bit32u) op1_addr;
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/* pointer, segment address pair */
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op1_64 = read_RMW_virtual_qword_64(i->seg(), op1_addr);
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bit_i = (op1_64 >> index) & 0x01;
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op1_64 |= (((Bit64u) 1) << index);
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write_RMW_virtual_qword(op1_64);
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set_CF(bit_i);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqGqR(bxInstruction_c *i)
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{
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Bit64u op1_64, op2_64;
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op1_64 = BX_READ_64BIT_REG(i->rm());
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op2_64 = BX_READ_64BIT_REG(i->nnn());
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op2_64 &= 0x3f;
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set_CF((op1_64 >> op2_64) & 0x01);
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op1_64 |= (((Bit64u) 1) << op2_64);
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/* now write result back to the destination */
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BX_WRITE_64BIT_REG(i->rm(), op1_64);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqGqM(bxInstruction_c *i)
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{
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bx_address op1_addr;
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Bit64u op1_64, op2_64, index;
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Bit64s displacement64;
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op2_64 = BX_READ_64BIT_REG(i->nnn());
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index = op2_64 & 0x3f;
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displacement64 = ((Bit64s) (op2_64 & BX_CONST64(0xffffffffffffffc0))) / 64;
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op1_addr = RMAddr(i) + 8 * displacement64;
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if (! i->as64L())
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op1_addr = (Bit32u) op1_addr;
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/* pointer, segment address pair */
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op1_64 = read_RMW_virtual_qword_64(i->seg(), op1_addr);
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bx_bool temp_cf = (op1_64 >> index) & 0x01;
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op1_64 &= ~(((Bit64u) 1) << index);
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/* now write back to destination */
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write_RMW_virtual_qword(op1_64);
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set_CF(temp_cf);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqGqR(bxInstruction_c *i)
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{
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Bit64u op1_64, op2_64;
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op1_64 = BX_READ_64BIT_REG(i->rm());
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op2_64 = BX_READ_64BIT_REG(i->nnn());
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op2_64 &= 0x3f;
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set_CF((op1_64 >> op2_64) & 0x01);
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op1_64 &= ~(((Bit64u) 1) << op2_64);
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/* now write result back to the destination */
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BX_WRITE_64BIT_REG(i->rm(), op1_64);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqGqM(bxInstruction_c *i)
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{
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bx_address op1_addr;
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Bit64u op1_64, op2_64;
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Bit64s displacement64;
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Bit64u index;
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op2_64 = BX_READ_64BIT_REG(i->nnn());
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index = op2_64 & 0x3f;
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displacement64 = ((Bit64s) (op2_64 & BX_CONST64(0xffffffffffffffc0))) / 64;
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op1_addr = RMAddr(i) + 8 * displacement64;
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if (! i->as64L())
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op1_addr = (Bit32u) op1_addr;
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op1_64 = read_RMW_virtual_qword_64(i->seg(), op1_addr);
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bx_bool temp_CF = (op1_64 >> index) & 0x01;
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op1_64 ^= (((Bit64u) 1) << index); /* toggle bit */
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set_CF(temp_CF);
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write_RMW_virtual_qword(op1_64);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqGqR(bxInstruction_c *i)
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{
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Bit64u op1_64, op2_64;
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op1_64 = BX_READ_64BIT_REG(i->rm());
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op2_64 = BX_READ_64BIT_REG(i->nnn());
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op2_64 &= 0x3f;
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bx_bool temp_CF = (op1_64 >> op2_64) & 0x01;
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op1_64 ^= (((Bit64u) 1) << op2_64); /* toggle bit */
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set_CF(temp_CF);
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BX_WRITE_64BIT_REG(i->rm(), op1_64);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqIbM(bxInstruction_c *i)
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{
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit64u op1_64 = read_virtual_qword_64(i->seg(), RMAddr(i));
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Bit8u op2_8 = i->Ib() & 0x3f;
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set_CF((op1_64 >> op2_8) & 0x01);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EqIbR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
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Bit8u op2_8 = i->Ib() & 0x3f;
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set_CF((op1_64 >> op2_8) & 0x01);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqIbM(bxInstruction_c *i)
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{
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Bit8u op2_8 = i->Ib() & 0x3f;
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), RMAddr(i));
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bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
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op1_64 |= (((Bit64u) 1) << op2_8);
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write_RMW_virtual_qword(op1_64);
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set_CF(temp_CF);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EqIbR(bxInstruction_c *i)
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{
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Bit8u op2_8 = i->Ib() & 0x3f;
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Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
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bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
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op1_64 |= (((Bit64u) 1) << op2_8);
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BX_WRITE_64BIT_REG(i->rm(), op1_64);
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set_CF(temp_CF);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqIbM(bxInstruction_c *i)
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{
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Bit8u op2_8 = i->Ib() & 0x3f;
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), RMAddr(i));
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bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
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op1_64 ^= (((Bit64u) 1) << op2_8); /* toggle bit */
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write_RMW_virtual_qword(op1_64);
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set_CF(temp_CF);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EqIbR(bxInstruction_c *i)
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{
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Bit8u op2_8 = i->Ib() & 0x3f;
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Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
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bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
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op1_64 ^= (((Bit64u) 1) << op2_8); /* toggle bit */
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BX_WRITE_64BIT_REG(i->rm(), op1_64);
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set_CF(temp_CF);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqIbM(bxInstruction_c *i)
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{
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Bit8u op2_8 = i->Ib() & 0x3f;
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit64u op1_64 = read_RMW_virtual_qword_64(i->seg(), RMAddr(i));
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bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
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op1_64 &= ~(((Bit64u) 1) << op2_8);
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write_RMW_virtual_qword(op1_64);
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set_CF(temp_CF);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EqIbR(bxInstruction_c *i)
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{
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Bit8u op2_8 = i->Ib() & 0x3f;
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Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
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bx_bool temp_CF = (op1_64 >> op2_8) & 0x01;
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op1_64 &= ~(((Bit64u) 1) << op2_8);
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BX_WRITE_64BIT_REG(i->rm(), op1_64);
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set_CF(temp_CF);
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}
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/* 0F B8 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::POPCNT_GqEq(bxInstruction_c *i)
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{
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#if BX_SUPPORT_POPCNT || (BX_SUPPORT_SSE >= 5) || (BX_SUPPORT_SSE >= 4 && BX_SUPPORT_SSE_EXTENSION > 0)
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Bit64u op1_64, op2_64;
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/* op2_16 is a register or memory reference */
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if (i->modC0()) {
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op2_64 = BX_READ_64BIT_REG(i->rm());
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}
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else {
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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op2_64 = read_virtual_qword_64(i->seg(), RMAddr(i));
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}
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op1_64 = 0;
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while (op2_64 != 0) {
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if (op2_64 & 1) op1_64++;
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op2_64 >>= 1;
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}
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Bit32u flags = op1_64 ? 0 : EFlagsZFMask;
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setEFlagsOSZAPC(flags);
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/* now write result back to destination */
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BX_WRITE_64BIT_REG(i->nnn(), op1_64);
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#else
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BX_INFO(("POPCNT_GqEq: required POPCNT support, use --enable-popcnt option"));
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UndefinedOpcode(i);
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#endif
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}
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#endif // BX_SUPPORT_X86_64
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