Bochs/bochs/memory
Kevin Lawton f0c9896964 Now, when you compile with --enable-guest2host-tlb, non-paged
mode uses the notion of the guest-to-host TLB.  This has the
benefit of allowing more uniform and streamlined acceleration
code in access.cc which does not have to check if CR0.PG
is set, eliminating a few instructions per guest access.
Shaved just a little off execution time, as expected.

Also, access_linear now breaks accesses which span two pages,
into two calls the the physical memory routines, when paging
is off, just like it always has for paging on.  Besides
being more uniform, this allows the physical memory access
routines to known the complete data item is contained
within a single physical page, and stop reapplying the
A20ADDR() macro to pointers as it increments them.
Perhaps things can be optimized a little more now there too...
I renamed the routines to {read,write}PhysicalPage() as
a reminder that these routines now operate on data
solely within one page.

I also added a little code so that the paging module is
notified when the A20 line is tweaked, so it can dump
whatever mappings it wants to.
2002-09-05 02:31:24 +00:00
..
Makefile.in - use @CPP_SUFFIX@ substitution to get the dependencies right for nmake too 2001-10-07 20:19:04 +00:00
memory.cc Now, when you compile with --enable-guest2host-tlb, non-paged 2002-09-05 02:31:24 +00:00
memory.h Now, when you compile with --enable-guest2host-tlb, non-paged 2002-09-05 02:31:24 +00:00
misc_mem.cc - remove panic condition "memory not suitably aligned" and replace with 2002-09-04 02:11:33 +00:00