681 lines
18 KiB
C++
681 lines
18 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: data_xfer32.cc,v 1.55 2008-03-22 21:29:39 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_X86_64==0
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// Make life easier for merging cpu64 and cpu32 code.
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#define RAX EAX
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#endif
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_ERXEAX(bxInstruction_c *i)
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{
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#if BX_SUPPORT_X86_64
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if (i->opcodeReg() == 0) // 'xchg eax, eax' is NOP even in 64-bit mode
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return;
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#endif
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Bit32u temp32 = EAX;
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RAX = BX_READ_32BIT_REG(i->opcodeReg());
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BX_WRITE_32BIT_REGZ(i->opcodeReg(), temp32);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_ERXId(bxInstruction_c *i)
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{
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BX_WRITE_32BIT_REGZ(i->opcodeReg(), i->Id());
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EdGdM(bxInstruction_c *i)
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{
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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write_virtual_dword(i->seg(), RMAddr(i), BX_READ_32BIT_REG(i->nnn()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EdGdR(bxInstruction_c *i)
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{
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BX_WRITE_32BIT_REGZ(i->rm(), BX_READ_32BIT_REG(i->nnn()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GdEdR(bxInstruction_c *i)
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{
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BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GdEdM(bxInstruction_c *i)
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{
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u val32 = read_virtual_dword(i->seg(), RMAddr(i));
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BX_WRITE_32BIT_REGZ(i->nnn(), val32);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::LEA_GdM(bxInstruction_c *i)
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{
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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BX_WRITE_32BIT_REGZ(i->nnn(), RMAddr(i));
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EAXOd(bxInstruction_c *i)
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{
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RAX = read_virtual_dword(i->seg(), i->Id());
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OdEAX(bxInstruction_c *i)
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{
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write_virtual_dword(i->seg(), i->Id(), EAX);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EdIdM(bxInstruction_c *i)
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{
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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write_virtual_dword(i->seg(), RMAddr(i), i->Id());
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEbM(bxInstruction_c *i)
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{
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit8u op2_8 = read_virtual_byte(i->seg(), RMAddr(i));
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/* zero extend byte op2 into dword op1 */
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BX_WRITE_32BIT_REGZ(i->nnn(), (Bit32u) op2_8);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEbR(bxInstruction_c *i)
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{
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Bit8u op2_8 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
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/* zero extend byte op2 into dword op1 */
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BX_WRITE_32BIT_REGZ(i->nnn(), (Bit32u) op2_8);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEwM(bxInstruction_c *i)
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{
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit16u op2_16 = read_virtual_word(i->seg(), RMAddr(i));
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/* zero extend word op2 into dword op1 */
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BX_WRITE_32BIT_REGZ(i->nnn(), (Bit32u) op2_16);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEwR(bxInstruction_c *i)
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{
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Bit16u op2_16 = BX_READ_16BIT_REG(i->rm());
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/* zero extend word op2 into dword op1 */
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BX_WRITE_32BIT_REGZ(i->nnn(), (Bit32u) op2_16);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEbM(bxInstruction_c *i)
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{
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit8u op2_8 = read_virtual_byte(i->seg(), RMAddr(i));
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/* sign extend byte op2 into dword op1 */
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BX_WRITE_32BIT_REGZ(i->nnn(), (Bit8s) op2_8);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEbR(bxInstruction_c *i)
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{
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Bit8u op2_8 = BX_READ_8BIT_REGx(i->rm(), i->extend8bitL());
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/* sign extend byte op2 into dword op1 */
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BX_WRITE_32BIT_REGZ(i->nnn(), (Bit8s) op2_8);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEwM(bxInstruction_c *i)
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{
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit16u op2_16 = read_virtual_word(i->seg(), RMAddr(i));
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/* sign extend word op2 into dword op1 */
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BX_WRITE_32BIT_REGZ(i->nnn(), (Bit16s) op2_16);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEwR(bxInstruction_c *i)
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{
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Bit16u op2_16 = BX_READ_16BIT_REG(i->rm());
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/* sign extend word op2 into dword op1 */
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BX_WRITE_32BIT_REGZ(i->nnn(), (Bit16s) op2_16);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EdGdM(bxInstruction_c *i)
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{
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Bit32u op2_32, op1_32;
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op1_32 = read_RMW_virtual_dword(i->seg(), RMAddr(i));
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op2_32 = BX_READ_32BIT_REG(i->nnn());
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write_RMW_virtual_dword(op2_32);
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BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EdGdR(bxInstruction_c *i)
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{
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Bit32u op1_32 = BX_READ_32BIT_REG(i->rm());
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Bit32u op2_32 = BX_READ_32BIT_REG(i->nnn());
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BX_WRITE_32BIT_REGZ(i->nnn(), op1_32);
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BX_WRITE_32BIT_REGZ(i->rm(), op2_32);
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}
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// Note: CMOV accesses a memory source operand (read), regardless
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// of whether condition is true or not. Thus, exceptions may
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// occur even if the MOV does not take place.
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVO_GdEdM(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
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if (get_OF())
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BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVO_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVO_GdEdR(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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if (get_OF())
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BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVO_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNO_GdEdM(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
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if (!get_OF())
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BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVNO_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNO_GdEdR(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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if (!get_OF())
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BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVNO_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVB_GdEdM(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
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if (get_CF())
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BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVB_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVB_GdEdR(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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if (get_CF())
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BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVB_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNB_GdEdM(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
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if (!get_CF())
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BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVNB_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNB_GdEdR(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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if (!get_CF())
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BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVNB_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVZ_GdEdM(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
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if (get_ZF())
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BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVZ_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVZ_GdEdR(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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if (get_ZF())
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BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVZ_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNZ_GdEdM(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
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if (!get_ZF())
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BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVNZ_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNZ_GdEdR(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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if (!get_ZF())
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BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVNZ_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVBE_GdEdM(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
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if (get_CF() || get_ZF())
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BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVBE_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVBE_GdEdR(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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if (get_CF() || get_ZF())
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BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVBE_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNBE_GdEdM(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
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if (! (get_CF() || get_ZF()))
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BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
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#else
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BX_INFO(("CMOVNBE_GdEd: --enable-cpu-level=6 required"));
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UndefinedOpcode(i);
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNBE_GdEdR(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL >= 6
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if (! (get_CF() || get_ZF()))
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BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
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BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVNBE_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVS_GdEdM(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
if (get_SF())
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVS_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVS_GdEdR(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
if (get_SF())
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVS_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNS_GdEdM(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
if (!get_SF())
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVNS_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNS_GdEdR(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
if (!get_SF())
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVNS_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVP_GdEdM(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
if (get_PF())
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVP_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVP_GdEdR(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
if (get_PF())
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVP_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNP_GdEdM(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
if (!get_PF())
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVNP_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNP_GdEdR(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
if (!get_PF())
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVNP_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVL_GdEdM(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
if (getB_SF() != getB_OF())
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVL_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVL_GdEdR(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
if (getB_SF() != getB_OF())
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVL_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNL_GdEdM(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
if (getB_SF() == getB_OF())
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVNL_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNL_GdEdR(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
if (getB_SF() == getB_OF())
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVNL_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVLE_GdEdM(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
if (get_ZF() || (getB_SF() != getB_OF()))
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVLE_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVLE_GdEdR(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
if (get_ZF() || (getB_SF() != getB_OF()))
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVLE_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNLE_GdEdM(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
|
|
|
|
Bit32u op2_32 = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
if (! get_ZF() && (getB_SF() == getB_OF()))
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), op2_32);
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVNLE_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|
|
|
|
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNLE_GdEdR(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL >= 6
|
|
if (! get_ZF() && (getB_SF() == getB_OF()))
|
|
BX_WRITE_32BIT_REGZ(i->nnn(), BX_READ_32BIT_REG(i->rm()));
|
|
|
|
BX_CLEAR_64BIT_HIGH(i->nnn()); // always clear upper part of the register
|
|
#else
|
|
BX_INFO(("CMOVNLE_GdEd: --enable-cpu-level=6 required"));
|
|
UndefinedOpcode(i);
|
|
#endif
|
|
}
|