cec9135e9f
"bx_bool" which is always defined as Bit32u on all platforms. In Carbon
specific code, Boolean is still used because the Carbon header files
define it to unsigned char.
- this fixes bug [ 623152 ] MacOSX: Triple Exception Booting win95.
The bug was that some code in Bochs depends on Boolean to be a
32 bit value. (This should be fixed, but I don't know all the places
where it needs to be fixed yet.) Because Carbon defined Boolean as
an unsigned char, Bochs just followed along and used the unsigned char
definition to avoid compile problems. This exposed the dependency
on 32 bit Boolean on MacOS X only and led to major simulation problems,
that could only be reproduced and debugged on that platform.
- On the mailing list we debated whether to make all Booleans into "bool" or
our own type. I chose bx_bool for several reasons.
1. Unlike C++'s bool, we can guarantee that bx_bool is the same size on all
platforms, which makes it much less likely to have more platform-specific
simulation differences in the future. (I spent hours on a borrowed
MacOSX machine chasing bug 618388 before discovering that different sized
Booleans were the problem, and I don't want to repeat that.)
2. We still have at least one dependency on 32 bit Booleans which must be
fixed some time, but I don't want to risk introducing new bugs into the
simulation just before the 2.0 release.
Modified Files:
bochs.h config.h.in gdbstub.cc logio.cc main.cc pc_system.cc
pc_system.h plugin.cc plugin.h bios/rombios.c cpu/apic.cc
cpu/arith16.cc cpu/arith32.cc cpu/arith64.cc cpu/arith8.cc
cpu/cpu.cc cpu/cpu.h cpu/ctrl_xfer16.cc cpu/ctrl_xfer32.cc
cpu/ctrl_xfer64.cc cpu/data_xfer16.cc cpu/data_xfer32.cc
cpu/data_xfer64.cc cpu/debugstuff.cc cpu/exception.cc
cpu/fetchdecode.cc cpu/flag_ctrl_pro.cc cpu/init.cc
cpu/io_pro.cc cpu/lazy_flags.cc cpu/lazy_flags.h cpu/mult16.cc
cpu/mult32.cc cpu/mult64.cc cpu/mult8.cc cpu/paging.cc
cpu/proc_ctrl.cc cpu/segment_ctrl_pro.cc cpu/stack_pro.cc
cpu/tasking.cc debug/dbg_main.cc debug/debug.h debug/sim2.cc
disasm/dis_decode.cc disasm/disasm.h doc/docbook/Makefile
docs-html/cosimulation.html fpu/wmFPUemu_glue.cc
gui/amigaos.cc gui/beos.cc gui/carbon.cc gui/gui.cc gui/gui.h
gui/keymap.cc gui/keymap.h gui/macintosh.cc gui/nogui.cc
gui/rfb.cc gui/sdl.cc gui/siminterface.cc gui/siminterface.h
gui/term.cc gui/win32.cc gui/wx.cc gui/wxmain.cc gui/wxmain.h
gui/x.cc instrument/example0/instrument.cc
instrument/example0/instrument.h
instrument/example1/instrument.cc
instrument/example1/instrument.h
instrument/stubs/instrument.cc instrument/stubs/instrument.h
iodev/cdrom.cc iodev/cdrom.h iodev/cdrom_osx.cc iodev/cmos.cc
iodev/devices.cc iodev/dma.cc iodev/dma.h iodev/eth_arpback.cc
iodev/eth_packetmaker.cc iodev/eth_packetmaker.h
iodev/floppy.cc iodev/floppy.h iodev/guest2host.h
iodev/harddrv.cc iodev/harddrv.h iodev/ioapic.cc
iodev/ioapic.h iodev/iodebug.cc iodev/iodev.h
iodev/keyboard.cc iodev/keyboard.h iodev/ne2k.h
iodev/parallel.h iodev/pci.cc iodev/pci.h iodev/pic.h
iodev/pit.cc iodev/pit.h iodev/pit_wrap.cc iodev/pit_wrap.h
iodev/sb16.cc iodev/sb16.h iodev/serial.cc iodev/serial.h
iodev/vga.cc iodev/vga.h memory/memory.h memory/misc_mem.cc
492 lines
11 KiB
C++
492 lines
11 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: mult64.cc,v 1.5 2002-10-25 11:44:35 bdenney Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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unsigned partial_add(Bit32u *sum,Bit32u b)
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{
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Bit32u t = *sum;
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*sum += b;
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return (*sum < t);
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}
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void
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long_mul(Bit128u *product, Bit64u op1, Bit64u op2)
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{
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Bit32u op_1[2],op_2[2];
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Bit32u result[5];
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Bit64u nn;
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unsigned c;
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int i,j,k;
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op_1[0] = op1 & 0xffffffff;
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op_1[1] = op1 >> 32;
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op_2[0] = op2 & 0xffffffff;
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op_2[1] = op2 >> 32;
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for (i = 0; i < 4; i++) result[i] = 0;
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for (i = 0; i < 2; i++) {
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for (j = 0; j < 2; j++) {
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nn = (Bit64u) op_1[i] * (Bit64u) op_2[j];
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k = i + j;
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c = partial_add(&result[k++],nn & 0xffffffff);
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c = partial_add(&result[k++],(nn >> 32) + c);
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while (k < 4 && c != 0) {
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c = partial_add(&result[k++],c);
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}
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}
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}
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product->lo = result[0] + ((Bit64u) result[1] << 32);
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product->hi = result[2] + ((Bit64u) result[3] << 32);
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}
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void
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long_neg(Bit128s *n)
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{
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Bit64u t;
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t = n->lo;
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n->lo = -n->lo;
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if (t > (Bit64u)n->lo) --n->hi;
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n->hi = -n->hi;
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}
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void
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long_imul(Bit128s *product, Bit64s op1, Bit64s op2)
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{
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unsigned s1,s2;
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//BX_DEBUG (("long_imul %08X%08X X %08X%08X->",(unsigned)(op1 >> 32),(unsigned)op1,(unsigned)(op2 >> 32),(unsigned)op2));
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if (s1 = (op1 < 0)) op1 = -op1;
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if (s2 = (op2 < 0)) op2 = -op2;
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long_mul((Bit128u*)product,(Bit64u)op1,(Bit64u)op2);
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if (s1 ^ s2) {
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long_neg(product);
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}
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//BX_DEBUG (("%08X%08X%08X%08X",
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// (unsigned)(product->hi >> 32),(unsigned)product->hi,
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// (unsigned)(product->lo >> 32),(unsigned)product->lo));
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}
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void
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long_shl(Bit128u *a)
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{
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Bit64u c;
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c = a->lo >> 63;
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a->lo <<= 1;
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a->hi <<= 1;
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a->hi |= c;
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}
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void
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long_shr(Bit128u *a)
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{
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Bit64u c;
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c = a->hi << 63;
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a->hi >>= 1;
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a->lo >>= 1;
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a->lo |= c;
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}
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unsigned
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long_sub(Bit128u *a,Bit128u *b)
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{
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Bit64u t;
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int c;
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t = a->lo;
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a->lo -= b->lo;
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c = (a->lo > t);
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t = a -> hi;
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a->hi -= b->hi + c;
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return(a->hi > t);
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}
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bx_bool
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long_le(Bit128u *a,Bit128u *b)
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{
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if (a->hi == b->hi) {
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return(a->lo <= b->lo);
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} else {
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return(a->hi <= b->hi);
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}
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}
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void
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long_div(Bit128u *quotient,Bit64u *remainder,Bit128u *dividend,Bit64u divisor)
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{
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/*
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n := 0;
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while (divisor <= dividend) do
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inc(n);
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divisor := divisor * 2;
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end;
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quotient := 0;
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while n > 0 do
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divisor := divisor div 2;
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quotient := quotient * 2;
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temp := dividend;
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dividend := dividend - divisor;
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if temp > dividend then
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dividend := temp;
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else
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inc(quotient);
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end;
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dec(n);
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end;
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remainder := dividend;
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*/
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Bit128u d,acc,q,temp;
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int n,c;
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d.lo = divisor;
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d.hi = 0;
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acc.lo = dividend->lo;
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acc.hi = dividend->hi;
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q.lo = 0;
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q.hi = 0;
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n = 0;
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//BX_DEBUG (("ldiv: n=%d d=%08X acc=%08X",n,d.lo,acc.lo));
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while (long_le(&d,&acc) && n < 128) {
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long_shl(&d);
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n++;
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}
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//BX_DEBUG (("ldiv: n=%d d=%08X acc=%08X",n,d.lo,acc.lo));
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while (n > 0) {
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long_shr(&d);
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long_shl(&q);
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temp.lo = acc.lo;
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temp.hi = acc.hi;
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c = long_sub(&acc,&d);
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if (c) {
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acc.lo = temp.lo;
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acc.hi = temp.hi;
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} else {
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q.lo++;
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}
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n--;
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}
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//BX_DEBUG (("ldiv: n=%d d=%08X acc=%08X",n,d.lo,acc.lo));
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*remainder = acc.lo;
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quotient->lo = q.lo;
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quotient->hi = q.hi;
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}
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void
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long_idiv(Bit128s *quotient,Bit64s *remainder,Bit128s *dividend,Bit64s divisor)
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{
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unsigned s1,s2;
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Bit128s temp;
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temp = *dividend;
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if (s1 = (temp.hi < 0)) {
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long_neg(&temp);
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}
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if (s2 = (divisor < 0)) divisor = -divisor;
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long_div((Bit128u*)quotient,(Bit64u*)remainder,(Bit128u*)&temp,divisor);
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if (s1 ^ s2) {
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long_neg(quotient);
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}
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if (s2) {
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*remainder = -*remainder;
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}
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}
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void
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BX_CPU_C::MUL_RAXEq(bxInstruction_c *i)
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{
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Bit64u op1_64, op2_64;
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Bit128u product_128;
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bx_bool temp_flag;
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op1_64 = RAX;
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/* op2 is a register or memory reference */
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if (i->modC0()) {
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op2_64 = BX_READ_64BIT_REG(i->rm());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
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}
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//product_128 = ((Bit128u) op1_64) * ((Bit128u) op2_64);
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long_mul(&product_128,op1_64,op2_64);
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//product_64l = (Bit64u) (product_128 & 0xFFFFFFFFFFFFFFFF);
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//product_64h = (Bit64u) (product_128 >> 64);
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/* now write product back to destination */
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RAX = product_128.lo;
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RDX = product_128.hi;
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/* set eflags:
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* MUL affects the following flags: C,O
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*/
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temp_flag = (product_128.hi != 0);
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SET_FLAGS_OxxxxC(temp_flag, temp_flag);
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}
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void
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BX_CPU_C::IMUL_RAXEq(bxInstruction_c *i)
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{
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Bit64s op1_64, op2_64;
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Bit128s product_128;
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//Bit64u product_64h, product_64l;
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op1_64 = RAX;
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/* op2 is a register or memory reference */
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if (i->modC0()) {
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op2_64 = BX_READ_64BIT_REG(i->rm());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_qword(i->seg(), RMAddr(i), (Bit64u *) &op2_64);
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}
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//product_128 = ((Bit128s) op1_64) * ((Bit128s) op2_64);
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long_imul(&product_128,op1_64,op2_64);
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//product_64l = (Bit64u) (product_128 & 0xFFFFFFFFFFFFFFFF);
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//product_64h = (Bit64u) (product_128 >> 64);
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/* now write product back to destination */
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RAX = product_128.lo;
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RDX = product_128.hi;
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/* set eflags:
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* IMUL affects the following flags: C,O
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* IMUL r/m16: condition for clearing CF & OF:
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* RDX:RAX = sign-extend of RAX
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*/
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if ( (RDX==BX_CONST64(0xffffffffffffffff)) && (RAX & BX_CONST64(0x8000000000000000)) ) {
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SET_FLAGS_OxxxxC(0, 0);
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}
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else if ( (RDX==BX_CONST64(0x0000000000000000)) && (RAX < BX_CONST64(0x8000000000000000)) ) {
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SET_FLAGS_OxxxxC(0, 0);
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}
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else {
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SET_FLAGS_OxxxxC(1, 1);
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}
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}
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void
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BX_CPU_C::DIV_RAXEq(bxInstruction_c *i)
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{
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Bit64u op2_64, remainder_64, quotient_64l;
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Bit128u op1_128, quotient_128;
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op1_128.lo = RAX;
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op1_128.hi = RDX;
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/* op2 is a register or memory reference */
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if (i->modC0()) {
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op2_64 = BX_READ_64BIT_REG(i->rm());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_qword(i->seg(), RMAddr(i), &op2_64);
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}
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if (op2_64 == 0) {
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exception(BX_DE_EXCEPTION, 0, 0);
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}
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//quotient_128 = op1_128 / op2_64;
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//remainder_64 = (Bit64u) (op1_128 % op2_64);
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//quotient_64l = (Bit64u) (quotient_128 & 0xFFFFFFFFFFFFFFFF);
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long_div("ient_128,&remainder_64,&op1_128,op2_64);
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quotient_64l = quotient_128.lo;
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//if (quotient_128 != quotient_64l) {
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if (quotient_128.hi != 0) {
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exception(BX_DE_EXCEPTION, 0, 0);
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}
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/* set EFLAGS:
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* DIV affects the following flags: O,S,Z,A,P,C are undefined
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*/
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/* now write quotient back to destination */
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RAX = quotient_64l;
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RDX = remainder_64;
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}
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void
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BX_CPU_C::IDIV_RAXEq(bxInstruction_c *i)
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{
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Bit64s op2_64, remainder_64, quotient_64l;
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Bit128s op1_128, quotient_128;
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op1_128.lo = RAX;
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op1_128.hi = RDX;
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/* op2 is a register or memory reference */
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if (i->modC0()) {
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op2_64 = BX_READ_64BIT_REG(i->rm());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_qword(i->seg(), RMAddr(i), (Bit64u *) &op2_64);
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}
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if (op2_64 == 0) {
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exception(BX_DE_EXCEPTION, 0, 0);
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}
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//quotient_128 = op1_128 / op2_64;
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//remainder_64 = (Bit64s) (op1_128 % op2_64);
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//quotient_64l = (Bit64s) (quotient_128 & 0xFFFFFFFFFFFFFFFF);
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long_idiv("ient_128,&remainder_64,&op1_128,op2_64);
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quotient_64l = quotient_128.lo;
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//if (quotient_128 != quotient_64l) {
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if (quotient_128.hi != 0) {
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exception(BX_DE_EXCEPTION, 0, 0);
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}
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/* set EFLAGS:
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* IDIV affects the following flags: O,S,Z,A,P,C are undefined
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*/
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/* now write quotient back to destination */
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RAX = quotient_64l;
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RDX = remainder_64;
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}
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void
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BX_CPU_C::IMUL_GqEqId(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL < 2
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BX_PANIC(("IMUL_GdEdId() unsupported on 8086!"));
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#else
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Bit64s op2_64, op3_64, product_64;
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Bit128s product_128;
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op3_64 = (Bit32s) i->Id();
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/* op2 is a register or memory reference */
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if (i->modC0()) {
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op2_64 = BX_READ_64BIT_REG(i->rm());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_qword(i->seg(), RMAddr(i), (Bit64u *) &op2_64);
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}
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product_64 = op2_64 * op3_64;
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//product_128 = ((Bit128s) op2_64) * ((Bit128s) op3_64);
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long_imul(&product_128,op2_64,op3_64);
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/* now write product back to destination */
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BX_WRITE_64BIT_REG(i->nnn(), product_64);
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/* set eflags:
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* IMUL affects the following flags: C,O
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* IMUL r16,r/m16,imm16: condition for clearing CF & OF:
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* result exactly fits within r16
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*/
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if (product_128.lo == product_64) {
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SET_FLAGS_OxxxxC(0, 0);
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}
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else {
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SET_FLAGS_OxxxxC(1, 1);
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}
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#endif
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}
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void
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BX_CPU_C::IMUL_GqEq(bxInstruction_c *i)
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{
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#if BX_CPU_LEVEL < 3
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BX_PANIC(("IMUL_GvEv() unsupported on 8086!"));
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#else
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Bit64s op1_64, op2_64, product_64;
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Bit128s product_128;
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/* op2 is a register or memory reference */
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if (i->modC0()) {
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op2_64 = BX_READ_64BIT_REG(i->rm());
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}
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else {
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/* pointer, segment address pair */
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read_virtual_qword(i->seg(), RMAddr(i), (Bit64u *) &op2_64);
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}
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op1_64 = BX_READ_64BIT_REG(i->nnn());
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product_64 = op1_64 * op2_64;
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//product_128 = ((Bit128s) op1_64) * ((Bit128s) op2_64);
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long_imul(&product_128,op1_64,op2_64);
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|
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/* now write product back to destination */
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BX_WRITE_64BIT_REG(i->nnn(), product_64);
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|
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/* set eflags:
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|
* IMUL affects the following flags: C,O
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|
* IMUL r16,r/m16,imm16: condition for clearing CF & OF:
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|
* result exactly fits within r16
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|
*/
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|
|
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if (product_128.lo == product_64) {
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SET_FLAGS_OxxxxC(0, 0);
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|
}
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else {
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SET_FLAGS_OxxxxC(1, 1);
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|
}
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#endif
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}
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