49664f7503
tries to fix it. The shortcuts to register names such as AX and DL are #defines in cpu/cpu.h, and they are defined in terms of BX_CPU_THIS_PTR. When BX_USE_CPU_SMF=1, this works fine. (This is what bochs used for a long time, and nobody used the SMF=0 mode at all.) To make SMP bochs work, I had to get SMF=0 mode working for the CPU so that there could be an array of cpus. When SMF=0 for the CPU, BX_CPU_THIS_PTR is defined to be "this->" which only works within methods of BX_CPU_C. Code outside of BX_CPU_C must reference BX_CPU(num) instead. - to try to enforce the correct use of AL/AX/DL/etc. shortcuts, they are now only #defined when "NEED_CPU_REG_SHORTCUTS" is #defined. This is only done in the cpu/*.cc code.
382 lines
6.8 KiB
C++
382 lines
6.8 KiB
C++
// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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void
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BX_CPU_C::INSB_YbDX(BxInstruction_t *i)
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{
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Bit8u value8=0;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR eflags.vm || (CPL>IOPL))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 1) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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if (i->as_32) {
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_byte(BX_SEG_REG_ES, EDI, &value8);
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value8 = BX_INP(DX, 1);
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/* no seg override possible */
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write_virtual_byte(BX_SEG_REG_ES, EDI, &value8);
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if (BX_CPU_THIS_PTR eflags.df) {
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EDI = EDI - 1;
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}
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else {
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EDI = EDI + 1;
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}
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}
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else {
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_byte(BX_SEG_REG_ES, DI, &value8);
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value8 = BX_INP(DX, 1);
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/* no seg override possible */
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write_virtual_byte(BX_SEG_REG_ES, DI, &value8);
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if (BX_CPU_THIS_PTR eflags.df) {
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DI = DI - 1;
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}
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else {
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DI = DI + 1;
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}
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}
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}
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void
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BX_CPU_C::INSW_YvDX(BxInstruction_t *i)
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// input word/doubleword from port to string
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{
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Bit32u edi;
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unsigned int incr;
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if (i->as_32)
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edi = EDI;
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else
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edi = DI;
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if (i->os_32) {
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Bit32u value32=0;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR eflags.vm || (CPL>IOPL))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 4) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_dword(BX_SEG_REG_ES, edi, &value32);
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value32 = BX_INP(DX, 4);
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/* no seg override allowed */
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write_virtual_dword(BX_SEG_REG_ES, edi, &value32);
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incr = 4;
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}
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else {
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Bit16u value16=0;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR eflags.vm || (CPL>IOPL))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 2) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_word(BX_SEG_REG_ES, edi, &value16);
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value16 = BX_INP(DX, 2);
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/* no seg override allowed */
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write_virtual_word(BX_SEG_REG_ES, edi, &value16);
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incr = 2;
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}
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if (i->as_32) {
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if (BX_CPU_THIS_PTR eflags.df)
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EDI = EDI - incr;
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else
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EDI = EDI + incr;
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}
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else {
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if (BX_CPU_THIS_PTR eflags.df)
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DI = DI - incr;
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else
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DI = DI + incr;
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}
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}
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void
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BX_CPU_C::OUTSB_DXXb(BxInstruction_t *i)
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{
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unsigned seg;
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Bit8u value8;
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Bit32u esi;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR eflags.vm || (CPL>IOPL))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 1) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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if (!BX_NULL_SEG_REG(i->seg)) {
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seg = i->seg;
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}
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else {
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seg = BX_SEG_REG_DS;
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}
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if (i->as_32)
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esi = ESI;
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else
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esi = SI;
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read_virtual_byte(seg, esi, &value8);
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BX_OUTP(DX, value8, 1);
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if (i->as_32) {
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if (BX_CPU_THIS_PTR eflags.df)
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ESI -= 1;
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else
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ESI += 1;
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}
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else {
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if (BX_CPU_THIS_PTR eflags.df)
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SI -= 1;
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else
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SI += 1;
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}
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}
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void
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BX_CPU_C::OUTSW_DXXv(BxInstruction_t *i)
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// output word/doubleword string to port
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{
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unsigned seg;
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Bit32u esi;
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unsigned int incr;
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if (!BX_NULL_SEG_REG(i->seg)) {
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seg = i->seg;
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}
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else {
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seg = BX_SEG_REG_DS;
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}
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if (i->as_32)
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esi = ESI;
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else
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esi = SI;
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if (i->os_32) {
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Bit32u value32;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR eflags.vm || (CPL>IOPL))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 4) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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read_virtual_dword(seg, esi, &value32);
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BX_OUTP(DX, value32, 4);
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incr = 4;
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}
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else {
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Bit16u value16;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR eflags.vm || (CPL>IOPL))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 2) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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read_virtual_word(seg, esi, &value16);
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BX_OUTP(DX, value16, 2);
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incr = 2;
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}
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if (i->as_32) {
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if (BX_CPU_THIS_PTR eflags.df)
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ESI = ESI - incr;
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else
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ESI = ESI + incr;
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}
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else {
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if (BX_CPU_THIS_PTR eflags.df)
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SI = SI - incr;
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else
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SI = SI + incr;
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}
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}
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void
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BX_CPU_C::IN_ALIb(BxInstruction_t *i)
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{
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Bit8u al, imm8;
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imm8 = i->Ib;
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al = BX_CPU_THIS_PTR inp8(imm8);
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AL = al;
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}
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void
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BX_CPU_C::IN_eAXIb(BxInstruction_t *i)
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{
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Bit8u imm8;
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imm8 = i->Ib;
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#if BX_CPU_LEVEL > 2
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if (i->os_32) {
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Bit32u eax;
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eax = BX_CPU_THIS_PTR inp32(imm8);
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EAX = eax;
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}
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else
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#endif /* BX_CPU_LEVEL > 2 */
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{
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Bit16u ax;
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ax = BX_CPU_THIS_PTR inp16(imm8);
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AX = ax;
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}
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}
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void
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BX_CPU_C::OUT_IbAL(BxInstruction_t *i)
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{
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Bit8u al, imm8;
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imm8 = i->Ib;
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al = AL;
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BX_CPU_THIS_PTR outp8(imm8, al);
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}
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void
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BX_CPU_C::OUT_IbeAX(BxInstruction_t *i)
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{
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Bit8u imm8;
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imm8 = i->Ib;
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#if BX_CPU_LEVEL > 2
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if (i->os_32) {
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BX_CPU_THIS_PTR outp32(imm8, EAX);
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}
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else
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#endif /* BX_CPU_LEVEL > 2 */
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{
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BX_CPU_THIS_PTR outp16(imm8, AX);
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}
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}
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void
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BX_CPU_C::IN_ALDX(BxInstruction_t *i)
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{
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Bit8u al;
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al = BX_CPU_THIS_PTR inp8(DX);
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AL = al;
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}
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void
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BX_CPU_C::IN_eAXDX(BxInstruction_t *i)
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{
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#if BX_CPU_LEVEL > 2
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if (i->os_32) {
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Bit32u eax;
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eax = BX_CPU_THIS_PTR inp32(DX);
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EAX = eax;
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}
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else
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#endif /* BX_CPU_LEVEL > 2 */
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{
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Bit16u ax;
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ax = BX_CPU_THIS_PTR inp16(DX);
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AX = ax;
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}
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}
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void
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BX_CPU_C::OUT_DXAL(BxInstruction_t *i)
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{
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Bit16u dx;
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Bit8u al;
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dx = DX;
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al = AL;
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BX_CPU_THIS_PTR outp8(dx, al);
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}
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void
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BX_CPU_C::OUT_DXeAX(BxInstruction_t *i)
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{
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Bit16u dx;
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dx = DX;
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#if BX_CPU_LEVEL > 2
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if (i->os_32) {
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BX_CPU_THIS_PTR outp32(dx, EAX);
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}
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else
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#endif /* BX_CPU_LEVEL > 2 */
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{
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BX_CPU_THIS_PTR outp16(dx, AX);
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}
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}
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