402b2c01c9
Only missed AVX-512 opcodes are: 512.66.0F38.W0 2C VSCALEFPS 512.66.0F38.W1 2C VSCALEFPD NDS.LIG.66.0F38.W0 2D VSCALESS NDS.LIG.66.0F38.W1 2D VSCALESD
393 lines
9.4 KiB
C++
393 lines
9.4 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2014 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_CPU_LEVEL >= 3
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BSF_GwEwR(bxInstruction_c *i)
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{
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Bit16u op2_16 = BX_READ_16BIT_REG(i->src());
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if (op2_16 == 0) {
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assert_ZF(); /* op1_16 undefined */
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}
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else {
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Bit16u op1_16 = 0;
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while ((op2_16 & 0x01) == 0) {
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op1_16++;
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op2_16 >>= 1;
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}
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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clear_ZF();
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BX_WRITE_16BIT_REG(i->dst(), op1_16);
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BSR_GwEwR(bxInstruction_c *i)
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{
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Bit16u op2_16 = BX_READ_16BIT_REG(i->src());
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if (op2_16 == 0) {
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assert_ZF(); /* op1_16 undefined */
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}
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else {
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Bit16u op1_16 = 15;
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while ((op2_16 & 0x8000) == 0) {
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op1_16--;
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op2_16 <<= 1;
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}
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SET_FLAGS_OSZAPC_LOGIC_16(op1_16);
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clear_ZF();
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BX_WRITE_16BIT_REG(i->dst(), op1_16);
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EwGwM(bxInstruction_c *i)
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{
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bx_address op1_addr;
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Bit16u op1_16, op2_16, index;
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Bit32s displacement32;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op2_16 = BX_READ_16BIT_REG(i->src());
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index = op2_16 & 0xf;
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displacement32 = ((Bit16s) (op2_16&0xfff0)) / 16;
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op1_addr = eaddr + 2 * displacement32;
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/* pointer, segment address pair */
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op1_16 = read_virtual_word(i->seg(), op1_addr & i->asize_mask());
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set_CF((op1_16 >> index) & 0x01);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EwGwR(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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op1_16 = BX_READ_16BIT_REG(i->dst());
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op2_16 = BX_READ_16BIT_REG(i->src());
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op2_16 &= 0xf;
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set_CF((op1_16 >> op2_16) & 0x01);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EwGwM(bxInstruction_c *i)
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{
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bx_address op1_addr;
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Bit16u op1_16, op2_16, index;
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Bit32s displacement32;
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bx_bool bit_i;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op2_16 = BX_READ_16BIT_REG(i->src());
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index = op2_16 & 0xf;
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displacement32 = ((Bit16s) (op2_16 & 0xfff0)) / 16;
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op1_addr = eaddr + 2 * displacement32;
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/* pointer, segment address pair */
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op1_16 = read_RMW_virtual_word(i->seg(), op1_addr & i->asize_mask());
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bit_i = (op1_16 >> index) & 0x01;
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op1_16 |= (1 << index);
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write_RMW_virtual_word(op1_16);
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set_CF(bit_i);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EwGwR(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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op1_16 = BX_READ_16BIT_REG(i->dst());
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op2_16 = BX_READ_16BIT_REG(i->src());
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op2_16 &= 0xf;
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set_CF((op1_16 >> op2_16) & 0x01);
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op1_16 |= (1 << op2_16);
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/* now write result back to the destination */
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BX_WRITE_16BIT_REG(i->dst(), op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EwGwM(bxInstruction_c *i)
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{
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bx_address op1_addr;
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Bit16u op1_16, op2_16, index;
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Bit32s displacement32;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op2_16 = BX_READ_16BIT_REG(i->src());
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index = op2_16 & 0xf;
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displacement32 = ((Bit16s) (op2_16&0xfff0)) / 16;
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op1_addr = eaddr + 2 * displacement32;
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/* pointer, segment address pair */
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op1_16 = read_RMW_virtual_word(i->seg(), op1_addr & i->asize_mask());
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bx_bool temp_cf = (op1_16 >> index) & 0x01;
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op1_16 &= ~(1 << index);
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/* now write back to destination */
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write_RMW_virtual_word(op1_16);
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set_CF(temp_cf);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EwGwR(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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op1_16 = BX_READ_16BIT_REG(i->dst());
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op2_16 = BX_READ_16BIT_REG(i->src());
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op2_16 &= 0xf;
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set_CF((op1_16 >> op2_16) & 0x01);
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op1_16 &= ~(1 << op2_16);
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/* now write result back to the destination */
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BX_WRITE_16BIT_REG(i->dst(), op1_16);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EwGwM(bxInstruction_c *i)
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{
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bx_address op1_addr;
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Bit16u op1_16, op2_16, index_16;
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Bit16s displacement16;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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op2_16 = BX_READ_16BIT_REG(i->src());
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index_16 = op2_16 & 0xf;
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displacement16 = ((Bit16s) (op2_16 & 0xfff0)) / 16;
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op1_addr = eaddr + 2 * displacement16;
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op1_16 = read_RMW_virtual_word(i->seg(), op1_addr & i->asize_mask());
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bx_bool temp_CF = (op1_16 >> index_16) & 0x01;
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op1_16 ^= (1 << index_16); /* toggle bit */
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write_RMW_virtual_word(op1_16);
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set_CF(temp_CF);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EwGwR(bxInstruction_c *i)
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{
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Bit16u op1_16, op2_16;
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op1_16 = BX_READ_16BIT_REG(i->dst());
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op2_16 = BX_READ_16BIT_REG(i->src());
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op2_16 &= 0xf;
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bx_bool temp_CF = (op1_16 >> op2_16) & 0x01;
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op1_16 ^= (1 << op2_16); /* toggle bit */
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BX_WRITE_16BIT_REG(i->dst(), op1_16);
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set_CF(temp_CF);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EwIbM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit16u op1_16 = read_virtual_word(i->seg(), eaddr);
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Bit8u op2_8 = i->Ib() & 0xf;
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set_CF((op1_16 >> op2_8) & 0x01);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BT_EwIbR(bxInstruction_c *i)
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{
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Bit16u op1_16 = BX_READ_16BIT_REG(i->dst());
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Bit8u op2_8 = i->Ib() & 0xf;
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set_CF((op1_16 >> op2_8) & 0x01);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EwIbM(bxInstruction_c *i)
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{
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Bit8u op2_8 = i->Ib() & 0xf;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit16u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
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op1_16 |= (1 << op2_8);
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write_RMW_virtual_word(op1_16);
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set_CF(temp_CF);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTS_EwIbR(bxInstruction_c *i)
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{
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Bit8u op2_8 = i->Ib() & 0xf;
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Bit16u op1_16 = BX_READ_16BIT_REG(i->dst());
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bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
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op1_16 |= (1 << op2_8);
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BX_WRITE_16BIT_REG(i->dst(), op1_16);
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set_CF(temp_CF);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EwIbM(bxInstruction_c *i)
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{
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Bit8u op2_8 = i->Ib() & 0xf;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit16u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
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op1_16 ^= (1 << op2_8); /* toggle bit */
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write_RMW_virtual_word(op1_16);
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set_CF(temp_CF);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTC_EwIbR(bxInstruction_c *i)
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{
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Bit8u op2_8 = i->Ib() & 0xf;
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Bit16u op1_16 = BX_READ_16BIT_REG(i->dst());
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bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
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op1_16 ^= (1 << op2_8); /* toggle bit */
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BX_WRITE_16BIT_REG(i->dst(), op1_16);
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set_CF(temp_CF);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EwIbM(bxInstruction_c *i)
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{
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Bit8u op2_8 = i->Ib() & 0xf;
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit16u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
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bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
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op1_16 &= ~(1 << op2_8);
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write_RMW_virtual_word(op1_16);
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set_CF(temp_CF);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::BTR_EwIbR(bxInstruction_c *i)
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{
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Bit8u op2_8 = i->Ib() & 0xf;
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Bit16u op1_16 = BX_READ_16BIT_REG(i->dst());
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bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
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op1_16 &= ~(1 << op2_8);
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BX_WRITE_16BIT_REG(i->dst(), op1_16);
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set_CF(temp_CF);
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BX_NEXT_INSTR(i);
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}
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#include "scalar_arith.h"
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/* F3 0F B8 */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::POPCNT_GwEwR(bxInstruction_c *i)
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{
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Bit16u op2_16 = BX_READ_16BIT_REG(i->src());
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Bit16u op1_16 = 0;
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while (op2_16 != 0) {
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op2_16 &= (op2_16-1);
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op1_16++;
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}
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Bit32u flags = op1_16 ? 0 : EFlagsZFMask;
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setEFlagsOSZAPC(flags);
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BX_WRITE_16BIT_REG(i->dst(), op1_16);
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BX_NEXT_INSTR(i);
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}
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/* F3 0F BC */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::TZCNT_GwEwR(bxInstruction_c *i)
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{
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Bit16u op1_16 = BX_READ_16BIT_REG(i->src());
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Bit16u result_16 = (Bit16u) tzcntw(op1_16);
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set_CF(! op1_16);
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set_ZF(! result_16);
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BX_WRITE_16BIT_REG(i->dst(), result_16);
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BX_NEXT_INSTR(i);
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}
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/* F3 0F BD */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LZCNT_GwEwR(bxInstruction_c *i)
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{
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Bit16u op1_16 = BX_READ_16BIT_REG(i->src());
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Bit16u result_16 = (Bit16u) lzcntw(op1_16);
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set_CF(! op1_16);
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set_ZF(! result_16);
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BX_WRITE_16BIT_REG(i->dst(), result_16);
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BX_NEXT_INSTR(i);
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}
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#endif // (BX_CPU_LEVEL >= 3)
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