13feb0772a
feature is enabled by default when configure with --enable-all-optimizations
option, to disable handlers chaining speedups configure with
--disable-handlers-chaining
589 lines
14 KiB
C++
589 lines
14 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2011 The Bochs Project
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_X86_64
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BX_CPP_INLINE void BX_CPP_AttrRegparmN(1) BX_CPU_C::branch_near64(bxInstruction_c *i)
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{
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Bit64u new_RIP = RIP + (Bit32s) i->Id();
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if (! IsCanonical(new_RIP)) {
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BX_ERROR(("branch_near64: canonical RIP violation"));
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exception(BX_GP_EXCEPTION, 0);
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}
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RIP = new_RIP;
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#if BX_SUPPORT_HANDLERS_CHAINING_SPEEDUPS == 0
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// assert magic async_event to stop trace execution
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BX_CPU_THIS_PTR async_event |= BX_ASYNC_EVENT_STOP_TRACE;
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#endif
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RETnear64_Iw(bxInstruction_c *i)
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{
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_ret;
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#endif
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Bit64u return_RIP = read_virtual_qword_64(BX_SEG_REG_SS, RSP);
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if (! IsCanonical(return_RIP)) {
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BX_ERROR(("RETnear64_Iw: canonical RIP violation"));
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exception(BX_GP_EXCEPTION, 0);
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}
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RIP = return_RIP;
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RSP += 8 + i->Iw();
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_RET, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RETnear64(bxInstruction_c *i)
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{
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_ret;
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#endif
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Bit64u return_RIP = read_virtual_qword_64(BX_SEG_REG_SS, RSP);
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if (! IsCanonical(return_RIP)) {
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BX_ERROR(("RETnear64: canonical RIP violation %08x%08x", GET32H(return_RIP), GET32L(return_RIP)));
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exception(BX_GP_EXCEPTION, 0);
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}
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RIP = return_RIP;
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RSP += 8;
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_RET, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RETfar64_Iw(bxInstruction_c *i)
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{
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invalidate_prefetch_q();
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_ret;
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#endif
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BX_ASSERT(protected_mode());
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// return_protected is RSP safe
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return_protected(i, i->Iw());
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BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_RET,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CALL_Jq(bxInstruction_c *i)
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{
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Bit64u new_RIP = RIP + (Bit32s) i->Id();
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_call;
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#endif
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/* push 64 bit EA of next instruction */
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write_virtual_qword_64(BX_SEG_REG_SS, RSP-8, RIP);
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if (! IsCanonical(new_RIP)) {
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BX_ERROR(("CALL_Jq: canonical RIP violation"));
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exception(BX_GP_EXCEPTION, 0);
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}
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RIP = new_RIP;
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RSP -= 8;
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_CALL, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CALL_EqR(bxInstruction_c *i)
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{
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_call;
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#endif
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Bit64u new_RIP = BX_READ_64BIT_REG(i->rm());
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/* push 64 bit EA of next instruction */
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write_virtual_qword_64(BX_SEG_REG_SS, RSP-8, RIP);
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if (! IsCanonical(new_RIP))
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{
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BX_ERROR(("CALL_Eq: canonical RIP violation"));
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exception(BX_GP_EXCEPTION, 0);
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}
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RIP = new_RIP;
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RSP -= 8;
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_CALL, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CALL64_Ep(bxInstruction_c *i)
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{
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invalidate_prefetch_q();
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_call;
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#endif
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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/* pointer, segment address pair */
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Bit64u op1_64 = read_virtual_qword_64(i->seg(), eaddr);
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Bit16u cs_raw = read_virtual_word_64(i->seg(), (eaddr+8) & i->asize_mask());
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BX_ASSERT(protected_mode());
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// call_protected is RSP safe for 64-bit mode
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call_protected(i, cs_raw, op1_64);
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BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_CALL,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JMP_Jq(bxInstruction_c *i)
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{
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Bit64u new_RIP = RIP + (Bit32s) i->Id();
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if (! IsCanonical(new_RIP)) {
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BX_ERROR(("JMP_Jq: canonical RIP violation"));
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exception(BX_GP_EXCEPTION, 0);
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}
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RIP = new_RIP;
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JO_Jq(bxInstruction_c *i)
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{
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if (get_OF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNO_Jq(bxInstruction_c *i)
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{
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if (! get_OF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JB_Jq(bxInstruction_c *i)
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{
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if (get_CF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNB_Jq(bxInstruction_c *i)
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{
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if (! get_CF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JZ_Jq(bxInstruction_c *i)
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{
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if (get_ZF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNZ_Jq(bxInstruction_c *i)
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{
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if (! get_ZF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JBE_Jq(bxInstruction_c *i)
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{
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if (get_CF() || get_ZF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNBE_Jq(bxInstruction_c *i)
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{
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if (! (get_CF() || get_ZF())) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JS_Jq(bxInstruction_c *i)
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{
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if (get_SF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNS_Jq(bxInstruction_c *i)
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{
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if (! get_SF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JP_Jq(bxInstruction_c *i)
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{
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if (get_PF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNP_Jq(bxInstruction_c *i)
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{
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if (! get_PF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JL_Jq(bxInstruction_c *i)
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{
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if (getB_SF() != getB_OF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNL_Jq(bxInstruction_c *i)
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{
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if (getB_SF() == getB_OF()) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JLE_Jq(bxInstruction_c *i)
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{
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if (get_ZF() || (getB_SF() != getB_OF())) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JNLE_Jq(bxInstruction_c *i)
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{
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if (! get_ZF() && (getB_SF() == getB_OF())) {
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branch_near64(i);
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BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
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BX_NEXT_INSTR(i); // trace can continue over non-taken branch
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JMP_EqR(bxInstruction_c *i)
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{
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Bit64u op1_64 = BX_READ_64BIT_REG(i->rm());
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if (! IsCanonical(op1_64)) {
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BX_ERROR(("JMP_Eq: canonical RIP violation"));
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exception(BX_GP_EXCEPTION, 0);
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}
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RIP = op1_64;
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BX_INSTR_UCNEAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP, RIP);
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BX_NEXT_TRACE(i);
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}
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/* Far indirect jump */
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JMP64_Ep(bxInstruction_c *i)
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{
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invalidate_prefetch_q();
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit64u op1_64 = read_virtual_qword_64(i->seg(), eaddr);
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Bit16u cs_raw = read_virtual_word_64(i->seg(), (eaddr+8) & i->asize_mask());
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BX_ASSERT(protected_mode());
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jump_protected(i, cs_raw, op1_64);
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BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_JMP,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::IRET64(bxInstruction_c *i)
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{
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invalidate_prefetch_q();
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#if BX_SUPPORT_VMX
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if (!BX_CPU_THIS_PTR in_vmx_guest || !VMEXIT(VMX_VM_EXEC_CTRL1_NMI_VMEXIT))
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#endif
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BX_CPU_THIS_PTR disable_NMI = 0;
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#if BX_DEBUGGER
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BX_CPU_THIS_PTR show_flag |= Flag_iret;
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#endif
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BX_ASSERT(long_mode());
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long_iret(i);
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BX_INSTR_FAR_BRANCH(BX_CPU_ID, BX_INSTR_IS_IRET,
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BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
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BX_NEXT_TRACE(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::JRCXZ_Jb(bxInstruction_c *i)
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{
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Bit64u temp_RCX;
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if (i->as64L())
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temp_RCX = RCX;
|
|
else
|
|
temp_RCX = ECX;
|
|
|
|
if (temp_RCX == 0) {
|
|
branch_near64(i);
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
|
}
|
|
#if BX_INSTRUMENTATION
|
|
else {
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
}
|
|
#endif
|
|
|
|
BX_NEXT_TRACE(i);
|
|
}
|
|
|
|
//
|
|
// There is some weirdness in LOOP instructions definition. If an exception
|
|
// was generated during the instruction execution (for example #GP fault
|
|
// because EIP was beyond CS segment limits) CPU state should restore the
|
|
// state prior to instruction execution.
|
|
//
|
|
// The final point that we are not allowed to decrement RCX register before
|
|
// it is known that no exceptions can happen.
|
|
//
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOOPNE64_Jb(bxInstruction_c *i)
|
|
{
|
|
if (i->as64L()) {
|
|
Bit64u count = RCX;
|
|
|
|
if (((--count) != 0) && (get_ZF()==0)) {
|
|
branch_near64(i);
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
|
}
|
|
#if BX_INSTRUMENTATION
|
|
else {
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
}
|
|
#endif
|
|
|
|
RCX = count;
|
|
}
|
|
else {
|
|
Bit32u count = ECX;
|
|
|
|
if (((--count) != 0) && (get_ZF()==0)) {
|
|
branch_near64(i);
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
|
}
|
|
#if BX_INSTRUMENTATION
|
|
else {
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
}
|
|
#endif
|
|
|
|
RCX = count;
|
|
}
|
|
|
|
BX_NEXT_TRACE(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOOPE64_Jb(bxInstruction_c *i)
|
|
{
|
|
if (i->as64L()) {
|
|
Bit64u count = RCX;
|
|
|
|
if (((--count) != 0) && get_ZF()) {
|
|
branch_near64(i);
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
|
}
|
|
#if BX_INSTRUMENTATION
|
|
else {
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
}
|
|
#endif
|
|
|
|
RCX = count;
|
|
}
|
|
else {
|
|
Bit32u count = ECX;
|
|
|
|
if (((--count) != 0) && get_ZF()) {
|
|
branch_near64(i);
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
|
}
|
|
#if BX_INSTRUMENTATION
|
|
else {
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
}
|
|
#endif
|
|
|
|
RCX = count;
|
|
}
|
|
|
|
BX_NEXT_TRACE(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LOOP64_Jb(bxInstruction_c *i)
|
|
{
|
|
if (i->as64L()) {
|
|
Bit64u count = RCX;
|
|
|
|
if ((--count) != 0) {
|
|
branch_near64(i);
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
|
}
|
|
#if BX_INSTRUMENTATION
|
|
else {
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
}
|
|
#endif
|
|
|
|
RCX = count;
|
|
}
|
|
else {
|
|
Bit32u count = ECX;
|
|
|
|
if ((--count) != 0) {
|
|
branch_near64(i);
|
|
BX_INSTR_CNEAR_BRANCH_TAKEN(BX_CPU_ID, RIP);
|
|
}
|
|
#if BX_INSTRUMENTATION
|
|
else {
|
|
BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(BX_CPU_ID);
|
|
}
|
|
#endif
|
|
|
|
RCX = count;
|
|
}
|
|
|
|
BX_NEXT_TRACE(i);
|
|
}
|
|
|
|
#endif /* if BX_SUPPORT_X86_64 */
|