mirror of https://github.com/bochs-emu/Bochs
505 lines
11 KiB
C++
505 lines
11 KiB
C++
// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#include "bochs.h"
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void
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BX_CPU_C::POP_Ed(BxInstruction_t *i)
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{
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Bit32u val32;
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pop_32(&val32);
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if (i->mod == 0xc0) {
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BX_WRITE_32BIT_REG(i->rm, val32);
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}
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else {
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// Note: there is one little weirdism here. When 32bit addressing
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// is used, it is possible to use ESP in the modrm addressing.
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// If used, the value of ESP after the pop is used to calculate
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// the address.
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if (i->as_32 && (i->mod!=0xc0) && (i->rm==4) && (i->base==4)) {
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i->ResolveModrm(i);
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}
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write_virtual_dword(i->seg, i->rm_addr, &val32);
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}
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}
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void
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BX_CPU_C::PUSH_ERX(BxInstruction_t *i)
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{
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push_32(BX_CPU_THIS_PTR gen_reg[i->b1 & 0x07].erx);
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}
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void
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BX_CPU_C::POP_ERX(BxInstruction_t *i)
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{
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Bit32u erx;
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pop_32(&erx);
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BX_CPU_THIS_PTR gen_reg[i->b1 & 0x07].erx = erx;
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}
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void
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BX_CPU_C::PUSH_CS(BxInstruction_t *i)
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{
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if (i->os_32)
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
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else
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
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}
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void
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BX_CPU_C::PUSH_DS(BxInstruction_t *i)
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{
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if (i->os_32)
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
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else
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
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}
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void
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BX_CPU_C::PUSH_ES(BxInstruction_t *i)
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{
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if (i->os_32)
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
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else
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
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}
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void
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BX_CPU_C::PUSH_FS(BxInstruction_t *i)
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{
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if (i->os_32)
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
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else
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
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}
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void
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BX_CPU_C::PUSH_GS(BxInstruction_t *i)
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{
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if (i->os_32)
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
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else
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
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}
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void
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BX_CPU_C::PUSH_SS(BxInstruction_t *i)
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{
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if (i->os_32)
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push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value);
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else
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push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value);
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}
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void
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BX_CPU_C::POP_DS(BxInstruction_t *i)
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{
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if (i->os_32) {
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Bit32u ds;
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pop_32(&ds);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], (Bit16u) ds);
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}
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else {
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Bit16u ds;
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pop_16(&ds);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], ds);
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}
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}
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void
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BX_CPU_C::POP_ES(BxInstruction_t *i)
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{
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if (i->os_32) {
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Bit32u es;
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pop_32(&es);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], (Bit16u) es);
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}
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else {
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Bit16u es;
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pop_16(&es);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], es);
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}
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}
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void
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BX_CPU_C::POP_FS(BxInstruction_t *i)
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{
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if (i->os_32) {
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Bit32u fs;
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pop_32(&fs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], (Bit16u) fs);
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}
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else {
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Bit16u fs;
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pop_16(&fs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs);
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}
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}
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void
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BX_CPU_C::POP_GS(BxInstruction_t *i)
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{
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if (i->os_32) {
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Bit32u gs;
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pop_32(&gs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], (Bit16u) gs);
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}
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else {
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Bit16u gs;
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pop_16(&gs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs);
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}
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}
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void
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BX_CPU_C::POP_SS(BxInstruction_t *i)
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{
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if (i->os_32) {
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Bit32u ss;
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pop_32(&ss);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], (Bit16u) ss);
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}
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else {
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Bit16u ss;
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pop_16(&ss);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss);
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}
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// POP SS inhibits interrupts, debug exceptions and single-step
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// trap exceptions until the execution boundary following the
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// next instruction is reached.
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// Same code as MOV_SwEw()
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BX_CPU_THIS_PTR inhibit_mask |=
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BX_INHIBIT_INTERRUPTS | BX_INHIBIT_DEBUG;
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BX_CPU_THIS_PTR async_event = 1;
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}
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void
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BX_CPU_C::PUSHAD32(BxInstruction_t *i)
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{
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#if BX_CPU_LEVEL < 2
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bx_panic("PUSHAD: not supported on an 8086\n");
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#else
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Bit32u temp_ESP;
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Bit32u esp;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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temp_ESP = ESP;
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else
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temp_ESP = SP;
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if (protected_mode()) {
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if ( !can_push(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache, temp_ESP, 32) ) {
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bx_panic("PUSHAD(): stack doesn't have enough room!\n");
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exception(BX_SS_EXCEPTION, 0, 0);
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return;
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}
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}
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else {
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if (temp_ESP < 32)
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bx_panic("pushad: eSP < 32\n");
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}
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esp = ESP;
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/* ??? optimize this by using virtual write, all checks passed */
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push_32(EAX);
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push_32(ECX);
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push_32(EDX);
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push_32(EBX);
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push_32(esp);
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push_32(EBP);
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push_32(ESI);
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push_32(EDI);
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#endif
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}
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void
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BX_CPU_C::POPAD32(BxInstruction_t *i)
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{
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#if BX_CPU_LEVEL < 2
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bx_panic("POPAD not supported on an 8086\n");
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#else /* 286+ */
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Bit32u edi, esi, ebp, etmp, ebx, edx, ecx, eax;
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if (protected_mode()) {
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if ( !can_pop(32) ) {
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bx_panic("pop_ad: not enough bytes on stack\n");
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exception(BX_SS_EXCEPTION, 0, 0);
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return;
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}
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}
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/* ??? optimize this */
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pop_32(&edi);
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pop_32(&esi);
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pop_32(&ebp);
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pop_32(&etmp); /* value for ESP discarded */
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pop_32(&ebx);
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pop_32(&edx);
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pop_32(&ecx);
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pop_32(&eax);
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EDI = edi;
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ESI = esi;
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EBP = ebp;
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EBX = ebx;
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EDX = edx;
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ECX = ecx;
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EAX = eax;
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#endif
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}
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void
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BX_CPU_C::PUSH_Id(BxInstruction_t *i)
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{
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#if BX_CPU_LEVEL < 2
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bx_panic("PUSH_Iv: not supported on 8086!\n");
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#else
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Bit32u imm32;
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imm32 = i->Id;
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push_32(imm32);
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#endif
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}
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void
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BX_CPU_C::PUSH_Ed(BxInstruction_t *i)
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{
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Bit32u op1_32;
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/* op1_32 is a register or memory reference */
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if (i->mod == 0xc0) {
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op1_32 = BX_READ_32BIT_REG(i->rm);
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}
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else {
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/* pointer, segment address pair */
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read_virtual_dword(i->seg, i->rm_addr, &op1_32);
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}
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push_32(op1_32);
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}
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void
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BX_CPU_C::ENTER_IwIb(BxInstruction_t *i)
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{
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#if BX_CPU_LEVEL < 2
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bx_panic("ENTER_IwIb: not supported by 8086!\n");
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#else
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Bit32u frame_ptr32;
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Bit16u frame_ptr16;
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Bit8u level;
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level = i->Ib2;
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invalidate_prefetch_q();
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level %= 32;
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/* ??? */
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if (level) bx_panic("enter(): level > 0\n");
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//if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b && i->os_32==0) {
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// bx_printf("enter(): stacksize!=opsize: I'm unsure of the code for this\n");
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// bx_panic(" The Intel manuals are a mess on this one!\n");
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// }
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if ( protected_mode() ) {
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Bit32u bytes_to_push, temp_ESP;
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if (level == 0) {
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if (i->os_32)
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bytes_to_push = 4 + i->Iw;
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else
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bytes_to_push = 2 + i->Iw;
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}
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else { /* level > 0 */
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if (i->os_32)
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bytes_to_push = 4 + (level-1)*4 + 4 + i->Iw;
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else
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bytes_to_push = 2 + (level-1)*2 + 2 + i->Iw;
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}
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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temp_ESP = ESP;
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else
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temp_ESP = SP;
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if ( !can_push(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache, temp_ESP, bytes_to_push) ) {
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bx_panic("ENTER: not enough room on stack!\n");
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exception(BX_SS_EXCEPTION, 0, 0);
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}
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}
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if (i->os_32)
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push_32(EBP);
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else
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push_16(BP);
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// can just do frame_ptr32 = ESP for either case ???
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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frame_ptr32 = ESP;
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else
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frame_ptr32 = SP;
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if (level > 0) {
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/* do level-1 times */
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while (--level) {
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if (i->os_32) {
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Bit32u temp32;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* 32bit stacksize */
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EBP -= 4;
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read_virtual_dword(BX_SEG_REG_SS, EBP, &temp32);
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ESP -= 4;
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write_virtual_dword(BX_SEG_REG_SS, ESP, &temp32);
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}
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else { /* 16bit stacksize */
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BP -= 4;
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read_virtual_dword(BX_SEG_REG_SS, BP, &temp32);
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SP -= 4;
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write_virtual_dword(BX_SEG_REG_SS, SP, &temp32);
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}
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}
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else { /* 16bit opsize */
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Bit16u temp16;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* 32bit stacksize */
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EBP -= 2;
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read_virtual_word(BX_SEG_REG_SS, EBP, &temp16);
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ESP -= 2;
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write_virtual_word(BX_SEG_REG_SS, ESP, &temp16);
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}
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else { /* 16bit stacksize */
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BP -= 2;
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read_virtual_word(BX_SEG_REG_SS, BP, &temp16);
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SP -= 2;
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write_virtual_word(BX_SEG_REG_SS, SP, &temp16);
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}
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}
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} /* while (--level) */
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/* push(frame pointer) */
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if (i->os_32) {
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* 32bit stacksize */
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ESP -= 4;
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write_virtual_dword(BX_SEG_REG_SS, ESP, &frame_ptr32);
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}
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else {
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SP -= 4;
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write_virtual_dword(BX_SEG_REG_SS, SP, &frame_ptr32);
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}
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}
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else { /* 16bit opsize */
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* 32bit stacksize */
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frame_ptr16 = frame_ptr32;
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ESP -= 2;
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write_virtual_word(BX_SEG_REG_SS, ESP, &frame_ptr16);
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}
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else {
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frame_ptr16 = frame_ptr32;
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SP -= 2;
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write_virtual_word(BX_SEG_REG_SS, SP, &frame_ptr16);
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}
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}
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} /* if (level > 0) ... */
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if (i->os_32)
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EBP = frame_ptr32;
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else
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BP = frame_ptr32;
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b) { /* 32bit stacksize */
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ESP = ESP - i->Iw;
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}
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else { /* 16bit stack */
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SP = SP - i->Iw;
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}
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#endif
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}
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void
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BX_CPU_C::LEAVE(BxInstruction_t *i)
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{
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#if BX_CPU_LEVEL < 2
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bx_panic("LEAVE: not supported by 8086!\n");
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#else
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Bit32u temp_EBP;
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invalidate_prefetch_q();
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#if BX_CPU_LEVEL >= 3
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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temp_EBP = EBP;
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else
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#endif
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temp_EBP = BP;
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if ( protected_mode() ) {
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.c_ed) { /* expand up */
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if (temp_EBP <= BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.limit_scaled) {
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bx_panic("LEAVE: BP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].limit\n");
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exception(BX_SS_EXCEPTION, 0, 0);
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return;
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}
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}
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else { /* normal */
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if (temp_EBP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.limit_scaled) {
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bx_panic("LEAVE: BP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].limit\n");
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exception(BX_SS_EXCEPTION, 0, 0);
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return;
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}
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}
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}
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// delete frame
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#if BX_CPU_LEVEL >= 3
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if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
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ESP = EBP;
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else
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#endif
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SP = BP;
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// restore frame pointer
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#if BX_CPU_LEVEL >= 3
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if (i->os_32) {
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Bit32u temp32;
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pop_32(&temp32);
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EBP = temp32;
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}
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else
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#endif
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{
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Bit16u temp16;
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pop_16(&temp16);
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BP = temp16;
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}
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#endif
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}
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