f850a6df1f
- put /*comments symbols*/ around any chars after #endif. Other compilers do not get it. - fix cases in which a pointer is cast to a 32-bit int, then back to a pointer. This breaks on a machine with 64-bit pointers. Examples: FPU_sub arg 2 and FPU_div arg 2. The int->ptr->int conversions are now done more safely by macros REGNO2PTR and PTR2INT. - use GCC_ATTRIBUTE macro instead of __attribute__. For compilers that do not support __attribute__, the macro can be defined to be nothing. - in fpu_entry.c, arg1 of FPU_load_int32 is (s32*), but the calls to it cast their data to (u32*). - if compiler does NOT inline functions in poly.h, the "extern inline" setting caused duplicate symbols to be created. Changed them to "static inline" so that the mul_32_32 from different .c files do not conflict. - implemented setcc so that it doesn't use curly brackets inside parens - comment out sigcontext structure definition, which conflicts with non-linux or non-intel operating systems. It's not used by bochs anyway.
273 lines
6.0 KiB
ArmAsm
273 lines
6.0 KiB
ArmAsm
.file "reg_u_sub.S"
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/*---------------------------------------------------------------------------+
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| reg_u_sub.S |
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| Core floating point subtraction routine. |
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| Copyright (C) 1992,1993,1995,1997 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
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| E-mail billm@suburbia.net |
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| Call from C as: |
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| int FPU_u_sub(FPU_REG *arg1, FPU_REG *arg2, FPU_REG *answ, |
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| int control_w) |
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| Return value is the tag of the answer, or-ed with FPU_Exception if |
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| one was raised, or -1 on internal error. |
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+---------------------------------------------------------------------------*/
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/*
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| Kernel subtraction routine FPU_u_sub(reg *arg1, reg *arg2, reg *answ).
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| Takes two valid reg f.p. numbers (TAG_Valid), which are
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| treated as unsigned numbers,
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| and returns their difference as a TAG_Valid or TAG_Zero f.p.
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| number.
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| The first number (arg1) must be the larger.
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| The returned number is normalized.
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| Basic checks are performed if PARANOID is defined.
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*/
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#include "exception.h"
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#include "fpu_emu.h"
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#include "control_w.h"
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.text
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ENTRY(FPU_u_sub)
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pushl %ebp
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movl %esp,%ebp
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pushl %esi
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pushl %edi
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pushl %ebx
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movl PARAM1,%esi /* source 1 */
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movl PARAM2,%edi /* source 2 */
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movl PARAM6,%ecx
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subl PARAM7,%ecx /* exp1 - exp2 */
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#ifdef PARANOID
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/* source 2 is always smaller than source 1 */
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js L_bugged_1
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testl $0x80000000,SIGH(%edi) /* The args are assumed to be be normalized */
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je L_bugged_2
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testl $0x80000000,SIGH(%esi)
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je L_bugged_2
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#endif /* PARANOID */
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/*--------------------------------------+
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| Form a register holding the |
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| smaller number |
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+--------------------------------------*/
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movl SIGH(%edi),%eax /* register ms word */
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movl SIGL(%edi),%ebx /* register ls word */
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movl PARAM3,%edi /* destination */
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movl PARAM6,%edx
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movw %dx,EXP(%edi) /* Copy exponent to destination */
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xorl %edx,%edx /* register extension */
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/*--------------------------------------+
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| Shift the temporary register |
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| right the required number of |
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| places. |
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+--------------------------------------*/
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cmpw $32,%cx /* shrd only works for 0..31 bits */
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jnc L_more_than_31
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/* less than 32 bits */
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shrd %cl,%ebx,%edx
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shrd %cl,%eax,%ebx
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shr %cl,%eax
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jmp L_shift_done
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L_more_than_31:
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cmpw $64,%cx
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jnc L_more_than_63
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subb $32,%cl
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jz L_exactly_32
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shrd %cl,%eax,%edx
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shr %cl,%eax
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orl %ebx,%ebx
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jz L_more_31_no_low /* none of the lowest bits is set */
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orl $1,%edx /* record the fact in the extension */
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L_more_31_no_low:
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movl %eax,%ebx
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xorl %eax,%eax
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jmp L_shift_done
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L_exactly_32:
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movl %ebx,%edx
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movl %eax,%ebx
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xorl %eax,%eax
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jmp L_shift_done
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L_more_than_63:
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cmpw $65,%cx
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jnc L_more_than_64
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/* Shift right by 64 bits */
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movl %eax,%edx
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orl %ebx,%ebx
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jz L_more_63_no_low
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orl $1,%edx
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jmp L_more_63_no_low
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L_more_than_64:
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jne L_more_than_65
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/* Shift right by 65 bits */
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/* Carry is clear if we get here */
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movl %eax,%edx
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rcrl %edx
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jnc L_shift_65_nc
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orl $1,%edx
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jmp L_more_63_no_low
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L_shift_65_nc:
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orl %ebx,%ebx
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jz L_more_63_no_low
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orl $1,%edx
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jmp L_more_63_no_low
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L_more_than_65:
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movl $1,%edx /* The shifted nr always at least one '1' */
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L_more_63_no_low:
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xorl %ebx,%ebx
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xorl %eax,%eax
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L_shift_done:
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L_subtr:
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/*------------------------------+
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| Do the subtraction |
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+------------------------------*/
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xorl %ecx,%ecx
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subl %edx,%ecx
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movl %ecx,%edx
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movl SIGL(%esi),%ecx
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sbbl %ebx,%ecx
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movl %ecx,%ebx
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movl SIGH(%esi),%ecx
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sbbl %eax,%ecx
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movl %ecx,%eax
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#ifdef PARANOID
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/* We can never get a borrow */
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jc L_bugged
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#endif /* PARANOID */
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/*--------------------------------------+
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| Normalize the result |
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+--------------------------------------*/
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testl $0x80000000,%eax
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jnz L_round /* no shifting needed */
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orl %eax,%eax
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jnz L_shift_1 /* shift left 1 - 31 bits */
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orl %ebx,%ebx
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jnz L_shift_32 /* shift left 32 - 63 bits */
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/*
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* A rare case, the only one which is non-zero if we got here
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* is: 1000000 .... 0000
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* -0111111 .... 1111 1
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* --------------------
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* 0000000 .... 0000 1
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*/
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cmpl $0x80000000,%edx
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jnz L_must_be_zero
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/* Shift left 64 bits */
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subw $64,EXP(%edi)
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xchg %edx,%eax
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jmp fpu_reg_round
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L_must_be_zero:
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#ifdef PARANOID
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orl %edx,%edx
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jnz L_bugged_3
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#endif /* PARANOID */
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/* The result is zero */
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movw $0,EXP(%edi) /* exponent */
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movl $0,SIGL(%edi)
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movl $0,SIGH(%edi)
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movl TAG_Zero,%eax
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jmp L_exit
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L_shift_32:
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movl %ebx,%eax
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movl %edx,%ebx
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movl $0,%edx
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subw $32,EXP(%edi) /* Can get underflow here */
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/* We need to shift left by 1 - 31 bits */
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L_shift_1:
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bsrl %eax,%ecx /* get the required shift in %ecx */
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subl $31,%ecx
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negl %ecx
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shld %cl,%ebx,%eax
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shld %cl,%edx,%ebx
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shl %cl,%edx
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subw %cx,EXP(%edi) /* Can get underflow here */
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L_round:
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jmp fpu_reg_round /* Round the result */
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#ifdef PARANOID
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L_bugged_1:
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pushl EX_INTERNAL|0x206
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call EXCEPTION
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pop %ebx
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jmp L_error_exit
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L_bugged_2:
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pushl EX_INTERNAL|0x209
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call EXCEPTION
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pop %ebx
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jmp L_error_exit
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L_bugged_3:
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pushl EX_INTERNAL|0x210
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call EXCEPTION
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pop %ebx
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jmp L_error_exit
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L_bugged_4:
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pushl EX_INTERNAL|0x211
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call EXCEPTION
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pop %ebx
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jmp L_error_exit
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L_bugged:
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pushl EX_INTERNAL|0x212
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call EXCEPTION
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pop %ebx
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jmp L_error_exit
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L_error_exit:
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movl $-1,%eax
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#endif /* PARANOID */
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L_exit:
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popl %ebx
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popl %edi
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popl %esi
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leave
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ret
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