1076 lines
33 KiB
C
1076 lines
33 KiB
C
/*---------------------------------------------------------------------------+
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| fpu_entry.c |
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| $Id: fpu_entry.c,v 1.4 2001-10-06 03:53:46 bdenney Exp $
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| |
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| The entry functions for wm-FPU-emu |
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| |
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| Copyright (C) 1992,1993,1994,1996,1997 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
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| E-mail billm@suburbia.net |
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| |
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| See the files "README" and "COPYING" for further copyright and warranty |
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| information. |
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| |
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+---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------+
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| Note: |
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| The file contains code which accesses user memory. |
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| Emulator static data may change when user memory is accessed, due to |
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| other processes using the emulator while swapping is in progress. |
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+---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------+
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| math_emulate(), restore_i387_soft() and save_i387_soft() are the only |
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| entry points for wm-FPU-emu. |
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+---------------------------------------------------------------------------*/
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#include "fpu_system.h"
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#include "fpu_emu.h"
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#include "exception.h"
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#include "control_w.h"
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#include "status_w.h"
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#include <linux/signal.h>
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#include <asm/uaccess.h>
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#include <asm/desc.h>
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#define __BAD__ FPU_illegal /* Illegal on an 80486, causes SIGILL */
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#ifndef NO_UNDOC_CODE /* Un-documented FPU op-codes supported by default. */
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/* WARNING: These codes are not documented by Intel in their 80486 manual
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and may not work on FPU clones or later Intel FPUs. */
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/* Changes to support the un-doc codes provided by Linus Torvalds. */
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#define _d9_d8_ fstp_i /* unofficial code (19) */
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#define _dc_d0_ fcom_st /* unofficial code (14) */
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#define _dc_d8_ fcompst /* unofficial code (1c) */
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#define _dd_c8_ fxch_i /* unofficial code (0d) */
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#define _de_d0_ fcompst /* unofficial code (16) */
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#define _df_c0_ ffreep /* unofficial code (07) ffree + pop */
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#define _df_c8_ fxch_i /* unofficial code (0f) */
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#define _df_d0_ fstp_i /* unofficial code (17) */
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#define _df_d8_ fstp_i /* unofficial code (1f) */
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static FUNC const st_instr_table[64] = {
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fadd__, fld_i_, __BAD__, __BAD__, fadd_i, ffree_, faddp_, _df_c0_,
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fmul__, fxch_i, __BAD__, __BAD__, fmul_i, _dd_c8_, fmulp_, _df_c8_,
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fcom_st, fp_nop, __BAD__, __BAD__, _dc_d0_, fst_i_, _de_d0_, _df_d0_,
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fcompst, _d9_d8_, __BAD__, __BAD__, _dc_d8_, fstp_i, fcompp, _df_d8_,
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fsub__, FPU_etc, __BAD__, finit_, fsubri, fucom_, fsubrp, fstsw_,
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fsubr_, fconst, fucompp, __BAD__, fsub_i, fucomp, fsubp_, __BAD__,
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fdiv__, FPU_triga, __BAD__, __BAD__, fdivri, __BAD__, fdivrp, __BAD__,
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fdivr_, FPU_trigb, __BAD__, __BAD__, fdiv_i, __BAD__, fdivp_, __BAD__,
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};
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#else /* Support only documented FPU op-codes */
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static FUNC const st_instr_table[64] = {
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fadd__, fld_i_, __BAD__, __BAD__, fadd_i, ffree_, faddp_, __BAD__,
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fmul__, fxch_i, __BAD__, __BAD__, fmul_i, __BAD__, fmulp_, __BAD__,
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fcom_st, fp_nop, __BAD__, __BAD__, __BAD__, fst_i_, __BAD__, __BAD__,
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fcompst, __BAD__, __BAD__, __BAD__, __BAD__, fstp_i, fcompp, __BAD__,
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fsub__, FPU_etc, __BAD__, finit_, fsubri, fucom_, fsubrp, fstsw_,
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fsubr_, fconst, fucompp, __BAD__, fsub_i, fucomp, fsubp_, __BAD__,
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fdiv__, FPU_triga, __BAD__, __BAD__, fdivri, __BAD__, fdivrp, __BAD__,
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fdivr_, FPU_trigb, __BAD__, __BAD__, fdiv_i, __BAD__, fdivp_, __BAD__,
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};
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#endif /* NO_UNDOC_CODE */
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#define _NONE_ 0 /* Take no special action */
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#define _REG0_ 1 /* Need to check for not empty st(0) */
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#define _REGI_ 2 /* Need to check for not empty st(0) and st(rm) */
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#define _REGi_ 0 /* Uses st(rm) */
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#define _PUSH_ 3 /* Need to check for space to push onto stack */
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#define _null_ 4 /* Function illegal or not implemented */
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#define _REGIi 5 /* Uses st(0) and st(rm), result to st(rm) */
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#define _REGIp 6 /* Uses st(0) and st(rm), result to st(rm) then pop */
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#define _REGIc 0 /* Compare st(0) and st(rm) */
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#define _REGIn 0 /* Uses st(0) and st(rm), but handle checks later */
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#ifndef NO_UNDOC_CODE
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/* Un-documented FPU op-codes supported by default. (see above) */
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static u_char const type_table[64] = {
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_REGI_, _NONE_, _null_, _null_, _REGIi, _REGi_, _REGIp, _REGi_,
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_REGI_, _REGIn, _null_, _null_, _REGIi, _REGI_, _REGIp, _REGI_,
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_REGIc, _NONE_, _null_, _null_, _REGIc, _REG0_, _REGIc, _REG0_,
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_REGIc, _REG0_, _null_, _null_, _REGIc, _REG0_, _REGIc, _REG0_,
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_REGI_, _NONE_, _null_, _NONE_, _REGIi, _REGIc, _REGIp, _NONE_,
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_REGI_, _NONE_, _REGIc, _null_, _REGIi, _REGIc, _REGIp, _null_,
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_REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_,
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_REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_
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};
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#else /* Support only documented FPU op-codes */
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static u_char const type_table[64] = {
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_REGI_, _NONE_, _null_, _null_, _REGIi, _REGi_, _REGIp, _null_,
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_REGI_, _REGIn, _null_, _null_, _REGIi, _null_, _REGIp, _null_,
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_REGIc, _NONE_, _null_, _null_, _null_, _REG0_, _null_, _null_,
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_REGIc, _null_, _null_, _null_, _null_, _REG0_, _REGIc, _null_,
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_REGI_, _NONE_, _null_, _NONE_, _REGIi, _REGIc, _REGIp, _NONE_,
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_REGI_, _NONE_, _REGIc, _null_, _REGIi, _REGIc, _REGIp, _null_,
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_REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_,
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_REGI_, _NONE_, _null_, _null_, _REGIi, _null_, _REGIp, _null_
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};
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#endif /* NO_UNDOC_CODE */
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#ifndef USE_WITH_CPU_SIM
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#ifdef RE_ENTRANT_CHECKING
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u_char emulating=0;
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#endif /* RE_ENTRANT_CHECKING */
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static int valid_prefix(u_char *Byte, u_char **fpu_eip,
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overrides *override);
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asmlinkage void math_emulate(long arg)
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{
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u_char FPU_modrm, byte1;
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unsigned short code;
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fpu_addr_modes addr_modes;
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int unmasked;
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FPU_REG loaded_data;
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FPU_REG *st0_ptr;
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u_char loaded_tag, st0_tag;
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void *data_address;
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struct address data_sel_off;
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struct address entry_sel_off;
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u32 code_base = 0;
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u32 code_limit = 0; /* Initialized to stop compiler warnings */
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struct desc_struct code_descriptor;
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#ifdef RE_ENTRANT_CHECKING
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if ( emulating )
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{
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printk("ERROR: wm-FPU-emu is not RE-ENTRANT!\n");
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}
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RE_ENTRANT_CHECK_ON;
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#endif /* RE_ENTRANT_CHECKING */
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if (!current->used_math)
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{
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finit();
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current->used_math = 1;
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}
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SETUP_DATA_AREA(arg);
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FPU_ORIG_EIP = FPU_EIP;
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if ( (FPU_EFLAGS & 0x00020000) != 0 )
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{
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/* Virtual 8086 mode */
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addr_modes.default_mode = VM86;
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FPU_EIP += code_base = FPU_CS << 4;
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code_limit = code_base + 0xffff; /* Assumes code_base <= 0xffff0000 */
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}
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else if ( FPU_CS == __USER_CS && FPU_DS == __USER_DS )
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{
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addr_modes.default_mode = 0;
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}
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else if ( FPU_CS == __KERNEL_CS )
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{
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printk("math_emulate: %04x:%08lx\n",FPU_CS,FPU_EIP);
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panic("Math emulation needed in kernel");
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}
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else
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{
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if ( (FPU_CS & 4) != 4 ) /* Must be in the LDT */
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{
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/* Can only handle segmented addressing via the LDT
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for now, and it must be 16 bit */
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printk("FPU emulator: Unsupported addressing mode\n");
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math_abort(FPU_info, SIGILL);
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}
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if ( SEG_D_SIZE(code_descriptor = LDT_DESCRIPTOR(FPU_CS)) )
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{
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/* The above test may be wrong, the book is not clear */
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/* Segmented 32 bit protected mode */
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addr_modes.default_mode = SEG32;
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}
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else
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{
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/* 16 bit protected mode */
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addr_modes.default_mode = PM16;
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}
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FPU_EIP += code_base = SEG_BASE_ADDR(code_descriptor);
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code_limit = code_base
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+ (SEG_LIMIT(code_descriptor)+1) * SEG_GRANULARITY(code_descriptor)
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- 1;
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if ( code_limit < code_base ) code_limit = 0xffffffff;
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}
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FPU_lookahead = 1;
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if (current->flags & PF_PTRACED)
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FPU_lookahead = 0;
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if ( !valid_prefix(&byte1, (u_char **)&FPU_EIP,
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&addr_modes.override) )
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{
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RE_ENTRANT_CHECK_OFF;
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printk("FPU emulator: Unknown prefix byte 0x%02x, probably due to\n"
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"FPU emulator: self-modifying code! (emulation impossible)\n",
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byte1);
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RE_ENTRANT_CHECK_ON;
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EXCEPTION(EX_INTERNAL|0x126);
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math_abort(FPU_info,SIGILL);
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}
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do_another_FPU_instruction:
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no_ip_update = 0;
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FPU_EIP++; /* We have fetched the prefix and first code bytes. */
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if ( addr_modes.default_mode )
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{
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/* This checks for the minimum instruction bytes.
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We also need to check any extra (address mode) code access. */
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if ( FPU_EIP > code_limit )
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math_abort(FPU_info,SIGSEGV);
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}
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if ( (byte1 & 0xf8) != 0xd8 )
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{
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if ( byte1 == FWAIT_OPCODE )
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{
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if (partial_status & SW_Summary)
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goto do_the_FPU_interrupt;
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else
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goto FPU_fwait_done;
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}
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#ifdef PARANOID
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EXCEPTION(EX_INTERNAL|0x128);
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math_abort(FPU_info,SIGILL);
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#endif /* PARANOID */
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}
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RE_ENTRANT_CHECK_OFF;
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FPU_code_verify_area(1);
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FPU_get_user(FPU_modrm, (u_char *) FPU_EIP);
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RE_ENTRANT_CHECK_ON;
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FPU_EIP++;
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if (partial_status & SW_Summary)
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{
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/* Ignore the error for now if the current instruction is a no-wait
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control instruction */
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/* The 80486 manual contradicts itself on this topic,
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but a real 80486 uses the following instructions:
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fninit, fnstenv, fnsave, fnstsw, fnstenv, fnclex.
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*/
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code = (FPU_modrm << 8) | byte1;
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if ( ! ( (((code & 0xf803) == 0xe003) || /* fnclex, fninit, fnstsw */
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(((code & 0x3003) == 0x3001) && /* fnsave, fnstcw, fnstenv,
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fnstsw */
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((code & 0xc000) != 0xc000))) ) )
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{
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/*
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* We need to simulate the action of the kernel to FPU
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* interrupts here.
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*/
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do_the_FPU_interrupt:
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FPU_EIP = FPU_ORIG_EIP; /* Point to current FPU instruction. */
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RE_ENTRANT_CHECK_OFF;
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current->tss.trap_no = 16;
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current->tss.error_code = 0;
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send_sig(SIGFPE, current, 1);
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return;
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}
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}
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entry_sel_off.offset = FPU_ORIG_EIP;
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entry_sel_off.selector = FPU_CS;
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entry_sel_off.opcode = (byte1 << 8) | FPU_modrm;
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FPU_rm = FPU_modrm & 7;
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if ( FPU_modrm < 0300 )
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{
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/* All of these instructions use the mod/rm byte to get a data address */
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if ( (addr_modes.default_mode & SIXTEEN)
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^ (addr_modes.override.address_size == ADDR_SIZE_PREFIX) )
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data_address = FPU_get_address_16(FPU_modrm, (u32 *)&FPU_EIP, &data_sel_off,
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addr_modes);
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else
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data_address = FPU_get_address(FPU_modrm, (u32 *)&FPU_EIP, &data_sel_off,
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addr_modes);
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if ( addr_modes.default_mode )
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{
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if ( FPU_EIP-1 > code_limit )
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math_abort(FPU_info,SIGSEGV);
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}
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if ( !(byte1 & 1) )
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{
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unsigned short status1 = partial_status;
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st0_ptr = &st(0);
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st0_tag = FPU_gettag0();
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/* Stack underflow has priority */
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if ( NOT_EMPTY_ST0 )
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{
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if ( addr_modes.default_mode & PROTECTED )
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{
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/* This table works for 16 and 32 bit protected mode */
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if ( access_limit < data_sizes_16[(byte1 >> 1) & 3] )
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math_abort(FPU_info,SIGSEGV);
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}
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unmasked = 0; /* Do this here to stop compiler warnings. */
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switch ( (byte1 >> 1) & 3 )
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{
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case 0:
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unmasked = FPU_load_single((float *)data_address,
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&loaded_data);
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loaded_tag = unmasked & 0xff;
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unmasked &= ~0xff;
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break;
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case 1:
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loaded_tag = FPU_load_int32((s32 *)data_address, &loaded_data); // bbd: was (u32*)
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break;
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case 2:
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unmasked = FPU_load_double((double *)data_address,
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&loaded_data);
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loaded_tag = unmasked & 0xff;
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unmasked &= ~0xff;
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break;
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case 3:
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default: /* Used here to suppress gcc warnings. */
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loaded_tag = FPU_load_int16((short *)data_address, &loaded_data);
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break;
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}
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|
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/* No more access to user memory, it is safe
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to use static data now */
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|
|
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/* NaN operands have the next priority. */
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/* We have to delay looking at st(0) until after
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loading the data, because that data might contain an SNaN */
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if ( ((st0_tag == TAG_Special) && isNaN(st0_ptr)) ||
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((loaded_tag == TAG_Special) && isNaN(&loaded_data)) )
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{
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/* Restore the status word; we might have loaded a
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denormal. */
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partial_status = status1;
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if ( (FPU_modrm & 0x30) == 0x10 )
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{
|
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/* fcom or fcomp */
|
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EXCEPTION(EX_Invalid);
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setcc(SW_C3 | SW_C2 | SW_C0);
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if ( (FPU_modrm & 0x08) && (control_word & CW_Invalid) )
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FPU_pop(); /* fcomp, masked, so we pop. */
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}
|
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else
|
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{
|
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if ( loaded_tag == TAG_Special )
|
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loaded_tag = FPU_Special(&loaded_data);
|
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#ifdef PECULIAR_486
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/* This is not really needed, but gives behaviour
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identical to an 80486 */
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if ( (FPU_modrm & 0x28) == 0x20 )
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/* fdiv or fsub */
|
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real_2op_NaN(&loaded_data, loaded_tag, 0, &loaded_data);
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else
|
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#endif /* PECULIAR_486 */
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/* fadd, fdivr, fmul, or fsubr */
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real_2op_NaN(&loaded_data, loaded_tag, 0, st0_ptr);
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}
|
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goto reg_mem_instr_done;
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}
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|
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if ( unmasked && !((FPU_modrm & 0x30) == 0x10) )
|
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{
|
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/* Is not a comparison instruction. */
|
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if ( (FPU_modrm & 0x38) == 0x38 )
|
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{
|
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/* fdivr */
|
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if ( (st0_tag == TAG_Zero) &&
|
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((loaded_tag == TAG_Valid)
|
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|| (loaded_tag == TAG_Special
|
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&& isdenormal(&loaded_data))) )
|
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{
|
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if ( FPU_divide_by_zero(0, getsign(&loaded_data))
|
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< 0 )
|
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{
|
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/* We use the fact here that the unmasked
|
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exception in the loaded data was for a
|
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denormal operand */
|
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/* Restore the state of the denormal op bit */
|
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partial_status &= ~SW_Denorm_Op;
|
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partial_status |= status1 & SW_Denorm_Op;
|
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}
|
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else
|
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setsign(st0_ptr, getsign(&loaded_data));
|
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}
|
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}
|
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goto reg_mem_instr_done;
|
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}
|
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|
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switch ( (FPU_modrm >> 3) & 7 )
|
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{
|
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case 0: /* fadd */
|
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clear_C1();
|
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FPU_add(&loaded_data, loaded_tag, 0, control_word);
|
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break;
|
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case 1: /* fmul */
|
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clear_C1();
|
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FPU_mul(&loaded_data, loaded_tag, 0, control_word);
|
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break;
|
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case 2: /* fcom */
|
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FPU_compare_st_data(&loaded_data, loaded_tag);
|
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break;
|
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case 3: /* fcomp */
|
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if ( !FPU_compare_st_data(&loaded_data, loaded_tag)
|
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&& !unmasked )
|
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FPU_pop();
|
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break;
|
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case 4: /* fsub */
|
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clear_C1();
|
|
// bbd: loaded_data used to be typecast to an int, but
|
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// this corrupted the pointer on 64-bit machines.
|
|
// Now FPU_sub and similar take a FPU_REG* here instead.
|
|
FPU_sub(LOADED|loaded_tag, &loaded_data, control_word);
|
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break;
|
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case 5: /* fsubr */
|
|
clear_C1();
|
|
FPU_sub(REV|LOADED|loaded_tag, &loaded_data, control_word);
|
|
break;
|
|
case 6: /* fdiv */
|
|
clear_C1();
|
|
FPU_div(LOADED|loaded_tag, &loaded_data, control_word);
|
|
break;
|
|
case 7: /* fdivr */
|
|
clear_C1();
|
|
if ( st0_tag == TAG_Zero )
|
|
partial_status = status1; /* Undo any denorm tag,
|
|
zero-divide has priority. */
|
|
FPU_div(REV|LOADED|loaded_tag, &loaded_data, control_word);
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if ( (FPU_modrm & 0x30) == 0x10 )
|
|
{
|
|
/* The instruction is fcom or fcomp */
|
|
EXCEPTION(EX_StackUnder);
|
|
setcc(SW_C3 | SW_C2 | SW_C0);
|
|
if ( (FPU_modrm & 0x08) && (control_word & CW_Invalid) )
|
|
FPU_pop(); /* fcomp */
|
|
}
|
|
else
|
|
FPU_stack_underflow();
|
|
}
|
|
reg_mem_instr_done:
|
|
operand_address = data_sel_off;
|
|
}
|
|
else
|
|
{
|
|
if ( !(no_ip_update =
|
|
FPU_load_store(((FPU_modrm & 0x38) | (byte1 & 6)) >> 1,
|
|
addr_modes, data_address)) )
|
|
{
|
|
operand_address = data_sel_off;
|
|
}
|
|
}
|
|
|
|
}
|
|
else
|
|
{
|
|
/* None of these instructions access user memory */
|
|
u_char instr_index = (FPU_modrm & 0x38) | (byte1 & 7);
|
|
|
|
#ifdef PECULIAR_486
|
|
/* This is supposed to be undefined, but a real 80486 seems
|
|
to do this: */
|
|
operand_address.offset = 0;
|
|
operand_address.selector = FPU_DS;
|
|
#endif /* PECULIAR_486 */
|
|
|
|
st0_ptr = &st(0);
|
|
st0_tag = FPU_gettag0();
|
|
switch ( type_table[(int) instr_index] )
|
|
{
|
|
case _NONE_: /* also _REGIc: _REGIn */
|
|
break;
|
|
case _REG0_:
|
|
if ( !NOT_EMPTY_ST0 )
|
|
{
|
|
FPU_stack_underflow();
|
|
goto FPU_instruction_done;
|
|
}
|
|
break;
|
|
case _REGIi:
|
|
if ( !NOT_EMPTY_ST0 || !NOT_EMPTY(FPU_rm) )
|
|
{
|
|
FPU_stack_underflow_i(FPU_rm);
|
|
goto FPU_instruction_done;
|
|
}
|
|
break;
|
|
case _REGIp:
|
|
if ( !NOT_EMPTY_ST0 || !NOT_EMPTY(FPU_rm) )
|
|
{
|
|
FPU_stack_underflow_pop(FPU_rm);
|
|
goto FPU_instruction_done;
|
|
}
|
|
break;
|
|
case _REGI_:
|
|
if ( !NOT_EMPTY_ST0 || !NOT_EMPTY(FPU_rm) )
|
|
{
|
|
FPU_stack_underflow();
|
|
goto FPU_instruction_done;
|
|
}
|
|
break;
|
|
case _PUSH_: /* Only used by the fld st(i) instruction */
|
|
break;
|
|
case _null_:
|
|
FPU_illegal();
|
|
goto FPU_instruction_done;
|
|
default:
|
|
EXCEPTION(EX_INTERNAL|0x111);
|
|
goto FPU_instruction_done;
|
|
}
|
|
(*st_instr_table[(int) instr_index])();
|
|
|
|
FPU_instruction_done:
|
|
;
|
|
}
|
|
|
|
if ( ! no_ip_update )
|
|
instruction_address = entry_sel_off;
|
|
|
|
FPU_fwait_done:
|
|
|
|
if (FPU_lookahead && !current->need_resched)
|
|
{
|
|
FPU_ORIG_EIP = FPU_EIP - code_base;
|
|
if ( valid_prefix(&byte1, (u_char **)&FPU_EIP,
|
|
&addr_modes.override) )
|
|
goto do_another_FPU_instruction;
|
|
}
|
|
|
|
if ( addr_modes.default_mode )
|
|
FPU_EIP -= code_base;
|
|
|
|
RE_ENTRANT_CHECK_OFF;
|
|
}
|
|
|
|
|
|
/* Support for prefix bytes is not yet complete. To properly handle
|
|
all prefix bytes, further changes are needed in the emulator code
|
|
which accesses user address space. Access to separate segments is
|
|
important for msdos emulation. */
|
|
static int valid_prefix(u_char *Byte, u_char **fpu_eip,
|
|
overrides *override)
|
|
{
|
|
u_char byte;
|
|
u_char *ip = *fpu_eip;
|
|
|
|
*override = (overrides) { 0, 0, PREFIX_DEFAULT }; /* defaults */
|
|
|
|
RE_ENTRANT_CHECK_OFF;
|
|
FPU_code_verify_area(1);
|
|
FPU_get_user(byte, ip);
|
|
RE_ENTRANT_CHECK_ON;
|
|
|
|
while ( 1 )
|
|
{
|
|
switch ( byte )
|
|
{
|
|
case ADDR_SIZE_PREFIX:
|
|
override->address_size = ADDR_SIZE_PREFIX;
|
|
goto do_next_byte;
|
|
|
|
case OP_SIZE_PREFIX:
|
|
override->operand_size = OP_SIZE_PREFIX;
|
|
goto do_next_byte;
|
|
|
|
case PREFIX_CS:
|
|
override->segment = PREFIX_CS_;
|
|
goto do_next_byte;
|
|
case PREFIX_ES:
|
|
override->segment = PREFIX_ES_;
|
|
goto do_next_byte;
|
|
case PREFIX_SS:
|
|
override->segment = PREFIX_SS_;
|
|
goto do_next_byte;
|
|
case PREFIX_FS:
|
|
override->segment = PREFIX_FS_;
|
|
goto do_next_byte;
|
|
case PREFIX_GS:
|
|
override->segment = PREFIX_GS_;
|
|
goto do_next_byte;
|
|
case PREFIX_DS:
|
|
override->segment = PREFIX_DS_;
|
|
goto do_next_byte;
|
|
|
|
/* lock is not a valid prefix for FPU instructions,
|
|
let the cpu handle it to generate a SIGILL. */
|
|
/* case PREFIX_LOCK: */
|
|
|
|
/* rep.. prefixes have no meaning for FPU instructions */
|
|
case PREFIX_REPE:
|
|
case PREFIX_REPNE:
|
|
|
|
do_next_byte:
|
|
ip++;
|
|
RE_ENTRANT_CHECK_OFF;
|
|
FPU_code_verify_area(1);
|
|
FPU_get_user(byte, ip);
|
|
RE_ENTRANT_CHECK_ON;
|
|
break;
|
|
case FWAIT_OPCODE:
|
|
*Byte = byte;
|
|
return 1;
|
|
default:
|
|
if ( (byte & 0xf8) == 0xd8 )
|
|
{
|
|
*Byte = byte;
|
|
*fpu_eip = ip;
|
|
return 1;
|
|
}
|
|
else
|
|
{
|
|
/* Not a valid sequence of prefix bytes followed by
|
|
an FPU instruction. */
|
|
*Byte = byte; /* Needed for error message. */
|
|
return 0;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
void math_abort(struct info * info, unsigned int signal)
|
|
{
|
|
FPU_EIP = FPU_ORIG_EIP;
|
|
current->tss.trap_no = 16;
|
|
current->tss.error_code = 0;
|
|
send_sig(signal,current,1);
|
|
RE_ENTRANT_CHECK_OFF;
|
|
__asm__("movl %0,%%esp ; ret": :"g" (((long) info)-4));
|
|
#ifdef PARANOID
|
|
printk("ERROR: wm-FPU-emu math_abort failed!\n");
|
|
#endif /* PARANOID */
|
|
}
|
|
|
|
|
|
|
|
#define S387 ((struct i387_soft_struct *)s387)
|
|
#define sstatus_word() \
|
|
((S387->swd & ~SW_Top & 0xffff) | ((S387->ftop << SW_Top_Shift) & SW_Top))
|
|
|
|
int restore_i387_soft(void *s387, struct _fpstate *buf)
|
|
{
|
|
u_char *d = (u_char *)buf;
|
|
int offset, other, i, tags, regnr, tag, newtop;
|
|
|
|
RE_ENTRANT_CHECK_OFF;
|
|
FPU_verify_area(VERIFY_READ, d, 7*4 + 8*10);
|
|
if (__copy_from_user(&S387->cwd, d, 7*4))
|
|
return -1;
|
|
RE_ENTRANT_CHECK_ON;
|
|
|
|
d += 7*4;
|
|
|
|
S387->ftop = (S387->swd >> SW_Top_Shift) & 7;
|
|
offset = (S387->ftop & 7) * 10;
|
|
other = 80 - offset;
|
|
|
|
RE_ENTRANT_CHECK_OFF;
|
|
/* Copy all registers in stack order. */
|
|
if (__copy_from_user(((u_char *)&S387->st_space)+offset, d, other))
|
|
return -1;
|
|
if ( offset )
|
|
if (__copy_from_user((u_char *)&S387->st_space, d+other, offset))
|
|
return -1;
|
|
RE_ENTRANT_CHECK_ON;
|
|
|
|
/* The tags may need to be corrected now. */
|
|
tags = S387->twd;
|
|
newtop = S387->ftop;
|
|
for ( i = 0; i < 8; i++ )
|
|
{
|
|
regnr = (i+newtop) & 7;
|
|
if ( ((tags >> ((regnr & 7)*2)) & 3) != TAG_Empty )
|
|
{
|
|
/* The loaded data over-rides all other cases. */
|
|
tag = FPU_tagof((FPU_REG *)((u_char *)S387->st_space + 10*regnr));
|
|
tags &= ~(3 << (regnr*2));
|
|
tags |= (tag & 3) << (regnr*2);
|
|
}
|
|
}
|
|
S387->twd = tags;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
int save_i387_soft(void *s387, struct _fpstate * buf)
|
|
{
|
|
u_char *d = (u_char *)buf;
|
|
int offset = (S387->ftop & 7) * 10, other = 80 - offset;
|
|
|
|
RE_ENTRANT_CHECK_OFF;
|
|
FPU_verify_area(VERIFY_WRITE, d, 7*4 + 8*10);
|
|
#ifdef PECULIAR_486
|
|
S387->cwd &= ~0xe080;
|
|
/* An 80486 sets nearly all of the reserved bits to 1. */
|
|
S387->cwd |= 0xffff0040;
|
|
S387->swd = sstatus_word() | 0xffff0000;
|
|
S387->twd |= 0xffff0000;
|
|
S387->fcs &= ~0xf8000000;
|
|
S387->fos |= 0xffff0000;
|
|
#endif /* PECULIAR_486 */
|
|
__copy_to_user(d, &S387->cwd, 7*4);
|
|
RE_ENTRANT_CHECK_ON;
|
|
|
|
d += 7*4;
|
|
|
|
RE_ENTRANT_CHECK_OFF;
|
|
/* Copy all registers in stack order. */
|
|
if (__copy_to_user(d, ((u_char *)&S387->st_space)+offset, other))
|
|
return -1;
|
|
if ( offset )
|
|
if (__copy_to_user(d+other, (u_char *)&S387->st_space, offset))
|
|
return -1
|
|
RE_ENTRANT_CHECK_ON;
|
|
|
|
return 1;
|
|
}
|
|
|
|
#else /* #ifndef USE_WITH_CPU_SIM */
|
|
|
|
|
|
/* Note, this is a version of fpu_entry.c, modified to interface
|
|
* to a CPU simulator, rather than a kernel.
|
|
*
|
|
* Ported by Kevin Lawton Sep 20, 1999
|
|
*/
|
|
|
|
|
|
asmlinkage void
|
|
math_emulate2(fpu_addr_modes addr_modes,
|
|
u_char FPU_modrm,
|
|
u_char byte1,
|
|
void *data_address,
|
|
struct address data_sel_off,
|
|
struct address entry_sel_off)
|
|
{
|
|
u16 code;
|
|
int unmasked;
|
|
FPU_REG loaded_data;
|
|
FPU_REG *st0_ptr;
|
|
u_char loaded_tag, st0_tag;
|
|
|
|
|
|
// assuming byte is 0xd8..0xdf or 0xdb==FWAIT
|
|
|
|
// lock is not a valid prefix for FPU instructions, +++
|
|
// let the cpu handle it to generate a SIGILL.
|
|
|
|
|
|
no_ip_update = 0;
|
|
|
|
if ( byte1 == FWAIT_OPCODE ) {
|
|
if (partial_status & SW_Summary)
|
|
goto do_the_FPU_interrupt;
|
|
else
|
|
goto FPU_fwait_done;
|
|
}
|
|
|
|
if (partial_status & SW_Summary) {
|
|
/* Ignore the error for now if the current instruction is a no-wait
|
|
control instruction */
|
|
/* The 80486 manual contradicts itself on this topic,
|
|
but a real 80486 uses the following instructions:
|
|
fninit, fnstenv, fnsave, fnstsw, fnstenv, fnclex.
|
|
*/
|
|
code = (FPU_modrm << 8) | byte1;
|
|
if ( ! ( (((code & 0xf803) == 0xe003) || /* fnclex, fninit, fnstsw */
|
|
(((code & 0x3003) == 0x3001) && /* fnsave, fnstcw, fnstenv,
|
|
fnstsw */
|
|
((code & 0xc000) != 0xc000))) ) ) {
|
|
/*
|
|
* We need to simulate the action of the kernel to FPU
|
|
* interrupts here.
|
|
*/
|
|
do_the_FPU_interrupt:
|
|
|
|
math_abort(FPU_info, SIGFPE);
|
|
}
|
|
}
|
|
|
|
entry_sel_off.opcode = (byte1 << 8) | FPU_modrm;
|
|
|
|
FPU_rm = FPU_modrm & 7;
|
|
|
|
if ( FPU_modrm < 0300 ) {
|
|
/* All of these instructions use the mod/rm byte to get a data address */
|
|
|
|
if ( !(byte1 & 1) ) {
|
|
u16 status1 = partial_status;
|
|
|
|
st0_ptr = &st(0);
|
|
st0_tag = FPU_gettag0();
|
|
|
|
/* Stack underflow has priority */
|
|
if ( NOT_EMPTY_ST0 ) {
|
|
if ( addr_modes.default_mode & PROTECTED )
|
|
{
|
|
/* This table works for 16 and 32 bit protected mode */
|
|
if ( access_limit < data_sizes_16[(byte1 >> 1) & 3] )
|
|
math_abort(FPU_info, SIGSEGV);
|
|
}
|
|
|
|
unmasked = 0; /* Do this here to stop compiler warnings. */
|
|
switch ( (byte1 >> 1) & 3 )
|
|
{
|
|
case 0:
|
|
unmasked = FPU_load_single((float *)data_address,
|
|
&loaded_data);
|
|
loaded_tag = unmasked & 0xff;
|
|
unmasked &= ~0xff;
|
|
break;
|
|
case 1:
|
|
loaded_tag = FPU_load_int32((s32 *)data_address, &loaded_data); // bbd: was (u32 *)
|
|
break;
|
|
case 2:
|
|
unmasked = FPU_load_double((double *)data_address,
|
|
&loaded_data);
|
|
loaded_tag = unmasked & 0xff;
|
|
unmasked &= ~0xff;
|
|
break;
|
|
case 3:
|
|
default: /* Used here to suppress gcc warnings. */
|
|
loaded_tag = FPU_load_int16((s16 *)data_address, &loaded_data);
|
|
break;
|
|
}
|
|
|
|
/* No more access to user memory, it is safe
|
|
to use static data now */
|
|
|
|
/* NaN operands have the next priority. */
|
|
/* We have to delay looking at st(0) until after
|
|
loading the data, because that data might contain an SNaN */
|
|
if ( ((st0_tag == TAG_Special) && isNaN(st0_ptr)) ||
|
|
((loaded_tag == TAG_Special) && isNaN(&loaded_data)) )
|
|
{
|
|
/* Restore the status word; we might have loaded a
|
|
denormal. */
|
|
partial_status = status1;
|
|
if ( (FPU_modrm & 0x30) == 0x10 )
|
|
{
|
|
/* fcom or fcomp */
|
|
EXCEPTION(EX_Invalid);
|
|
setcc(SW_C3 | SW_C2 | SW_C0);
|
|
if ( (FPU_modrm & 0x08) && (control_word & CW_Invalid) )
|
|
FPU_pop(); /* fcomp, masked, so we pop. */
|
|
}
|
|
else
|
|
{
|
|
if ( loaded_tag == TAG_Special )
|
|
loaded_tag = FPU_Special(&loaded_data);
|
|
#ifdef PECULIAR_486
|
|
/* This is not really needed, but gives behaviour
|
|
identical to an 80486 */
|
|
if ( (FPU_modrm & 0x28) == 0x20 )
|
|
/* fdiv or fsub */
|
|
real_2op_NaN(&loaded_data, loaded_tag, 0, &loaded_data);
|
|
else
|
|
#endif /* PECULIAR_486 */
|
|
/* fadd, fdivr, fmul, or fsubr */
|
|
real_2op_NaN(&loaded_data, loaded_tag, 0, st0_ptr);
|
|
}
|
|
goto reg_mem_instr_done;
|
|
}
|
|
|
|
if ( unmasked && !((FPU_modrm & 0x30) == 0x10) )
|
|
{
|
|
/* Is not a comparison instruction. */
|
|
if ( (FPU_modrm & 0x38) == 0x38 )
|
|
{
|
|
/* fdivr */
|
|
if ( (st0_tag == TAG_Zero) &&
|
|
((loaded_tag == TAG_Valid)
|
|
|| (loaded_tag == TAG_Special
|
|
&& isdenormal(&loaded_data))) )
|
|
{
|
|
if ( FPU_divide_by_zero(0, getsign(&loaded_data))
|
|
< 0 )
|
|
{
|
|
/* We use the fact here that the unmasked
|
|
exception in the loaded data was for a
|
|
denormal operand */
|
|
/* Restore the state of the denormal op bit */
|
|
partial_status &= ~SW_Denorm_Op;
|
|
partial_status |= status1 & SW_Denorm_Op;
|
|
}
|
|
else
|
|
setsign(st0_ptr, getsign(&loaded_data));
|
|
}
|
|
}
|
|
goto reg_mem_instr_done;
|
|
}
|
|
|
|
switch ( (FPU_modrm >> 3) & 7 )
|
|
{
|
|
case 0: /* fadd */
|
|
clear_C1();
|
|
FPU_add(&loaded_data, loaded_tag, 0, control_word);
|
|
break;
|
|
case 1: /* fmul */
|
|
clear_C1();
|
|
FPU_mul(&loaded_data, loaded_tag, 0, control_word);
|
|
break;
|
|
case 2: /* fcom */
|
|
FPU_compare_st_data(&loaded_data, loaded_tag);
|
|
break;
|
|
case 3: /* fcomp */
|
|
// bbd: used to typecase to int first, but this corrupted the
|
|
// pointer on 64 bit machines.
|
|
if ( !FPU_compare_st_data(&loaded_data, loaded_tag)
|
|
&& !unmasked )
|
|
FPU_pop();
|
|
break;
|
|
case 4: /* fsub */
|
|
clear_C1();
|
|
FPU_sub(LOADED|loaded_tag, &loaded_data, control_word);
|
|
break;
|
|
case 5: /* fsubr */
|
|
clear_C1();
|
|
FPU_sub(REV|LOADED|loaded_tag, &loaded_data, control_word);
|
|
break;
|
|
case 6: /* fdiv */
|
|
clear_C1();
|
|
FPU_div(LOADED|loaded_tag, &loaded_data, control_word);
|
|
break;
|
|
case 7: /* fdivr */
|
|
clear_C1();
|
|
if ( st0_tag == TAG_Zero )
|
|
partial_status = status1; /* Undo any denorm tag,
|
|
zero-divide has priority. */
|
|
FPU_div(REV|LOADED|loaded_tag, &loaded_data, control_word);
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if ( (FPU_modrm & 0x30) == 0x10 )
|
|
{
|
|
/* The instruction is fcom or fcomp */
|
|
EXCEPTION(EX_StackUnder);
|
|
setcc(SW_C3 | SW_C2 | SW_C0);
|
|
if ( (FPU_modrm & 0x08) && (control_word & CW_Invalid) )
|
|
FPU_pop(); /* fcomp */
|
|
}
|
|
else
|
|
FPU_stack_underflow();
|
|
}
|
|
reg_mem_instr_done:
|
|
operand_address = data_sel_off;
|
|
}
|
|
else {
|
|
if ( !(no_ip_update =
|
|
FPU_load_store(((FPU_modrm & 0x38) | (byte1 & 6)) >> 1,
|
|
addr_modes, data_address)) )
|
|
{
|
|
operand_address = data_sel_off;
|
|
}
|
|
}
|
|
}
|
|
else {
|
|
/* None of these instructions access user memory */
|
|
u_char instr_index = (FPU_modrm & 0x38) | (byte1 & 7);
|
|
|
|
#ifdef PECULIAR_486
|
|
/* This is supposed to be undefined, but a real 80486 seems
|
|
to do this: */
|
|
operand_address.offset = 0;
|
|
operand_address.selector = FPU_DS;
|
|
#endif /* PECULIAR_486 */
|
|
|
|
st0_ptr = &st(0);
|
|
st0_tag = FPU_gettag0();
|
|
switch ( type_table[(int) instr_index] )
|
|
{
|
|
case _NONE_: /* also _REGIc: _REGIn */
|
|
break;
|
|
case _REG0_:
|
|
if ( !NOT_EMPTY_ST0 )
|
|
{
|
|
FPU_stack_underflow();
|
|
goto FPU_instruction_done;
|
|
}
|
|
break;
|
|
case _REGIi:
|
|
if ( !NOT_EMPTY_ST0 || !NOT_EMPTY(FPU_rm) )
|
|
{
|
|
FPU_stack_underflow_i(FPU_rm);
|
|
goto FPU_instruction_done;
|
|
}
|
|
break;
|
|
case _REGIp:
|
|
if ( !NOT_EMPTY_ST0 || !NOT_EMPTY(FPU_rm) )
|
|
{
|
|
FPU_stack_underflow_pop(FPU_rm);
|
|
goto FPU_instruction_done;
|
|
}
|
|
break;
|
|
case _REGI_:
|
|
if ( !NOT_EMPTY_ST0 || !NOT_EMPTY(FPU_rm) )
|
|
{
|
|
FPU_stack_underflow();
|
|
goto FPU_instruction_done;
|
|
}
|
|
break;
|
|
case _PUSH_: /* Only used by the fld st(i) instruction */
|
|
break;
|
|
case _null_:
|
|
FPU_illegal();
|
|
goto FPU_instruction_done;
|
|
default:
|
|
EXCEPTION(EX_INTERNAL|0x111);
|
|
goto FPU_instruction_done;
|
|
}
|
|
(*st_instr_table[(int) instr_index])();
|
|
|
|
FPU_instruction_done:
|
|
;
|
|
}
|
|
|
|
if ( ! no_ip_update )
|
|
instruction_address = entry_sel_off;
|
|
|
|
FPU_fwait_done:
|
|
|
|
#ifdef DEBUG
|
|
FPU_printall();
|
|
#endif /* DEBUG */
|
|
#ifdef BX_NO_BLANK_LABELS
|
|
if(0);
|
|
#endif
|
|
}
|
|
|
|
#endif /* #ifndef USE_WITH_CPU_SIM */
|