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Bochs/bochs/cpu/mult16.cc
Bryce Denney cec9135e9f - Apply patch.replace-Boolean rev 1.3. Every "Boolean" is now changed to a 
"bx_bool" which is always defined as Bit32u on all platforms.  In Carbon
  specific code, Boolean is still used because the Carbon header files
  define it to unsigned char.
- this fixes bug [ 623152 ] MacOSX: Triple Exception Booting win95.
  The bug was that some code in Bochs depends on Boolean to be a
  32 bit value.  (This should be fixed, but I don't know all the places
  where it needs to be fixed yet.)  Because Carbon defined Boolean as
  an unsigned char, Bochs just followed along and used the unsigned char
  definition to avoid compile problems.  This exposed the dependency
  on 32 bit Boolean on MacOS X only and led to major simulation problems,
  that could only be reproduced and debugged on that platform.
- On the mailing list we debated whether to make all Booleans into "bool" or
  our own type.  I chose bx_bool for several reasons.
  1. Unlike C++'s bool, we can guarantee that bx_bool is the same size on all
     platforms, which makes it much less likely to have more platform-specific
     simulation differences in the future.  (I spent hours on a borrowed
     MacOSX machine chasing bug 618388 before discovering that different sized
     Booleans were the problem, and I don't want to repeat that.)
  2. We still have at least one dependency on 32 bit Booleans which must be
     fixed some time, but I don't want to risk introducing new bugs into the
     simulation just before the 2.0 release.

Modified Files:
    bochs.h config.h.in gdbstub.cc logio.cc main.cc pc_system.cc
    pc_system.h plugin.cc plugin.h bios/rombios.c cpu/apic.cc
    cpu/arith16.cc cpu/arith32.cc cpu/arith64.cc cpu/arith8.cc
    cpu/cpu.cc cpu/cpu.h cpu/ctrl_xfer16.cc cpu/ctrl_xfer32.cc
    cpu/ctrl_xfer64.cc cpu/data_xfer16.cc cpu/data_xfer32.cc
    cpu/data_xfer64.cc cpu/debugstuff.cc cpu/exception.cc
    cpu/fetchdecode.cc cpu/flag_ctrl_pro.cc cpu/init.cc
    cpu/io_pro.cc cpu/lazy_flags.cc cpu/lazy_flags.h cpu/mult16.cc
    cpu/mult32.cc cpu/mult64.cc cpu/mult8.cc cpu/paging.cc
    cpu/proc_ctrl.cc cpu/segment_ctrl_pro.cc cpu/stack_pro.cc
    cpu/tasking.cc debug/dbg_main.cc debug/debug.h debug/sim2.cc
    disasm/dis_decode.cc disasm/disasm.h doc/docbook/Makefile
    docs-html/cosimulation.html fpu/wmFPUemu_glue.cc
    gui/amigaos.cc gui/beos.cc gui/carbon.cc gui/gui.cc gui/gui.h
    gui/keymap.cc gui/keymap.h gui/macintosh.cc gui/nogui.cc
    gui/rfb.cc gui/sdl.cc gui/siminterface.cc gui/siminterface.h
    gui/term.cc gui/win32.cc gui/wx.cc gui/wxmain.cc gui/wxmain.h
    gui/x.cc instrument/example0/instrument.cc
    instrument/example0/instrument.h
    instrument/example1/instrument.cc
    instrument/example1/instrument.h
    instrument/stubs/instrument.cc instrument/stubs/instrument.h
    iodev/cdrom.cc iodev/cdrom.h iodev/cdrom_osx.cc iodev/cmos.cc
    iodev/devices.cc iodev/dma.cc iodev/dma.h iodev/eth_arpback.cc
    iodev/eth_packetmaker.cc iodev/eth_packetmaker.h
    iodev/floppy.cc iodev/floppy.h iodev/guest2host.h
    iodev/harddrv.cc iodev/harddrv.h iodev/ioapic.cc
    iodev/ioapic.h iodev/iodebug.cc iodev/iodev.h
    iodev/keyboard.cc iodev/keyboard.h iodev/ne2k.h
    iodev/parallel.h iodev/pci.cc iodev/pci.h iodev/pic.h
    iodev/pit.cc iodev/pit.h iodev/pit_wrap.cc iodev/pit_wrap.h
    iodev/sb16.cc iodev/sb16.h iodev/serial.cc iodev/serial.h
    iodev/vga.cc iodev/vga.h memory/memory.h memory/misc_mem.cc
2002-10-25 11:44:41 +00:00

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/////////////////////////////////////////////////////////////////////////
// $Id: mult16.cc,v 1.10 2002-10-25 11:44:35 bdenney Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
//
// MandrakeSoft S.A.
// 43, rue d'Aboukir
// 75002 Paris - France
// http://www.linux-mandrake.com/
// http://www.mandrakesoft.com/
//
// This library is free software; you can redistribute it and/or
// modify it under the terms of the GNU Lesser General Public
// License as published by the Free Software Foundation; either
// version 2 of the License, or (at your option) any later version.
//
// This library is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public
// License along with this library; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
#define NEED_CPU_REG_SHORTCUTS 1
#include "bochs.h"
#define LOG_THIS BX_CPU_THIS_PTR
void
BX_CPU_C::MUL_AXEw(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, product_16h, product_16l;
Bit32u product_32;
bx_bool temp_flag;
op1_16 = AX;
/* op2 is a register or memory reference */
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
}
product_32 = ((Bit32u) op1_16) * ((Bit32u) op2_16);
product_16l = (product_32 & 0xFFFF);
product_16h = product_32 >> 16;
/* now write product back to destination */
AX = product_16l;
DX = product_16h;
/* set eflags:
* MUL affects the following flags: C,O
*/
temp_flag = (product_16h != 0);
SET_FLAGS_OxxxxC(temp_flag, temp_flag);
}
void
BX_CPU_C::IMUL_AXEw(bxInstruction_c *i)
{
Bit16s op1_16, op2_16;
Bit32s product_32;
Bit16u product_16h, product_16l;
op1_16 = AX;
/* op2 is a register or memory reference */
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_word(i->seg(), RMAddr(i), (Bit16u *) &op2_16);
}
product_32 = ((Bit32s) op1_16) * ((Bit32s) op2_16);
product_16l = (product_32 & 0xFFFF);
product_16h = product_32 >> 16;
/* now write product back to destination */
AX = product_16l;
DX = product_16h;
/* set eflags:
* IMUL affects the following flags: C,O
* IMUL r/m16: condition for clearing CF & OF:
* DX:AX = sign-extend of AX
*/
if ( (DX==0xffff) && (AX & 0x8000) ) {
SET_FLAGS_OxxxxC(0, 0);
}
else if ( (DX==0x0000) && (AX < 0x8000) ) {
SET_FLAGS_OxxxxC(0, 0);
}
else {
SET_FLAGS_OxxxxC(1, 1);
}
}
void
BX_CPU_C::DIV_AXEw(bxInstruction_c *i)
{
Bit16u op2_16, remainder_16, quotient_16l;
Bit32u op1_32, quotient_32;
op1_32 = (((Bit32u) DX) << 16) | ((Bit32u) AX);
/* op2 is a register or memory reference */
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
}
if (op2_16 == 0) {
exception(BX_DE_EXCEPTION, 0, 0);
}
quotient_32 = op1_32 / op2_16;
remainder_16 = op1_32 % op2_16;
quotient_16l = quotient_32 & 0xFFFF;
if (quotient_32 != quotient_16l) {
exception(BX_DE_EXCEPTION, 0, 0);
}
/* set EFLAGS:
* DIV affects the following flags: O,S,Z,A,P,C are undefined
*/
#if INTEL_DIV_FLAG_BUG == 1
set_CF(1);
#endif
/* now write quotient back to destination */
AX = quotient_16l;
DX = remainder_16;
}
void
BX_CPU_C::IDIV_AXEw(bxInstruction_c *i)
{
Bit16s op2_16, remainder_16, quotient_16l;
Bit32s op1_32, quotient_32;
op1_32 = ((((Bit32u) DX) << 16) | ((Bit32u) AX));
/* op2 is a register or memory reference */
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_word(i->seg(), RMAddr(i), (Bit16u *) &op2_16);
}
if (op2_16 == 0) {
exception(BX_DE_EXCEPTION, 0, 0);
}
quotient_32 = op1_32 / op2_16;
remainder_16 = op1_32 % op2_16;
quotient_16l = quotient_32 & 0xFFFF;
if (quotient_32 != quotient_16l) {
exception(BX_DE_EXCEPTION, 0, 0);
}
/* set EFLAGS:
* IDIV affects the following flags: O,S,Z,A,P,C are undefined
*/
#if INTEL_DIV_FLAG_BUG == 1
set_CF(1);
#endif
/* now write quotient back to destination */
AX = quotient_16l;
DX = remainder_16;
}
void
BX_CPU_C::IMUL_GwEwIw(bxInstruction_c *i)
{
#if BX_CPU_LEVEL < 2
BX_PANIC(("IMUL_GvEvIv() unsupported on 8086!"));
#else
Bit16u product_16l;
Bit16s op2_16, op3_16;
Bit32s product_32;
op3_16 = i->Iw();
/* op2 is a register or memory reference */
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_word(i->seg(), RMAddr(i), (Bit16u *) &op2_16);
}
product_32 = op2_16 * op3_16;
product_16l = (product_32 & 0xFFFF);
/* now write product back to destination */
BX_WRITE_16BIT_REG(i->nnn(), product_16l);
/* set eflags:
* IMUL affects the following flags: C,O
* IMUL r16,r/m16,imm16: condition for clearing CF & OF:
* result exactly fits within r16
*/
if (product_32 > -32768 && product_32 < 32767) {
SET_FLAGS_OxxxxC(0, 0);
}
else {
SET_FLAGS_OxxxxC(1, 1);
}
#endif
}
void
BX_CPU_C::IMUL_GwEw(bxInstruction_c *i)
{
#if BX_CPU_LEVEL < 3
BX_PANIC(("IMUL_GvEv() unsupported on 8086!"));
#else
Bit16u product_16l;
Bit16s op1_16, op2_16;
Bit32s product_32;
/* op2 is a register or memory reference */
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_word(i->seg(), RMAddr(i), (Bit16u *) &op2_16);
}
op1_16 = BX_READ_16BIT_REG(i->nnn());
product_32 = op1_16 * op2_16;
product_16l = (product_32 & 0xFFFF);
/* now write product back to destination */
BX_WRITE_16BIT_REG(i->nnn(), product_16l);
/* set eflags:
* IMUL affects the following flags: C,O
* IMUL r16,r/m16,imm16: condition for clearing CF & OF:
* result exactly fits within r16
*/
if (product_32 > -32768 && product_32 < 32767) {
SET_FLAGS_OxxxxC(0, 0);
}
else {
SET_FLAGS_OxxxxC(1, 1);
}
#endif
}
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