681 lines
16 KiB
C++
Executable File
681 lines
16 KiB
C++
Executable File
/////////////////////////////////////////////////////////////////////////
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// $Id: fpu_load_store.cc,v 1.24 2008-05-10 13:34:01 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2003 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu/cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_FPU
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extern float_status_t FPU_pre_exception_handling(Bit16u control_word);
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#include "softfloatx80.h"
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_STi(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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if (! IS_TAG_EMPTY(-1))
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{
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BX_CPU_THIS_PTR FPU_stack_overflow();
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return;
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}
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if (IS_TAG_EMPTY(i->rm()))
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{
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BX_CPU_THIS_PTR FPU_stack_underflow(0);
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return;
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}
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floatx80 sti_reg = BX_READ_FPU_REG(i->rm());
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REG(sti_reg, 0);
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#else
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BX_INFO(("FLD_STi: required FPU, configure --enable-fpu"));
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_SINGLE_REAL(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
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clear_C1();
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if (! IS_TAG_EMPTY(-1)) {
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BX_CPU_THIS_PTR FPU_stack_overflow();
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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// convert to floatx80 format
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floatx80 result = float32_to_floatx80(load_reg, status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FLD_SINGLE_REAL: required FPU, configure --enable-fpu"));
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_DOUBLE_REAL(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
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clear_C1();
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if (! IS_TAG_EMPTY(-1)) {
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BX_CPU_THIS_PTR FPU_stack_overflow();
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return;
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}
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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// convert to floatx80 format
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floatx80 result = float64_to_floatx80(load_reg, status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FLD_DOUBLE_REAL: required FPU, configure --enable-fpu"));
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FLD_EXTENDED_REAL(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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floatx80 result;
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read_virtual_tword(i->seg(), RMAddr(i), &result);
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clear_C1();
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if (! IS_TAG_EMPTY(-1)) {
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BX_CPU_THIS_PTR FPU_stack_overflow();
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return;
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}
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FLD_EXTENDED_REAL: required FPU, configure --enable-fpu"));
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#endif
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}
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/* DF /0 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FILD_WORD_INTEGER(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
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clear_C1();
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if (! IS_TAG_EMPTY(-1)) {
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BX_CPU_THIS_PTR FPU_stack_overflow();
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return;
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}
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floatx80 result = int32_to_floatx80((Bit32s) load_reg);
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FILD_WORD_INTEGER: required FPU, configure --enable-fpu"));
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#endif
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}
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/* DB /0 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FILD_DWORD_INTEGER(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
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clear_C1();
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if (! IS_TAG_EMPTY(-1)) {
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BX_CPU_THIS_PTR FPU_stack_overflow();
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return;
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}
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floatx80 result = int32_to_floatx80(load_reg);
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FILD_DWORD_INTEGER: required FPU, configure --enable-fpu"));
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#endif
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}
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/* DF /5 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FILD_QWORD_INTEGER(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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Bit64s load_reg = (Bit64s) read_virtual_qword(i->seg(), RMAddr(i));
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clear_C1();
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if (! IS_TAG_EMPTY(-1)) {
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BX_CPU_THIS_PTR FPU_stack_overflow();
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return;
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}
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floatx80 result = int64_to_floatx80(load_reg);
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FILD_QWORD_INTEGER: required FPU, configure --enable-fpu"));
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#endif
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}
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/* DF /4 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FBLD_PACKED_BCD(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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// read packed bcd from memory
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Bit16u hi2 = read_virtual_word (i->seg(), RMAddr(i) + 8);
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Bit64u lo8 = read_virtual_qword(i->seg(), RMAddr(i));
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clear_C1();
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if (! IS_TAG_EMPTY(-1))
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{
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BX_CPU_THIS_PTR FPU_stack_overflow();
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return;
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}
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// convert packed BCD to 64-bit integer
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Bit64s scale = 1;
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Bit64s val64 = 0;
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for (int n = 0; n < 16; n++)
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{
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val64 += (lo8 & 0x0f) * scale;
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lo8 >>= 4;
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scale *= 10;
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}
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val64 += (hi2 & 0x0f) * scale;
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val64 += ((hi2>>4) & 0x0f) * scale * 10;
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floatx80 result = int64_to_floatx80(val64);
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if (hi2 & 0x8000) // set negative
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floatx80_chs(result);
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BX_CPU_THIS_PTR the_i387.FPU_push();
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BX_WRITE_FPU_REG(result, 0);
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#else
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BX_INFO(("FBLD_PACKED_BCD: required FPU, configure --enable-fpu"));
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_STi(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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int pop_stack = i->nnn() & 1;
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// handle special case of FSTP opcode @ 0xDF 0xD0..D7
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if (i->b1() == 0xdf)
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pop_stack = 1;
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clear_C1();
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if (IS_TAG_EMPTY(0)) {
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BX_CPU_THIS_PTR FPU_stack_underflow(i->rm(), pop_stack);
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return;
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}
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floatx80 st0_reg = BX_READ_FPU_REG(0);
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BX_WRITE_FPU_REG(st0_reg, i->rm());
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FST(P)_STi: required FPU, configure --enable-fpu"));
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_SINGLE_REAL(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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float32 save_reg = float32_default_nan; /* The masked response */
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int pop_stack = i->nnn() & 1;
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
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if (! (BX_CPU_THIS_PTR the_i387.is_IA_masked()))
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return;
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}
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else
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{
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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save_reg = floatx80_to_float32(BX_READ_FPU_REG(0), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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}
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write_virtual_dword(i->seg(), RMAddr(i), save_reg);
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FST(P)_SINGLE_REAL: required FPU, configure --enable-fpu"));
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FST_DOUBLE_REAL(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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float64 save_reg = float64_default_nan; /* The masked response */
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int pop_stack = i->nnn() & 1;
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
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if (! (BX_CPU_THIS_PTR the_i387.is_IA_masked()))
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return;
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}
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else
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{
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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save_reg = floatx80_to_float64(BX_READ_FPU_REG(0), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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}
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write_virtual_qword(i->seg(), RMAddr(i), save_reg);
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FST(P)_DOUBLE_REAL: required FPU, configure --enable-fpu"));
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#endif
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}
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/* DB /7 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FSTP_EXTENDED_REAL(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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clear_C1();
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floatx80 save_reg = floatx80_default_nan; /* The masked response */
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
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if (! (BX_CPU_THIS_PTR the_i387.is_IA_masked()))
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return;
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}
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else
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{
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save_reg = BX_READ_FPU_REG(0);
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}
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write_virtual_tword(i->seg(), RMAddr(i), &save_reg);
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FSTP_EXTENDED_REAL: required FPU, configure --enable-fpu"));
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIST_WORD_INTEGER(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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Bit16s save_reg = int16_indefinite;
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int pop_stack = i->nnn() & 1;
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
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if (! (BX_CPU_THIS_PTR the_i387.is_IA_masked()))
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return;
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}
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else
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{
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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save_reg = floatx80_to_int16(BX_READ_FPU_REG(0), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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}
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write_virtual_word(i->seg(), RMAddr(i), (Bit16u)(save_reg));
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FIST(P)_WORD_INTEGER: required FPU, configure --enable-fpu"));
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FIST_DWORD_INTEGER(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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Bit32s save_reg = int32_indefinite; /* The masked response */
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int pop_stack = i->nnn() & 1;
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
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if (! (BX_CPU_THIS_PTR the_i387.is_IA_masked()))
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return;
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}
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else
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{
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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save_reg = floatx80_to_int32(BX_READ_FPU_REG(0), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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}
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write_virtual_dword(i->seg(), RMAddr(i), (Bit32u)(save_reg));
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FIST(P)_DWORD_INTEGER: required FPU, configure --enable-fpu"));
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTP_QWORD_INTEGER(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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Bit64s save_reg = int64_indefinite; /* The masked response */
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
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if (! (BX_CPU_THIS_PTR the_i387.is_IA_masked()))
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return;
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}
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else
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{
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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save_reg = floatx80_to_int64(BX_READ_FPU_REG(0), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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}
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write_virtual_qword(i->seg(), RMAddr(i), (Bit64u)(save_reg));
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FISTP_QWORD_INTEGER: required FPU, configure --enable-fpu"));
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#endif
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}
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FBSTP_PACKED_BCD(bxInstruction_c *i)
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{
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#if BX_SUPPORT_FPU
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BX_CPU_THIS_PTR prepareFPU(i);
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/*
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* The packed BCD integer indefinite encoding (FFFFC000000000000000H)
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* is stored in response to a masked floating-point invalid-operation
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* exception.
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*/
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Bit16u save_reg_hi = 0xFFFF;
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Bit64u save_reg_lo = BX_CONST64(0xC000000000000000);
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
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if (! (BX_CPU_THIS_PTR the_i387.is_IA_masked()))
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return;
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}
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else
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{
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 reg = BX_READ_FPU_REG(0);
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Bit64s save_val = floatx80_to_int64(reg, status);
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int sign = (reg.exp & 0x8000) != 0;
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if (sign)
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save_val = -save_val;
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if (save_val > BX_CONST64(999999999999999999))
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{
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float_raise(status, float_flag_invalid);
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}
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if (! (status.float_exception_flags & float_flag_invalid))
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{
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save_reg_hi = (sign) ? 0x8000 : 0;
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save_reg_lo = 0;
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for (int i=0; i<16; i++)
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{
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save_reg_lo += ((Bit64u)(save_val % 10)) << (4*i);
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save_val /= 10;
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}
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save_reg_hi += (Bit16u)(save_val % 10);
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save_val /= 10;
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save_reg_hi += (Bit16u)(save_val % 10) << 4;
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}
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/* check for fpu arithmetic exceptions */
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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}
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// write packed bcd to memory
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write_virtual_qword(i->seg(), RMAddr(i), save_reg_lo);
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write_virtual_word (i->seg(), RMAddr(i) + 8, save_reg_hi);
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FBSTP_PACKED_BCD: required FPU, configure --enable-fpu"));
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#endif
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}
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/* DF /1 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP16(bxInstruction_c *i)
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{
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#if BX_SUPPORT_SSE >= 3
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BX_CPU_THIS_PTR prepareFPU(i);
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Bit16s save_reg = int16_indefinite; /* The masked response */
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
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if (! (BX_CPU_THIS_PTR the_i387.is_IA_masked()))
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return;
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}
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else
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{
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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save_reg = floatx80_to_int16_round_to_zero(BX_READ_FPU_REG(0), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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}
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write_virtual_word(i->seg(), RMAddr(i), (Bit16u)(save_reg));
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FISTTP16: required SSE3, use --enable-sse option"));
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UndefinedOpcode(i);
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#endif
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}
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/* DB /1 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP32(bxInstruction_c *i)
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{
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#if BX_SUPPORT_SSE >= 3
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BX_CPU_THIS_PTR prepareFPU(i);
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Bit32s save_reg = int32_indefinite; /* The masked response */
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
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if (! (BX_CPU_THIS_PTR the_i387.is_IA_masked()))
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return;
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}
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else
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{
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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save_reg = floatx80_to_int32_round_to_zero(BX_READ_FPU_REG(0), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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}
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write_virtual_dword(i->seg(), RMAddr(i), (Bit32u)(save_reg));
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FISTTP32: required SSE3, use --enable-sse option"));
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UndefinedOpcode(i);
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#endif
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}
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/* DD /1 */
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::FISTTP64(bxInstruction_c *i)
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{
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#if BX_SUPPORT_SSE >= 3
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BX_CPU_THIS_PTR prepareFPU(i);
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Bit64s save_reg = int64_indefinite; /* The masked response */
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clear_C1();
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if (IS_TAG_EMPTY(0))
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{
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BX_CPU_THIS_PTR FPU_exception(FPU_EX_Stack_Underflow);
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if (! (BX_CPU_THIS_PTR the_i387.is_IA_masked()))
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return;
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}
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else
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{
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float_status_t status =
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FPU_pre_exception_handling(BX_CPU_THIS_PTR the_i387.get_control_word());
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save_reg = floatx80_to_int64_round_to_zero(BX_READ_FPU_REG(0), status);
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if (BX_CPU_THIS_PTR FPU_exception(status.float_exception_flags))
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return;
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}
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write_virtual_qword(i->seg(), RMAddr(i), (Bit64u)(save_reg));
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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#else
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BX_INFO(("FISTTP64: required SSE3, use --enable-sse option"));
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UndefinedOpcode(i);
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#endif
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}
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#endif
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