62d0c8abf7
32-bit CPU using Bochs binary compiled with x86-64 support. The commit also fixes some init.cc issues with initialization of SYSCALL/SYSRET MSR in AMD hosts and also includes code reorg.
208 lines
6.2 KiB
C++
208 lines
6.2 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2011 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#include "bochs.h"
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#include "cpu.h"
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#include "p3_katmai.h"
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#if BX_CPU_LEVEL >= 6
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#define LOG_THIS cpu->
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void p3_katmai_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const
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{
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switch(function) {
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case 0x00000000:
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get_std_cpuid_leaf_0(leaf);
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return;
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case 0x00000001:
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get_std_cpuid_leaf_1(leaf);
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return;
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case 0x00000002:
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get_std_cpuid_leaf_2(leaf);
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return;
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case 0x00000003:
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default:
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get_std_cpuid_leaf_3(leaf);
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return;
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}
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}
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Bit64u p3_katmai_t::get_isa_extensions_bitmask(void) const
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{
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return BX_ISA_X87 |
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BX_ISA_486 |
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BX_ISA_PENTIUM |
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BX_ISA_P6 |
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BX_ISA_MMX |
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BX_ISA_SYSENTER_SYSEXIT |
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BX_ISA_SSE;
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}
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Bit32u p3_katmai_t::get_cpu_extensions_bitmask(void) const
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{
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return BX_CPU_DEBUG_EXTENSIONS |
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BX_CPU_VME |
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BX_CPU_PSE |
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BX_CPU_PAE |
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BX_CPU_PGE |
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#if BX_PHY_ADDRESS_LONG
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BX_CPU_PSE36 |
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#endif
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BX_CPU_MTRR |
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BX_CPU_PAT;
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}
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// leaf 0x00000000 //
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void p3_katmai_t::get_std_cpuid_leaf_0(cpuid_function_t *leaf) const
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{
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static const char* vendor_string = "GenuineIntel";
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// EAX: highest std function understood by CPUID
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// EBX: vendor ID string
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// EDX: vendor ID string
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// ECX: vendor ID string
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leaf->eax = 0x3;
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// CPUID vendor string (e.g. GenuineIntel, AuthenticAMD, CentaurHauls, ...)
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memcpy(&(leaf->ebx), vendor_string, 4);
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memcpy(&(leaf->edx), vendor_string + 4, 4);
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memcpy(&(leaf->ecx), vendor_string + 8, 4);
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#ifdef BX_BIG_ENDIAN
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leaf->ebx = bx_bswap32(leaf->ebx);
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leaf->ecx = bx_bswap32(leaf->ecx);
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leaf->edx = bx_bswap32(leaf->edx);
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#endif
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}
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// leaf 0x00000001 //
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void p3_katmai_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
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{
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// EAX: CPU Version Information
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// [3:0] Stepping ID
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// [7:4] Model: starts at 1
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// [11:8] Family: 4=486, 5=Pentium, 6=PPro, ...
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// [13:12] Type: 0=OEM, 1=overdrive, 2=dual cpu, 3=reserved
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// [19:16] Extended Model
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// [27:20] Extended Family
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leaf->eax = 0x00000673;
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leaf->ebx = 0;
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leaf->ecx = 0;
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// EDX: Standard Feature Flags
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// * [0:0] FPU on chip
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// * [1:1] VME: Virtual-8086 Mode enhancements
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// * [2:2] DE: Debug Extensions (I/O breakpoints)
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// * [3:3] PSE: Page Size Extensions
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// * [4:4] TSC: Time Stamp Counter
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// * [5:5] MSR: RDMSR and WRMSR support
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// * [6:6] PAE: Physical Address Extensions
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// * [7:7] MCE: Machine Check Exception
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// * [8:8] CXS: CMPXCHG8B instruction
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// [9:9] APIC: APIC on Chip
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// [10:10] Reserved
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// * [11:11] SYSENTER/SYSEXIT support
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// * [12:12] MTRR: Memory Type Range Reg
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// * [13:13] PGE/PTE Global Bit
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// * [14:14] MCA: Machine Check Architecture
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// * [15:15] CMOV: Cond Mov/Cmp Instructions
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// * [16:16] PAT: Page Attribute Table
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// * [17:17] PSE-36: Physical Address Extensions
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// * [18:18] PSN: Processor Serial Number
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// [19:19] CLFLUSH: CLFLUSH Instruction support
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// [20:20] Reserved
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// [21:21] DS: Debug Store
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// [22:22] ACPI: Thermal Monitor and Software Controlled Clock Facilities
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// * [23:23] MMX Technology
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// * [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available)
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// * [25:25] SSE: SSE Extensions
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// [26:26] SSE2: SSE2 Extensions
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// [27:27] Self Snoop
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// [28:28] Hyper Threading Technology
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// [29:29] TM: Thermal Monitor
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// [30:30] Reserved
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// [31:31] PBE: Pending Break Enable
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leaf->edx = BX_CPUID_STD_X87 |
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BX_CPUID_STD_VME |
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BX_CPUID_STD_DEBUG_EXTENSIONS |
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BX_CPUID_STD_PSE |
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BX_CPUID_STD_TSC |
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BX_CPUID_STD_MSR |
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BX_CPUID_STD_PAE |
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BX_CPUID_STD_MCE |
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BX_CPUID_STD_CMPXCHG8B |
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BX_CPUID_STD_SYSENTER_SYSEXIT |
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BX_CPUID_STD_MTRR |
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BX_CPUID_STD_GLOBAL_PAGES |
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BX_CPUID_STD_MCA |
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BX_CPUID_STD_CMOV |
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BX_CPUID_STD_PAT |
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#if BX_PHY_ADDRESS_LONG
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BX_CPUID_STD_PSE36 |
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#endif
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BX_CPUID_STD_MMX |
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BX_CPUID_STD_FXSAVE_FXRSTOR |
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BX_CPUID_STD_SSE;
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#if BX_SUPPORT_APIC
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// if MSR_APICBASE APIC Global Enable bit has been cleared,
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// the CPUID feature flag for the APIC is set to 0.
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if (cpu->msr.apicbase & 0x800)
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leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
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#endif
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}
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// leaf 0x00000002 //
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void p3_katmai_t::get_std_cpuid_leaf_2(cpuid_function_t *leaf) const
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{
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// CPUID function 0x00000002 - Cache and TLB Descriptors
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leaf->eax = 0x03020101;
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leaf->ebx = 0x00000000;
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leaf->ecx = 0x00000000;
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leaf->edx = 0x0C040843;
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}
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// leaf 0x00000003 //
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void p3_katmai_t::get_std_cpuid_leaf_3(cpuid_function_t *leaf) const
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{
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// CPUID function 0x00000003 - Processor Serial Number
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leaf->eax = 0;
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leaf->ebx = 0;
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leaf->ecx = 0;
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leaf->edx = 0;
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}
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void p3_katmai_t::dump_cpuid(void) const
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{
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struct cpuid_function_t leaf;
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for (unsigned n=0; n<=0x3; n++) {
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get_cpuid_leaf(n, 0x00000000, &leaf);
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BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, leaf.edx));
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}
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}
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bx_cpuid_t *create_p3_katmai_cpuid(BX_CPU_C *cpu) { return new p3_katmai_t(cpu); }
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#endif
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