1274 lines
32 KiB
C++
1274 lines
32 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2003-2012 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu/cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_FPU
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float_status_t i387cw_to_softfloat_status_word(Bit16u control_word)
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{
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float_status_t status;
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int precision = control_word & FPU_CW_PC;
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switch(precision)
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{
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case FPU_PR_32_BITS:
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status.float_rounding_precision = 32;
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break;
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case FPU_PR_64_BITS:
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status.float_rounding_precision = 64;
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break;
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case FPU_PR_80_BITS:
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status.float_rounding_precision = 80;
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break;
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default:
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/* With the precision control bits set to 01 "(reserved)", a
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real CPU behaves as if the precision control bits were
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set to 11 "80 bits" */
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status.float_rounding_precision = 80;
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}
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status.float_exception_flags = 0; // clear exceptions before execution
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status.float_nan_handling_mode = float_first_operand_nan;
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status.float_rounding_mode = (control_word & FPU_CW_RC) >> 10;
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status.flush_underflow_to_zero = 0;
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status.float_suppress_exception = 0;
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status.float_exception_masks = control_word & FPU_CW_Exceptions_Mask;
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status.denormals_are_zeros = 0;
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return status;
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}
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#include "softfloatx80.h"
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floatx80 FPU_handle_NaN(floatx80 a, int aIsNaN, float32 b32, int bIsNaN, float_status_t &status)
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{
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int aIsSignalingNaN = floatx80_is_signaling_nan(a);
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int bIsSignalingNaN = float32_is_signaling_nan(b32);
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if (aIsSignalingNaN | bIsSignalingNaN)
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float_raise(status, float_flag_invalid);
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// propagate QNaN to SNaN
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a = propagateFloatx80NaN(a, status);
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if (aIsNaN & !bIsNaN) return a;
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// float32 is NaN so conversion will propagate SNaN to QNaN and raise
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// appropriate exception flags
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floatx80 b = float32_to_floatx80(b32, status);
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if (aIsSignalingNaN) {
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if (bIsSignalingNaN) goto returnLargerSignificand;
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return bIsNaN ? b : a;
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}
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else if (aIsNaN) {
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if (bIsSignalingNaN) return a;
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returnLargerSignificand:
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if (a.fraction < b.fraction) return b;
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if (b.fraction < a.fraction) return a;
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return (a.exp < b.exp) ? a : b;
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}
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else {
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return b;
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}
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}
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int FPU_handle_NaN(floatx80 a, float32 b, floatx80 &r, float_status_t &status)
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{
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if (floatx80_is_unsupported(a)) {
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float_raise(status, float_flag_invalid);
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r = floatx80_default_nan;
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return 1;
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}
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int aIsNaN = floatx80_is_nan(a), bIsNaN = float32_is_nan(b);
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if (aIsNaN | bIsNaN) {
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r = FPU_handle_NaN(a, aIsNaN, b, bIsNaN, status);
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return 1;
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}
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return 0;
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}
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floatx80 FPU_handle_NaN(floatx80 a, int aIsNaN, float64 b64, int bIsNaN, float_status_t &status)
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{
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int aIsSignalingNaN = floatx80_is_signaling_nan(a);
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int bIsSignalingNaN = float64_is_signaling_nan(b64);
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if (aIsSignalingNaN | bIsSignalingNaN)
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float_raise(status, float_flag_invalid);
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// propagate QNaN to SNaN
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a = propagateFloatx80NaN(a, status);
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if (aIsNaN & !bIsNaN) return a;
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// float64 is NaN so conversion will propagate SNaN to QNaN and raise
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// appropriate exception flags
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floatx80 b = float64_to_floatx80(b64, status);
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if (aIsSignalingNaN) {
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if (bIsSignalingNaN) goto returnLargerSignificand;
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return bIsNaN ? b : a;
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}
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else if (aIsNaN) {
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if (bIsSignalingNaN) return a;
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returnLargerSignificand:
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if (a.fraction < b.fraction) return b;
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if (b.fraction < a.fraction) return a;
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return (a.exp < b.exp) ? a : b;
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}
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else {
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return b;
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}
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}
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int FPU_handle_NaN(floatx80 a, float64 b, floatx80 &r, float_status_t &status)
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{
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if (floatx80_is_unsupported(a)) {
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float_raise(status, float_flag_invalid);
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r = floatx80_default_nan;
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return 1;
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}
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int aIsNaN = floatx80_is_nan(a), bIsNaN = float64_is_nan(b);
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if (aIsNaN | bIsNaN) {
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r = FPU_handle_NaN(a, aIsNaN, b, bIsNaN, status);
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return 1;
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}
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return 0;
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_ST0_STj(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->src()))
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{
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FPU_stack_underflow(0);
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BX_NEXT_INSTR(i);
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}
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floatx80 a = BX_READ_FPU_REG(0);
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floatx80 b = BX_READ_FPU_REG(i->src());
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float_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_add(a, b, status);
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if (! FPU_exception(status.float_exception_flags))
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BX_WRITE_FPU_REG(result, 0);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_STi_ST0(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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int pop_stack = i->b1() & 2;
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->dst()))
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{
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FPU_stack_underflow(i->dst(), pop_stack);
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BX_NEXT_INSTR(i);
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}
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floatx80 a = BX_READ_FPU_REG(i->dst());
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floatx80 b = BX_READ_FPU_REG(0);
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float_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_add(a, b, status);
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if (! FPU_exception(status.float_exception_flags)) {
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BX_WRITE_FPU_REG(result, i->dst());
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_SINGLE_REAL(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
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float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0)) {
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FPU_stack_underflow(0);
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BX_NEXT_INSTR(i);
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}
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float_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 a = BX_READ_FPU_REG(0), result;
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if (! FPU_handle_NaN(a, load_reg, result, status))
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result = floatx80_add(a, float32_to_floatx80(load_reg, status), status);
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if (! FPU_exception(status.float_exception_flags))
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BX_WRITE_FPU_REG(result, 0);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FADD_DOUBLE_REAL(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
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float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0)) {
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FPU_stack_underflow(0);
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BX_NEXT_INSTR(i);
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}
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float_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 a = BX_READ_FPU_REG(0), result;
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if (! FPU_handle_NaN(a, load_reg, result, status))
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result = floatx80_add(a, float64_to_floatx80(load_reg, status), status);
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if (! FPU_exception(status.float_exception_flags))
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BX_WRITE_FPU_REG(result, 0);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FIADD_WORD_INTEGER(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
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Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0)) {
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FPU_stack_underflow(0);
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BX_NEXT_INSTR(i);
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}
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floatx80 a = BX_READ_FPU_REG(0);
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floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
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float_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_add(a, b, status);
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if (! FPU_exception(status.float_exception_flags))
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BX_WRITE_FPU_REG(result, 0);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FIADD_DWORD_INTEGER(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
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Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0)) {
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FPU_stack_underflow(0);
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BX_NEXT_INSTR(i);
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}
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floatx80 a = BX_READ_FPU_REG(0);
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floatx80 b = int32_to_floatx80(load_reg);
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float_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_add(a, b, status);
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if (! FPU_exception(status.float_exception_flags))
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BX_WRITE_FPU_REG(result, 0);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_ST0_STj(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->src()))
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{
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FPU_stack_underflow(0);
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BX_NEXT_INSTR(i);
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}
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floatx80 a = BX_READ_FPU_REG(0);
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floatx80 b = BX_READ_FPU_REG(i->src());
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float_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_mul(a, b, status);
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if (! FPU_exception(status.float_exception_flags))
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BX_WRITE_FPU_REG(result, 0);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_STi_ST0(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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int pop_stack = i->b1() & 2;
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clear_C1();
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if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->dst()))
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{
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FPU_stack_underflow(i->dst(), pop_stack);
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BX_NEXT_INSTR(i);
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}
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floatx80 a = BX_READ_FPU_REG(i->dst());
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floatx80 b = BX_READ_FPU_REG(0);
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float_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 result = floatx80_mul(a, b, status);
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if (! FPU_exception(status.float_exception_flags)) {
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BX_WRITE_FPU_REG(result, i->dst());
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if (pop_stack)
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BX_CPU_THIS_PTR the_i387.FPU_pop();
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}
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_SINGLE_REAL(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
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float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0)) {
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FPU_stack_underflow(0);
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BX_NEXT_INSTR(i);
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}
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float_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 a = BX_READ_FPU_REG(0), result;
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if (! FPU_handle_NaN(a, load_reg, result, status))
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result = floatx80_mul(a, float32_to_floatx80(load_reg, status), status);
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if (! FPU_exception(status.float_exception_flags))
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BX_WRITE_FPU_REG(result, 0);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FMUL_DOUBLE_REAL(bxInstruction_c *i)
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{
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BX_CPU_THIS_PTR prepareFPU(i);
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RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
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float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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clear_C1();
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if (IS_TAG_EMPTY(0)) {
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FPU_stack_underflow(0);
|
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BX_NEXT_INSTR(i);
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}
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float_status_t status =
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i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
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floatx80 a = BX_READ_FPU_REG(0), result;
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if (! FPU_handle_NaN(a, load_reg, result, status))
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result = floatx80_mul(a, float64_to_floatx80(load_reg, status), status);
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|
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if (! FPU_exception(status.float_exception_flags))
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BX_WRITE_FPU_REG(result, 0);
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FIMUL_WORD_INTEGER(bxInstruction_c *i)
|
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{
|
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BX_CPU_THIS_PTR prepareFPU(i);
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RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
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Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
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BX_CPU_THIS_PTR FPU_update_last_instruction(i);
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|
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clear_C1();
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|
|
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if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
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BX_NEXT_INSTR(i);
|
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}
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|
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floatx80 a = BX_READ_FPU_REG(0);
|
|
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_mul(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FIMUL_DWORD_INTEGER(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
floatx80 b = int32_to_floatx80(load_reg);
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_mul(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_ST0_STj(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->src()))
|
|
{
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
floatx80 b = BX_READ_FPU_REG(i->src());
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_ST0_STj(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->src()))
|
|
{
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = BX_READ_FPU_REG(i->src());
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_STi_ST0(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
int pop_stack = i->b1() & 2;
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->dst()))
|
|
{
|
|
FPU_stack_underflow(i->dst(), pop_stack);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = BX_READ_FPU_REG(i->dst());
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags)) {
|
|
BX_WRITE_FPU_REG(result, i->dst());
|
|
if (pop_stack)
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
}
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_STi_ST0(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
int pop_stack = i->b1() & 2;
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->dst()))
|
|
{
|
|
FPU_stack_underflow(i->dst(), pop_stack);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
floatx80 b = BX_READ_FPU_REG(i->dst());
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags)) {
|
|
BX_WRITE_FPU_REG(result, i->dst());
|
|
if (pop_stack)
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
}
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_SINGLE_REAL(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0), result;
|
|
if (! FPU_handle_NaN(a, load_reg, result, status))
|
|
result = floatx80_sub(a, float32_to_floatx80(load_reg, status), status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_SINGLE_REAL(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 b = BX_READ_FPU_REG(0), result;
|
|
if (! FPU_handle_NaN(b, load_reg, result, status))
|
|
result = floatx80_sub(float32_to_floatx80(load_reg, status), b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUB_DOUBLE_REAL(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0), result;
|
|
if (! FPU_handle_NaN(a, load_reg, result, status))
|
|
result = floatx80_sub(a, float64_to_floatx80(load_reg, status), status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FSUBR_DOUBLE_REAL(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
|
|
floatx80 b = BX_READ_FPU_REG(0), result;
|
|
if (! FPU_handle_NaN(b, load_reg, result, status))
|
|
result = floatx80_sub(float64_to_floatx80(load_reg, status), b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUB_WORD_INTEGER(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUBR_WORD_INTEGER(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = int32_to_floatx80((Bit32s)(load_reg));
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUB_DWORD_INTEGER(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_sub(BX_READ_FPU_REG(0), int32_to_floatx80(load_reg), status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FISUBR_DWORD_INTEGER(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = int32_to_floatx80(load_reg);
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_sub(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_ST0_STj(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->src()))
|
|
{
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
floatx80 b = BX_READ_FPU_REG(i->src());
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_ST0_STj(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->src()))
|
|
{
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = BX_READ_FPU_REG(i->src());
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_STi_ST0(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
int pop_stack = i->b1() & 2;
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->dst()))
|
|
{
|
|
FPU_stack_underflow(i->dst(), pop_stack);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = BX_READ_FPU_REG(i->dst());
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags)) {
|
|
BX_WRITE_FPU_REG(result, i->dst());
|
|
if (pop_stack)
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
}
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_STi_ST0(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
int pop_stack = i->b1() & 2;
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0) || IS_TAG_EMPTY(i->dst()))
|
|
{
|
|
FPU_stack_underflow(i->dst(), pop_stack);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
floatx80 b = BX_READ_FPU_REG(i->dst());
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags)) {
|
|
BX_WRITE_FPU_REG(result, i->dst());
|
|
if (pop_stack)
|
|
BX_CPU_THIS_PTR the_i387.FPU_pop();
|
|
}
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_SINGLE_REAL(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0), result;
|
|
if (! FPU_handle_NaN(a, load_reg, result, status))
|
|
result = floatx80_div(a, float32_to_floatx80(load_reg, status), status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_SINGLE_REAL(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
float32 load_reg = read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 b = BX_READ_FPU_REG(0), result;
|
|
if (! FPU_handle_NaN(b, load_reg, result, status))
|
|
result = floatx80_div(float32_to_floatx80(load_reg, status), b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIV_DOUBLE_REAL(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0), result;
|
|
if (! FPU_handle_NaN(a, load_reg, result, status))
|
|
result = floatx80_div(a, float64_to_floatx80(load_reg, status), status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FDIVR_DOUBLE_REAL(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
float64 load_reg = read_virtual_qword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 b = BX_READ_FPU_REG(0), result;
|
|
if (! FPU_handle_NaN(b, load_reg, result, status))
|
|
result = floatx80_div(float64_to_floatx80(load_reg, status), b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIV_WORD_INTEGER(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
floatx80 b = int32_to_floatx80((Bit32s)(load_reg));
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIVR_WORD_INTEGER(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
Bit16s load_reg = (Bit16s) read_virtual_word(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = int32_to_floatx80((Bit32s)(load_reg));
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIV_DWORD_INTEGER(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = BX_READ_FPU_REG(0);
|
|
floatx80 b = int32_to_floatx80(load_reg);
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FIDIVR_DWORD_INTEGER(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
|
|
RMAddr(i) = BX_CPU_RESOLVE_ADDR(i->ResolveModrm, (i));
|
|
Bit32s load_reg = (Bit32s) read_virtual_dword(i->seg(), RMAddr(i));
|
|
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
floatx80 a = int32_to_floatx80(load_reg);
|
|
floatx80 b = BX_READ_FPU_REG(0);
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_div(a, b, status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FSQRT(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_sqrt(BX_READ_FPU_REG(0), status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
/* D9 FC */
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::FRNDINT(bxInstruction_c *i)
|
|
{
|
|
BX_CPU_THIS_PTR prepareFPU(i);
|
|
BX_CPU_THIS_PTR FPU_update_last_instruction(i);
|
|
|
|
clear_C1();
|
|
|
|
if (IS_TAG_EMPTY(0)) {
|
|
FPU_stack_underflow(0);
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
float_status_t status =
|
|
i387cw_to_softfloat_status_word(BX_CPU_THIS_PTR the_i387.get_control_word());
|
|
|
|
floatx80 result = floatx80_round_to_int(BX_READ_FPU_REG(0), status);
|
|
|
|
if (! FPU_exception(status.float_exception_flags))
|
|
BX_WRITE_FPU_REG(result, 0);
|
|
|
|
BX_NEXT_INSTR(i);
|
|
}
|
|
|
|
#endif
|