24d1d540df
- behaviour of some PCI configuration registers fixed
282 lines
8.1 KiB
C++
282 lines
8.1 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: pci_ide.cc,v 1.4 2004-06-22 19:34:55 vruppert Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2002 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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//
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// i440FX Support - PCI IDE controller (PIIX3)
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//
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// Define BX_PLUGGABLE in files that can be compiled into plugins. For
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// platforms that require a special tag on exported symbols, BX_PLUGGABLE
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// is used to know when we are exporting symbols and when we are importing.
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#define BX_PLUGGABLE
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#include "iodev.h"
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#if BX_PCI_SUPPORT
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#define LOG_THIS thePciIdeController->
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bx_pci_ide_c *thePciIdeController = NULL;
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int
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libpci_ide_LTX_plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *argv[])
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{
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thePciIdeController = new bx_pci_ide_c ();
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bx_devices.pluginPciIdeController = thePciIdeController;
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BX_REGISTER_DEVICE_DEVMODEL(plugin, type, thePciIdeController, BX_PLUGIN_PCI_IDE);
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return(0); // Success
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}
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void
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libpci_ide_LTX_plugin_fini(void)
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{
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}
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bx_pci_ide_c::bx_pci_ide_c(void)
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{
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put("PIDE");
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settype(PCIIDELOG);
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}
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bx_pci_ide_c::~bx_pci_ide_c(void)
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{
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// nothing for now
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BX_DEBUG(("Exit."));
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}
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void
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bx_pci_ide_c::init(void)
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{
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// called once when bochs initializes
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DEV_register_pci_handlers(this, pci_read_handler, pci_write_handler,
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BX_PCI_DEVICE(1,1), "PIIX3 PCI IDE controller");
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for (unsigned i=0; i<256; i++)
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BX_PIDE_THIS s.pci_conf[i] = 0x0;
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// readonly registers
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BX_PIDE_THIS s.pci_conf[0x00] = 0x86;
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BX_PIDE_THIS s.pci_conf[0x01] = 0x80;
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BX_PIDE_THIS s.pci_conf[0x02] = 0x10;
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BX_PIDE_THIS s.pci_conf[0x03] = 0x70;
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BX_PIDE_THIS s.pci_conf[0x09] = 0x80;
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BX_PIDE_THIS s.pci_conf[0x0a] = 0x01;
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BX_PIDE_THIS s.pci_conf[0x0b] = 0x01;
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BX_PIDE_THIS s.pci_conf[0x0e] = 0x00;
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BX_PIDE_THIS s.bmide_addr = 0x0000;
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}
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void
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bx_pci_ide_c::reset(unsigned type)
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{
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BX_PIDE_THIS s.pci_conf[0x04] = 0x01;
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BX_PIDE_THIS s.pci_conf[0x05] = 0x00;
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BX_PIDE_THIS s.pci_conf[0x06] = 0x80;
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BX_PIDE_THIS s.pci_conf[0x07] = 0x02;
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BX_PIDE_THIS s.pci_conf[0x20] = 0x01;
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BX_PIDE_THIS s.pci_conf[0x21] = 0x00;
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if (bx_options.ata[0].Opresent->get ()) {
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BX_PIDE_THIS s.pci_conf[0x40] = 0x00;
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BX_PIDE_THIS s.pci_conf[0x41] = 0x80;
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}
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if (bx_options.ata[1].Opresent->get ()) {
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BX_PIDE_THIS s.pci_conf[0x42] = 0x00;
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BX_PIDE_THIS s.pci_conf[0x43] = 0x80;
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}
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BX_PIDE_THIS s.pci_conf[0x44] = 0x00;
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}
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// static IO port read callback handler
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// redirects to non-static class handler to avoid virtual functions
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Bit32u
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bx_pci_ide_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
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{
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#if !BX_USE_PIDE_SMF
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bx_pci_ide_c *class_ptr = (bx_pci_ide_c *) this_ptr;
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return( class_ptr->read(address, io_len) );
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}
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Bit32u
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bx_pci_ide_c::read(Bit32u address, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_PIDE_SMF
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Bit8u offset;
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offset = address - BX_PIDE_THIS s.bmide_addr;
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BX_INFO(("BM-IDE read register 0x%08x len %d", offset, io_len));
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return BX_PIDE_THIS s.bmide_regs[offset];
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/* switch (address) {
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}
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return(0xffffffff);*/
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}
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// static IO port write callback handler
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// redirects to non-static class handler to avoid virtual functions
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void
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bx_pci_ide_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
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{
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#if !BX_USE_PIDE_SMF
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bx_pci_ide_c *class_ptr = (bx_pci_ide_c *) this_ptr;
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class_ptr->write(address, value, io_len);
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}
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void
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bx_pci_ide_c::write(Bit32u address, Bit32u value, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_PIDE_SMF
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Bit8u offset;
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offset = address - BX_PIDE_THIS s.bmide_addr;
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BX_INFO(("BM-IDE write register 0x%08x len %d", offset, io_len));
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BX_PIDE_THIS s.bmide_regs[offset] = (Bit8u)value;
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/* switch (address) {
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}*/
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}
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// static pci configuration space read callback handler
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// redirects to non-static class handler to avoid virtual functions
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Bit32u
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bx_pci_ide_c::pci_read_handler(void *this_ptr, Bit8u address, unsigned io_len)
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{
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#if !BX_USE_PIDE_SMF
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bx_pci_ide_c *class_ptr = (bx_pci_ide_c *) this_ptr;
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return( class_ptr->pci_read(address, io_len) );
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}
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Bit32u
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bx_pci_ide_c::pci_read(Bit8u address, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_PIDE_SMF
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Bit32u value = 0;
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if (io_len <= 4) {
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for (unsigned i=0; i<io_len; i++) {
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value |= (BX_PIDE_THIS s.pci_conf[address+i] << (i*8));
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}
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BX_DEBUG(("PIIX3 PCI IDE read register 0x%02x value 0x%08x", address, value));
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return value;
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}
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else
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return(0xffffffff);
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}
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// static pci configuration space write callback handler
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// redirects to non-static class handler to avoid virtual functions
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void
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bx_pci_ide_c::pci_write_handler(void *this_ptr, Bit8u address, Bit32u value, unsigned io_len)
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{
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#if !BX_USE_PIDE_SMF
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bx_pci_ide_c *class_ptr = (bx_pci_ide_c *) this_ptr;
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class_ptr->pci_write(address, value, io_len);
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}
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void
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bx_pci_ide_c::pci_write(Bit8u address, Bit32u value, unsigned io_len)
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{
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#else
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UNUSED(this_ptr);
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#endif // !BX_USE_PIDE_SMF
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Bit8u value8, oldval;
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bx_bool bmide_change = 0;
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if (io_len <= 4) {
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for (unsigned i=0; i<io_len; i++) {
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oldval = BX_PIDE_THIS s.pci_conf[address+i];
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value8 = (value >> (i*8)) & 0xFF;
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switch (address+i) {
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case 0x05:
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case 0x06:
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case 0x22:
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case 0x23:
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break;
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case 0x04:
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BX_PIDE_THIS s.pci_conf[address+i] = value8 & 0x05;
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break;
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case 0x20:
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bmide_change = (value8 != oldval);
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BX_PIDE_THIS s.pci_conf[address+i] = (value8 & 0xF0) | 0x01;
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break;
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case 0x21:
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bmide_change = (value8 != oldval);
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default:
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BX_PIDE_THIS s.pci_conf[address+i] = value8;
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BX_DEBUG(("PIIX3 PCI IDE write register 0x%02x value 0x%02x", address,
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value8));
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}
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}
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if (bmide_change) {
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if (BX_PIDE_THIS s.bmide_addr > 0) {
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DEV_unregister_ioread_handler_range(BX_PIDE_THIS_PTR, read_handler,
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BX_PIDE_THIS s.bmide_addr,
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BX_PIDE_THIS s.bmide_addr + 0x0F, 7);
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DEV_unregister_iowrite_handler_range(BX_PIDE_THIS_PTR, write_handler,
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BX_PIDE_THIS s.bmide_addr,
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BX_PIDE_THIS s.bmide_addr + 0x0F, 7);
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}
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BX_PIDE_THIS s.bmide_addr = (BX_PIDE_THIS s.pci_conf[0x20] & 0xFE) |
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(BX_PIDE_THIS s.pci_conf[0x21] << 8);
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BX_INFO(("new BM-IDE address: 0x%04x", BX_PIDE_THIS s.bmide_addr));
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if (BX_PIDE_THIS s.bmide_addr > 0) {
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DEV_register_ioread_handler_range(BX_PIDE_THIS_PTR, read_handler,
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BX_PIDE_THIS s.bmide_addr,
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BX_PIDE_THIS s.bmide_addr + 0x0F,
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"PIIX3 PCI IDE controller", 7);
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DEV_register_iowrite_handler_range(BX_PIDE_THIS_PTR, write_handler,
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BX_PIDE_THIS s.bmide_addr,
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BX_PIDE_THIS s.bmide_addr + 0x0F,
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"PIIX3 PCI IDE controller", 7);
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}
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}
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}
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}
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#endif /* BX_PCI_SUPPORT */
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