9f57e70d5f
Now enable support for up to 128 CPU extensions and could easily extend it more Also reduce memory footprint for bx_ia_opcodes.h arrays
312 lines
9.6 KiB
C++
312 lines
9.6 KiB
C++
/////////////////////////////////////////////////////////////////////////
|
|
// $Id$
|
|
/////////////////////////////////////////////////////////////////////////
|
|
//
|
|
// Copyright (c) 2011-2014 Stanislav Shwartsman
|
|
// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
|
|
//
|
|
// This library is free software; you can redistribute it and/or
|
|
// modify it under the terms of the GNU Lesser General Public
|
|
// License as published by the Free Software Foundation; either
|
|
// version 2 of the License, or (at your option) any later version.
|
|
//
|
|
// This library is distributed in the hope that it will be useful,
|
|
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
// Lesser General Public License for more details.
|
|
//
|
|
// You should have received a copy of the GNU Lesser General Public
|
|
// License along with this library; if not, write to the Free Software
|
|
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
|
|
//
|
|
/////////////////////////////////////////////////////////////////////////
|
|
|
|
#include "bochs.h"
|
|
#include "cpu.h"
|
|
#include "amd_k6_2_chomper.h"
|
|
|
|
#define LOG_THIS cpu->
|
|
|
|
#if BX_CPU_LEVEL >= 5
|
|
|
|
amd_k6_2_chomper_t::amd_k6_2_chomper_t(BX_CPU_C *cpu): bx_cpuid_t(cpu)
|
|
{
|
|
if (BX_CPU_LEVEL < 5)
|
|
BX_PANIC(("AMD K6-2 configuration should be compiled with BX_CPU_LEVEL=5 or higher"));
|
|
|
|
BX_INFO(("WARNING: 3DNow! is not implemented yet !"));
|
|
|
|
static Bit8u supported_extensions[] = {
|
|
BX_ISA_X87,
|
|
BX_ISA_486,
|
|
BX_ISA_PENTIUM,
|
|
BX_ISA_MMX,
|
|
BX_ISA_SYSCALL_SYSRET_LEGACY,
|
|
BX_ISA_3DNOW,
|
|
BX_ISA_DEBUG_EXTENSIONS,
|
|
BX_ISA_VME,
|
|
#if BX_PHY_ADDRESS_LONG
|
|
BX_ISA_PSE36,
|
|
#endif
|
|
BX_ISA_PSE,
|
|
BX_ISA_EXTENSION_LAST
|
|
};
|
|
|
|
register_cpu_extensions(supported_extensions);
|
|
}
|
|
|
|
void amd_k6_2_chomper_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const
|
|
{
|
|
static const char* brand_string = "AMD-K6(tm) 3D processor\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0";
|
|
|
|
switch(function) {
|
|
case 0x8FFFFFFF:
|
|
get_cpuid_hidden_level(leaf);
|
|
return;
|
|
case 0x80000000:
|
|
get_ext_cpuid_leaf_0(leaf);
|
|
return;
|
|
case 0x80000001:
|
|
get_ext_cpuid_leaf_1(leaf);
|
|
return;
|
|
case 0x80000002:
|
|
case 0x80000003:
|
|
case 0x80000004:
|
|
get_ext_cpuid_brand_string_leaf(brand_string, function, leaf);
|
|
return;
|
|
case 0x80000005:
|
|
get_ext_cpuid_leaf_5(leaf);
|
|
return;
|
|
case 0x00000000:
|
|
get_std_cpuid_leaf_0(leaf);
|
|
return;
|
|
case 0x00000001:
|
|
get_std_cpuid_leaf_1(leaf);
|
|
return;
|
|
default:
|
|
get_reserved_leaf(leaf);
|
|
return;
|
|
}
|
|
}
|
|
|
|
// leaf 0x00000000 //
|
|
void amd_k6_2_chomper_t::get_std_cpuid_leaf_0(cpuid_function_t *leaf) const
|
|
{
|
|
static const char* vendor_string = "AuthenticAMD";
|
|
|
|
// EAX: highest std function understood by CPUID
|
|
// EBX: vendor ID string
|
|
// EDX: vendor ID string
|
|
// ECX: vendor ID string
|
|
leaf->eax = 0x1;
|
|
|
|
// CPUID vendor string (e.g. GenuineIntel, AuthenticAMD, CentaurHauls, ...)
|
|
memcpy(&(leaf->ebx), vendor_string, 4);
|
|
memcpy(&(leaf->edx), vendor_string + 4, 4);
|
|
memcpy(&(leaf->ecx), vendor_string + 8, 4);
|
|
#ifdef BX_BIG_ENDIAN
|
|
leaf->ebx = bx_bswap32(leaf->ebx);
|
|
leaf->ecx = bx_bswap32(leaf->ecx);
|
|
leaf->edx = bx_bswap32(leaf->edx);
|
|
#endif
|
|
}
|
|
|
|
// leaf 0x00000001 //
|
|
void amd_k6_2_chomper_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
|
|
{
|
|
// EAX: CPU Version Information
|
|
// [3:0] Stepping ID
|
|
// [7:4] Model: starts at 1
|
|
// [11:8] Family: 4=486, 5=Pentium, 6=PPro, ...
|
|
// [13:12] Type: 0=OEM, 1=overdrive, 2=dual cpu, 3=reserved
|
|
// [19:16] Extended Model
|
|
// [27:20] Extended Family
|
|
leaf->eax = 0x00000580;
|
|
|
|
leaf->ebx = 0;
|
|
leaf->ecx = 0;
|
|
|
|
// EDX: Standard Feature Flags
|
|
// * [0:0] FPU on chip
|
|
// * [1:1] VME: Virtual-8086 Mode enhancements
|
|
// * [2:2] DE: Debug Extensions (I/O breakpoints)
|
|
// * [3:3] PSE: Page Size Extensions
|
|
// * [4:4] TSC: Time Stamp Counter
|
|
// * [5:5] MSR: RDMSR and WRMSR support
|
|
// [6:6] PAE: Physical Address Extensions
|
|
// * [7:7] MCE: Machine Check Exception
|
|
// * [8:8] CXS: CMPXCHG8B instruction
|
|
// [9:9] APIC: APIC on Chip
|
|
// [10:10] Reserved
|
|
// [11:11] SYSENTER/SYSEXIT support
|
|
// [12:12] MTRR: Memory Type Range Reg
|
|
// [13:13] PGE/PTE Global Bit
|
|
// [14:14] MCA: Machine Check Architecture
|
|
// [15:15] CMOV: Cond Mov/Cmp Instructions
|
|
// [16:16] PAT: Page Attribute Table
|
|
// [17:17] PSE-36: Physical Address Extensions
|
|
// [18:18] PSN: Processor Serial Number
|
|
// [19:19] CLFLUSH: CLFLUSH Instruction support
|
|
// [20:20] Reserved
|
|
// [21:21] DS: Debug Store
|
|
// [22:22] ACPI: Thermal Monitor and Software Controlled Clock Facilities
|
|
// * [23:23] MMX Technology
|
|
// [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available)
|
|
// [25:25] SSE: SSE Extensions
|
|
// [26:26] SSE2: SSE2 Extensions
|
|
// [27:27] Self Snoop
|
|
// [28:28] Hyper Threading Technology
|
|
// [29:29] TM: Thermal Monitor
|
|
// [30:30] Reserved
|
|
// [31:31] PBE: Pending Break Enable
|
|
|
|
leaf->edx = BX_CPUID_STD_X87 |
|
|
BX_CPUID_STD_VME |
|
|
BX_CPUID_STD_DEBUG_EXTENSIONS |
|
|
BX_CPUID_STD_PSE |
|
|
BX_CPUID_STD_TSC |
|
|
BX_CPUID_STD_MSR |
|
|
BX_CPUID_STD_MCE |
|
|
BX_CPUID_STD_CMPXCHG8B |
|
|
#if BX_PHY_ADDRESS_LONG
|
|
BX_CPUID_STD_PSE36 |
|
|
#endif
|
|
BX_CPUID_STD_MMX;
|
|
#if BX_SUPPORT_APIC
|
|
// if MSR_APICBASE APIC Global Enable bit has been cleared,
|
|
// the CPUID feature flag for the APIC is set to 0.
|
|
if (cpu->msr.apicbase & 0x800)
|
|
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
|
|
#endif
|
|
}
|
|
|
|
// leaf 0x80000000 //
|
|
void amd_k6_2_chomper_t::get_ext_cpuid_leaf_0(cpuid_function_t *leaf) const
|
|
{
|
|
// EAX: highest extended function understood by CPUID
|
|
// EBX: reserved
|
|
// EDX: reserved
|
|
// ECX: reserved
|
|
leaf->eax = 0x80000005;
|
|
leaf->ebx = 0;
|
|
leaf->ecx = 0;
|
|
leaf->edx = 0;
|
|
}
|
|
|
|
// leaf 0x80000001 //
|
|
void amd_k6_2_chomper_t::get_ext_cpuid_leaf_1(cpuid_function_t *leaf) const
|
|
{
|
|
// EAX: CPU Version Information (same as 0x00000001.EAX)
|
|
leaf->eax = 0x00000680;
|
|
|
|
leaf->ebx = 0;
|
|
leaf->ecx = 0;
|
|
|
|
// EDX:
|
|
// Many of the bits in EDX are the same as FN 0x00000001 [*] for AMD
|
|
// * [0:0] FPU on chip
|
|
// * [1:1] VME: Virtual-8086 Mode enhancements
|
|
// * [2:2] DE: Debug Extensions (I/O breakpoints)
|
|
// * [3:3] PSE: Page Size Extensions
|
|
// * [4:4] TSC: Time Stamp Counter
|
|
// * [5:5] MSR: RDMSR and WRMSR support
|
|
// [6:6] PAE: Physical Address Extensions
|
|
// * [7:7] MCE: Machine Check Exception
|
|
// * [8:8] CXS: CMPXCHG8B instruction
|
|
// * [9:9] APIC: APIC on Chip
|
|
// [10:10] Reserved
|
|
// * [11:11] SYSCALL/SYSRET support
|
|
// [12:12] MTRR: Memory Type Range Reg
|
|
// [13:13] PGE/PTE Global Bit
|
|
// [14:14] MCA: Machine Check Architecture
|
|
// [15:15] CMOV: Cond Mov/Cmp Instructions
|
|
// [16:16] PAT: Page Attribute Table
|
|
// [17:17] PSE-36: Physical Address Extensions
|
|
// [18:18] Reserved
|
|
// [19:19] Reserved
|
|
// [20:20] No-Execute page protection
|
|
// [21:21] Reserved
|
|
// [22:22] MMXExt: AMD Extensions to MMX Technology
|
|
// * [23:23] MMX Technology
|
|
// [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available)
|
|
// [25:25] FFXSR: Fast FXSAVE/FXRSTOR
|
|
// [26:26] 1G paging support
|
|
// [27:27] Support RDTSCP Instruction
|
|
// [28:28] Reserved
|
|
// [29:29] Long Mode
|
|
// [30:30] AMD 3DNow! Extensions
|
|
// * [31:31] AMD 3DNow! Instructions
|
|
|
|
leaf->edx = BX_CPUID_STD_X87 |
|
|
BX_CPUID_STD_VME |
|
|
BX_CPUID_STD_DEBUG_EXTENSIONS |
|
|
BX_CPUID_STD_PSE |
|
|
BX_CPUID_STD_TSC |
|
|
BX_CPUID_STD_MSR |
|
|
BX_CPUID_STD_MCE |
|
|
BX_CPUID_STD_CMPXCHG8B |
|
|
BX_CPUID_STD2_SYSCALL_SYSRET |
|
|
#if BX_PHY_ADDRESS_LONG
|
|
BX_CPUID_STD_PSE36 |
|
|
#endif
|
|
BX_CPUID_STD_MMX |
|
|
BX_CPUID_STD2_3DNOW;
|
|
#if BX_SUPPORT_APIC
|
|
// if MSR_APICBASE APIC Global Enable bit has been cleared,
|
|
// the CPUID feature flag for the APIC is set to 0.
|
|
if (cpu->msr.apicbase & 0x800)
|
|
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
|
|
#endif
|
|
}
|
|
|
|
// leaf 0x80000005 //
|
|
void amd_k6_2_chomper_t::get_ext_cpuid_leaf_5(cpuid_function_t *leaf) const
|
|
{
|
|
// CPUID function 0x800000005 - L1 Cache and TLB Identifiers
|
|
leaf->eax = 0x00000000;
|
|
leaf->ebx = 0x02800140;
|
|
leaf->ecx = 0x20020220;
|
|
leaf->edx = 0x20020220;
|
|
}
|
|
|
|
// leaf 0x8FFFFFFF //
|
|
void amd_k6_2_chomper_t::get_cpuid_hidden_level(cpuid_function_t *leaf) const
|
|
{
|
|
static const char* magic_string = "NexGenerationAMD";
|
|
|
|
memcpy(&(leaf->eax), magic_string , 4);
|
|
memcpy(&(leaf->ebx), magic_string + 4, 4);
|
|
memcpy(&(leaf->ecx), magic_string + 8, 4);
|
|
memcpy(&(leaf->edx), magic_string + 12, 4);
|
|
|
|
#ifdef BX_BIG_ENDIAN
|
|
leaf->eax = bx_bswap32(leaf->eax);
|
|
leaf->ebx = bx_bswap32(leaf->ebx);
|
|
leaf->ecx = bx_bswap32(leaf->ecx);
|
|
leaf->edx = bx_bswap32(leaf->edx);
|
|
#endif
|
|
}
|
|
|
|
void amd_k6_2_chomper_t::dump_cpuid(void) const
|
|
{
|
|
struct cpuid_function_t leaf;
|
|
unsigned n;
|
|
|
|
for (n=0; n<=1; n++) {
|
|
get_cpuid_leaf(n, 0x00000000, &leaf);
|
|
BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, leaf.edx));
|
|
}
|
|
|
|
for (n=0x80000000; n<=0x80000005; n++) {
|
|
get_cpuid_leaf(n, 0x00000000, &leaf);
|
|
BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, leaf.edx));
|
|
}
|
|
|
|
get_cpuid_leaf(0x8fffffff, 0x00000000, &leaf);
|
|
BX_INFO(("CPUID[0x8fffffff]: %08x %08x %08x %08x", leaf.eax, leaf.ebx, leaf.ecx, leaf.edx));
|
|
}
|
|
|
|
bx_cpuid_t *create_amd_k6_2_chomper_cpuid(BX_CPU_C *cpu) { return new amd_k6_2_chomper_t(cpu); }
|
|
|
|
#endif
|