![Stanislav Shwartsman](/assets/img/avatar_default.png)
SMP emulation. New implementation uses dynamic CPU quantum value and takes full advantage of the trace cache. Each emulated processor will execute the whole trace before switching to the next processor. * It is also safe to use large (up to 16 instructions) quantum values for the SMP emulation now and improve performance even further. The same merge also completely fixes SF bug : [3312237] stepN command might be not working properly Handlers chaining speedups are also supported with SMP emulation now.
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