59 lines
2.1 KiB
C
59 lines
2.1 KiB
C
/////////////////////////////////////////////////////////////////////////
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// $Id$
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (c) 2003-2009 Stanislav Shwartsman
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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//
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#ifndef _CONTROL_W_H_
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#define _CONTROL_W_H_
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/* ************ */
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/* Control Word */
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/* ************ */
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#define FPU_CW_Reserved_Bits (0xe0c0) /* reserved bits */
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#define FPU_CW_Inf (0x1000) /* infinity control, legacy */
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#define FPU_CW_RC (0x0C00) /* rounding control */
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#define FPU_CW_PC (0x0300) /* precision control */
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#define FPU_RC_RND (0x0000) /* rounding control */
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#define FPU_RC_DOWN (0x0400)
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#define FPU_RC_UP (0x0800)
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#define FPU_RC_CHOP (0x0C00)
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#define FPU_CW_Precision (0x0020) /* loss of precision mask */
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#define FPU_CW_Underflow (0x0010) /* underflow mask */
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#define FPU_CW_Overflow (0x0008) /* overflow mask */
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#define FPU_CW_Zero_Div (0x0004) /* divide by zero mask */
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#define FPU_CW_Denormal (0x0002) /* denormalized operand mask */
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#define FPU_CW_Invalid (0x0001) /* invalid operation mask */
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#define FPU_CW_Exceptions_Mask (0x003f) /* all masks */
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/* Precision control bits affect only the following:
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ADD, SUB(R), MUL, DIV(R), and SQRT */
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#define FPU_PR_32_BITS (0x000)
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#define FPU_PR_RESERVED_BITS (0x100)
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#define FPU_PR_64_BITS (0x200)
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#define FPU_PR_80_BITS (0x300)
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#endif
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