6723ca9bf4
with accessors. Had to touch a number of files to update the access using the new accessors. Moved rm_addr to the CPU structure, to slim down bxInstruction_c and to prevent future instruction caching from getting sprayed with writes to individual rm_addr fields. There only needs to be one. Though need to deal with instructions which have static non-modrm addresses, but which are using rm_addr since that will change. bxInstruction_c is down to about 40 bytes now. Trying to get down to 24 bytes.
261 lines
5.7 KiB
C++
261 lines
5.7 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: ctrl_xfer8.cc,v 1.10 2002-09-18 05:36:47 kevinlawton Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_X86_64==0
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// Make life a little easier for the 64/32-bit merge.
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#define RCX ECX
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#define RIP EIP
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#endif
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void
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BX_CPU_C::JCXZ_Jb(bxInstruction_c *i)
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{
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if (i->as64L()) {
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if ( RCX == 0 ) {
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RIP += (Bit32s) i->Id();
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BX_INSTR_CNEAR_BRANCH_TAKEN(new_RIP);
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revalidate_prefetch_q();
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
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}
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#endif
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}
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else {
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Bit32u temp_ECX;
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if (i->as32L())
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temp_ECX = ECX;
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else
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temp_ECX = CX;
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if ( temp_ECX == 0 ) {
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Bit32u new_EIP;
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new_EIP = EIP + (Bit32s) i->Id();
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if (i->os32L()==0)
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new_EIP &= 0x0000ffff;
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#if BX_CPU_LEVEL >= 2
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if (protected_mode()) {
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if ( new_EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled ) {
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BX_PANIC(("jcxz_jb: offset outside of CS limits"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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#endif
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EIP = new_EIP;
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BX_INSTR_CNEAR_BRANCH_TAKEN(new_EIP);
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revalidate_prefetch_q();
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
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}
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#endif
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}
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}
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void
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BX_CPU_C::LOOPNE_Jb(bxInstruction_c *i)
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{
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if (i->as64L()) {
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if ( ((--RCX)!=0) && (get_ZF()==0) ) {
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RIP += (Bit32s) i->Id();
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BX_INSTR_CNEAR_BRANCH_TAKEN(RIP);
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revalidate_prefetch_q();
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
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}
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#endif
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}
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else {
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Bit32u count, new_EIP;
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#if BX_CPU_LEVEL >= 3
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if (i->as32L())
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count = ECX;
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else
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#endif /* BX_CPU_LEVEL >= 3 */
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count = CX;
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count--;
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if ( (count!=0) && (get_ZF()==0) ) {
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new_EIP = EIP + (Bit32s) i->Id();
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if (i->os32L()==0)
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new_EIP &= 0x0000ffff;
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if (protected_mode()) {
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if (new_EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled) {
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BX_PANIC(("loopne_jb: offset outside of CS limits"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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EIP = new_EIP;
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BX_INSTR_CNEAR_BRANCH_TAKEN(new_EIP);
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revalidate_prefetch_q();
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
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}
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#endif
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if (i->as32L())
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RCX = ECX - 1; // zero extend
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else
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CX--;
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}
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}
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void
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BX_CPU_C::LOOPE_Jb(bxInstruction_c *i)
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{
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if (i->as64L()) {
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if ( ((--RCX)!=0) && (get_ZF()) ) {
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RIP += (Bit32s) i->Id();
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BX_INSTR_CNEAR_BRANCH_TAKEN(RIP);
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revalidate_prefetch_q();
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
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}
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#endif
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}
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else {
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Bit32u count, new_EIP;
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#if BX_CPU_LEVEL >= 3
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if (i->as32L())
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count = ECX;
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else
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#endif /* BX_CPU_LEVEL >= 3 */
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count = CX;
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count--;
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if ( (count!=0) && get_ZF()) {
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new_EIP = EIP + (Bit32s) i->Id();
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if (i->os32L()==0)
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new_EIP &= 0x0000ffff;
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if (protected_mode()) {
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if (new_EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled) {
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BX_PANIC(("loope_jb: offset outside of CS limits"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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EIP = new_EIP;
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BX_INSTR_CNEAR_BRANCH_TAKEN(new_EIP);
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revalidate_prefetch_q();
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
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}
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#endif
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if (i->as32L())
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RCX = ECX - 1; // zero extend
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else
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CX--;
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}
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}
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void
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BX_CPU_C::LOOP_Jb(bxInstruction_c *i)
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{
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if (i->as64L()) {
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if ( ((--RCX)!=0) ) {
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RIP += (Bit32s) i->Id();
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BX_INSTR_CNEAR_BRANCH_TAKEN(RIP);
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revalidate_prefetch_q();
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
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}
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#endif
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}
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else {
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Bit32u count, new_EIP;
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#if BX_CPU_LEVEL >= 3
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if (i->as32L())
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count = ECX;
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else
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#endif /* BX_CPU_LEVEL >= 3 */
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count = CX;
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count--;
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if (count != 0) {
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new_EIP = EIP + (Bit32s) i->Id();
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if (i->os32L()==0)
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new_EIP &= 0x0000ffff;
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if (protected_mode()) {
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if (new_EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled) {
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BX_PANIC(("loop_jb: offset outside of CS limits"));
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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EIP = new_EIP;
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BX_INSTR_CNEAR_BRANCH_TAKEN(new_EIP);
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revalidate_prefetch_q();
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}
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#if BX_INSTRUMENTATION
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else {
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BX_INSTR_CNEAR_BRANCH_NOT_TAKEN();
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}
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#endif
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if (i->as32L())
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RCX = ECX - 1; // zero extend
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else
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CX--;
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}
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}
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