5e520261db
BRANCH_PLUGINS branch!
Authors:
Bryce Denney
Christophe Bothamy
Kevin Lawton (we grabbed a lot of plugin code from plex86)
Testing help from:
Volker Ruppert
Don Becker (Psyon)
Jeremy Parsons (Br'fin)
The change log is too long to paste in here. To read the change log, do
cvs log patches/patch.final-from-BRANCH_PLUGINS.gz
All the changes and a detailed description are contained in a patch
called patch.final-from-BRANCH_PLUGINS.gz. To look at the complete
patch, do
cvs upd -r1.1 patches/patch.final-from-BRANCH_PLUGINS.gz
Then you will have a local copy of the patch, which you can gunzip and
play with however you want.
Modified Files:
.bochsrc Makefile.in aclocal.m4 bochs.h config.h.in configure
configure.in gdbstub.cc logio.cc main.cc pc_system.cc
pc_system.h state_file.h bios/Makefile.in bios/rombios.c
cpu/Makefile.in cpu/access.cc cpu/apic.cc cpu/arith16.cc
cpu/arith32.cc cpu/arith8.cc cpu/cpu.cc cpu/cpu.h
cpu/ctrl_xfer32.cc cpu/exception.cc cpu/fetchdecode.cc
cpu/fetchdecode64.cc cpu/flag_ctrl.cc cpu/flag_ctrl_pro.cc
cpu/init.cc cpu/io.cc cpu/logical16.cc cpu/logical32.cc
cpu/logical8.cc cpu/paging.cc cpu/proc_ctrl.cc
cpu/protect_ctrl.cc cpu/segment_ctrl_pro.cc cpu/shift16.cc
cpu/shift32.cc cpu/stack64.cc cpu/string.cc cpu/tasking.cc
debug/Makefile.in debug/dbg_main.cc disasm/Makefile.in
doc/docbook/user/user.dbk dynamic/Makefile.in fpu/Makefile.in
gui/Makefile.in gui/amigaos.cc gui/beos.cc gui/carbon.cc
gui/control.cc gui/control.h gui/gui.cc gui/gui.h
gui/keymap.cc gui/keymap.h gui/macintosh.cc gui/nogui.cc
gui/rfb.cc gui/sdl.cc gui/sdlkeys.h gui/siminterface.cc
gui/siminterface.h gui/term.cc gui/win32.cc gui/wx.cc
gui/wxdialog.cc gui/wxdialog.h gui/wxmain.cc gui/wxmain.h
gui/x.cc gui/keymaps/sdl-pc-de.map gui/keymaps/sdl-pc-us.map
gui/keymaps/x11-pc-de.map instrument/example0/instrument.h
instrument/example1/instrument.h
instrument/stubs/instrument.cc instrument/stubs/instrument.h
iodev/Makefile.in iodev/biosdev.cc iodev/biosdev.h
iodev/cdrom.cc iodev/cmos.cc iodev/cmos.h iodev/devices.cc
iodev/dma.cc iodev/dma.h iodev/eth_fbsd.cc iodev/eth_linux.cc
iodev/eth_null.cc iodev/eth_tap.cc iodev/floppy.cc
iodev/floppy.h iodev/guest2host.cc iodev/guest2host.h
iodev/harddrv.cc iodev/harddrv.h iodev/iodebug.cc
iodev/iodebug.h iodev/iodev.h iodev/keyboard.cc
iodev/keyboard.h iodev/ne2k.cc iodev/ne2k.h iodev/parallel.cc
iodev/parallel.h iodev/pci.cc iodev/pci.h iodev/pci2isa.cc
iodev/pci2isa.h iodev/pic.cc iodev/pic.h iodev/pit.cc
iodev/pit.h iodev/pit_wrap.cc iodev/pit_wrap.h iodev/sb16.cc
iodev/sb16.h iodev/scancodes.cc iodev/scancodes.h
iodev/serial.cc iodev/serial.h iodev/slowdown_timer.cc
iodev/slowdown_timer.h iodev/unmapped.cc iodev/unmapped.h
iodev/vga.cc iodev/vga.h memory/Makefile.in memory/memory.cc
memory/memory.h memory/misc_mem.cc misc/bximage.c
misc/niclist.c
Added Files:
README-plugins extplugin.h ltdl.c ltdl.h ltdlconf.h.in
ltmain.sh plugin.cc plugin.h
774 lines
20 KiB
C++
774 lines
20 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: io.cc,v 1.21 2002-10-24 21:05:44 bdenney Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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#if BX_SUPPORT_X86_64==0
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// Make life easier for merging cpu64 and cpu32 code.
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#define RDI EDI
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#define RSI ESI
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#define RAX EAX
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#endif
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#if BX_SUPPORT_X86_64
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#define IsLongMode() (BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64)
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#else
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#define IsLongMode() (0)
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#endif
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void
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BX_CPU_C::INSB_YbDX(bxInstruction_c *i)
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{
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Bit8u value8=0;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR get_VM () || (CPL>BX_CPU_THIS_PTR get_IOPL ()))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 1) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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if (i->as64L()) {
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_byte(BX_SEG_REG_ES, RDI, &value8);
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value8 = BX_INP(DX, 1);
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/* no seg override possible */
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write_virtual_byte(BX_SEG_REG_ES, RDI, &value8);
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if (BX_CPU_THIS_PTR get_DF ()) {
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RDI = RDI - 1;
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}
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else {
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RDI = RDI + 1;
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}
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}
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else if (i->as32L()) {
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_byte(BX_SEG_REG_ES, EDI, &value8);
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value8 = BX_INP(DX, 1);
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/* no seg override possible */
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write_virtual_byte(BX_SEG_REG_ES, EDI, &value8);
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if (BX_CPU_THIS_PTR get_DF ()) {
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RDI = EDI - 1;
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}
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else {
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RDI = EDI + 1;
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}
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}
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else {
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_byte(BX_SEG_REG_ES, DI, &value8);
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value8 = BX_INP(DX, 1);
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/* no seg override possible */
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write_virtual_byte(BX_SEG_REG_ES, DI, &value8);
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if (BX_CPU_THIS_PTR get_DF ()) {
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DI = DI - 1;
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}
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else {
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DI = DI + 1;
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}
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}
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}
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void
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BX_CPU_C::INSW_YvDX(bxInstruction_c *i)
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// input word/doubleword from port to string
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{
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bx_address edi;
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unsigned int incr;
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if (i->as64L()) // This was coded as if (i->as_64) ???
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edi = RDI;
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else if (i->as32L())
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edi = EDI;
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else
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edi = DI;
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if (i->os32L()) {
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Bit32u value32=0;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR get_VM () || (CPL>BX_CPU_THIS_PTR get_IOPL ()))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 4) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_dword(BX_SEG_REG_ES, edi, &value32);
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value32 = BX_INP(DX, 4);
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/* no seg override allowed */
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write_virtual_dword(BX_SEG_REG_ES, edi, &value32);
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incr = 4;
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}
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else {
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Bit16u value16=0;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR get_VM () || (CPL>BX_CPU_THIS_PTR get_IOPL ()))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 2) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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#if BX_SupportRepeatSpeedups
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#if (BX_DEBUGGER == 0)
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#if (defined(__i386__) && __i386__)
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/* If conditions are right, we can transfer IO to physical memory
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* in a batch, rather than one instruction at a time.
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*/
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if (i->repUsedL() && !BX_CPU_THIS_PTR async_event) {
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Bit32u wordCount;
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#if BX_SUPPORT_X86_64
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if (i->as64L())
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wordCount = RCX; // Truncated to 32bits. (we're only doing 1 page)
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else
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#endif
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if (i->as32L())
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wordCount = ECX;
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else
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wordCount = CX;
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if (wordCount) {
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bx_address laddrDst;
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Bit32u paddrDst, wordsFitDst;
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Bit8u *hostAddrDst;
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bx_segment_reg_t *dstSegPtr;
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int pointerDelta;
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dstSegPtr = &BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES];
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// Do segment checks for the 1st word. We do not want to
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// trip an exception beyond this, because the address would
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// be incorrect. After we know how many bytes we will directly
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// transfer, we can do the full segment limit check ourselves
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// without generating an exception.
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write_virtual_checks(dstSegPtr, edi, 2);
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laddrDst = dstSegPtr->cache.u.segment.base + edi;
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if (BX_CPU_THIS_PTR cr0.pg)
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paddrDst = dtranslate_linear(laddrDst, CPL==3, BX_WRITE);
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else
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paddrDst = laddrDst;
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// If we want to write directly into the physical memory array,
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// we need the A20 address.
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paddrDst = A20ADDR(paddrDst);
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hostAddrDst = BX_CPU_THIS_PTR mem->getHostMemAddr(BX_CPU_THIS,
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paddrDst, BX_WRITE);
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// Check that native host access was not vetoed for that page, and
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// that the address is word aligned.
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if ( hostAddrDst && ! (paddrDst & 1) ) {
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// See how many words can fit in the rest of this page.
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if (BX_CPU_THIS_PTR get_DF ()) {
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// Counting downward.
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// Note: 1st word must not cross page boundary.
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if ( (paddrDst & 0xfff) > 0xffe )
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goto noAcceleration;
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wordsFitDst = (2 + (paddrDst & 0xfff)) >> 1;
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pointerDelta = -2;
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}
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else {
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// Counting upward.
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wordsFitDst = (0x1000 - (paddrDst & 0xfff)) >> 1;
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pointerDelta = 2;
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}
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// Restrict word count to the number that will fit in this page.
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if (wordCount > wordsFitDst)
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wordCount = wordsFitDst;
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// If after all the restrictions, there is anything left to do...
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if (wordCount) {
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unsigned j;
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Bit32u dstSegLimit;
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dstSegLimit = dstSegPtr->cache.u.segment.limit_scaled;
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// For 16-bit addressing mode, clamp the segment limits to 16bits
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// so we don't have to worry about computations using si/di
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// rolling over 16-bit boundaries.
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if (!i->as32L()) {
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if (dstSegLimit > 0xffff)
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dstSegLimit = 0xffff;
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}
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// Before we copy memory, we need to make sure that the segments
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// allow the accesses up to the given source and dest offset. If
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// the cache.valid bits have SegAccessWOK and ROK, we know that
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// the cache is valid for those operations, and that the segments
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// are non-expand down (thus we can make a simple limit check).
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if ( !(dstSegPtr->cache.valid & SegAccessWOK) ) {
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goto noAcceleration;
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}
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if ( !IsLongMode() ) {
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// Now make sure transfer will fit within the constraints of the
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// segment boundaries, 0..limit for non expand-down. We know
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// wordCount >= 1 here.
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if (BX_CPU_THIS_PTR get_DF ()) {
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// Counting downward.
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Bit32u minOffset = (wordCount-1) << 1;
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if ( edi < minOffset )
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goto noAcceleration;
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}
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else {
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// Counting upward.
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Bit32u dstMaxOffset = (dstSegLimit - (wordCount<<1)) + 1;
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if ( edi > dstMaxOffset )
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goto noAcceleration;
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}
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}
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for (j=0; j<wordCount; ) {
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Bit16u temp16;
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bx_devices.bulkIOQuantumsTransferred = 0;
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if ( BX_CPU_THIS_PTR get_DF ()==0 ) { // Only do accel for DF=0
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bx_devices.bulkIOHostAddr = (Bit32u) hostAddrDst;
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bx_devices.bulkIOQuantumsRequested = (wordCount - j);
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}
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else
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bx_devices.bulkIOQuantumsRequested = 0;
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temp16 = BX_INP(DX, 2);
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if ( bx_devices.bulkIOQuantumsTransferred ) {
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hostAddrDst = (Bit8u*) bx_devices.bulkIOHostAddr;
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j += bx_devices.bulkIOQuantumsTransferred;
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}
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else {
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* (Bit16u *) hostAddrDst = temp16;
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hostAddrDst += pointerDelta;
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j++;
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}
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// Terminate early if there was an event.
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if ( BX_CPU_THIS_PTR async_event )
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break;
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}
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// Reset for next non-bulk IO.
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bx_devices.bulkIOQuantumsRequested = 0;
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wordCount = j;
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// Decrement eCX. Note, the main loop will decrement 1 also, so
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// decrement by one less than expected, like the case above.
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BX_TICKN(j-1); // Main cpu loop also decrements one more.
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#if BX_SUPPORT_X86_64
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if (i->as64L())
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RCX -= (wordCount-1);
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else
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#endif
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if (i->as32L())
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ECX -= (wordCount-1);
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else
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CX -= (wordCount-1);
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incr = wordCount << 1; // count * 2.
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goto doIncr;
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}
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}
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}
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}
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noAcceleration:
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#endif // __i386__
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#endif // (BX_DEBUGGER == 0)
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#endif // #if BX_SupportRepeatSpeedups
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// Write a zero to memory, to trigger any segment or page
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// faults before reading from IO port.
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write_virtual_word(BX_SEG_REG_ES, edi, &value16);
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value16 = BX_INP(DX, 2);
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/* no seg override allowed */
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write_virtual_word(BX_SEG_REG_ES, edi, &value16);
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incr = 2;
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}
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#if BX_SupportRepeatSpeedups
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#if (BX_DEBUGGER == 0)
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#if (defined(__i386__) && __i386__)
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doIncr:
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#endif
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#endif
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#endif
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if (i->as64L()) {
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if (BX_CPU_THIS_PTR get_DF ())
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RDI = RDI - incr;
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else
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RDI = RDI + incr;
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}
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else
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if (i->as32L()) {
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if (BX_CPU_THIS_PTR get_DF ())
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RDI = EDI - incr;
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else
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RDI = EDI + incr;
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}
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else {
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if (BX_CPU_THIS_PTR get_DF ())
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DI = DI - incr;
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else
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DI = DI + incr;
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}
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}
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void
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BX_CPU_C::OUTSB_DXXb(bxInstruction_c *i)
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{
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unsigned seg;
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Bit8u value8;
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bx_address esi;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR get_VM () || (CPL>BX_CPU_THIS_PTR get_IOPL ()))) {
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if ( !BX_CPU_THIS_PTR allow_io(DX, 1) ) {
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exception(BX_GP_EXCEPTION, 0, 0);
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}
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}
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if (!BX_NULL_SEG_REG(i->seg())) {
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seg = i->seg();
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}
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else {
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seg = BX_SEG_REG_DS;
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}
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if (i->as64L())
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esi = RSI;
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else if (i->as32L())
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esi = ESI;
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else
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esi = SI;
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read_virtual_byte(seg, esi, &value8);
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BX_OUTP(DX, value8, 1);
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if (i->as64L()) {
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if (BX_CPU_THIS_PTR get_DF ())
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RSI -= 1;
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else
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RSI += 1;
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}
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else if (i->as32L()) {
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if (BX_CPU_THIS_PTR get_DF ())
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RSI -= 1;
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else
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RSI += 1;
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}
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else {
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if (BX_CPU_THIS_PTR get_DF ())
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SI -= 1;
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else
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SI += 1;
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}
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}
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void
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BX_CPU_C::OUTSW_DXXv(bxInstruction_c *i)
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// output word/doubleword string to port
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{
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unsigned seg;
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bx_address esi;
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unsigned int incr;
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if (!BX_NULL_SEG_REG(i->seg())) {
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seg = i->seg();
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}
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else {
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seg = BX_SEG_REG_DS;
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}
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if (i->as64L())
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esi = RSI;
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else if (i->as32L())
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esi = ESI;
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else
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esi = SI;
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if (i->os32L()) {
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Bit32u value32;
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if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR get_VM () || (CPL>BX_CPU_THIS_PTR get_IOPL ()))) {
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|
if ( !BX_CPU_THIS_PTR allow_io(DX, 4) ) {
|
|
exception(BX_GP_EXCEPTION, 0, 0);
|
|
}
|
|
}
|
|
|
|
read_virtual_dword(seg, esi, &value32);
|
|
|
|
BX_OUTP(DX, value32, 4);
|
|
incr = 4;
|
|
}
|
|
else {
|
|
Bit16u value16;
|
|
|
|
if (BX_CPU_THIS_PTR cr0.pe && (BX_CPU_THIS_PTR get_VM () || (CPL>BX_CPU_THIS_PTR get_IOPL ()))) {
|
|
if ( !BX_CPU_THIS_PTR allow_io(DX, 2) ) {
|
|
exception(BX_GP_EXCEPTION, 0, 0);
|
|
}
|
|
}
|
|
|
|
#if BX_SupportRepeatSpeedups
|
|
#if (BX_DEBUGGER == 0)
|
|
#if (defined(__i386__) && __i386__)
|
|
/* If conditions are right, we can transfer IO to physical memory
|
|
* in a batch, rather than one instruction at a time.
|
|
*/
|
|
if (i->repUsedL() && !BX_CPU_THIS_PTR async_event) {
|
|
Bit32u wordCount;
|
|
|
|
#if BX_SUPPORT_X86_64
|
|
if (i->as64L())
|
|
wordCount = RCX; // Truncated to 32bits. (we're only doing 1 page)
|
|
else
|
|
#endif
|
|
if (i->as32L())
|
|
wordCount = ECX;
|
|
else
|
|
wordCount = CX;
|
|
|
|
if (wordCount) {
|
|
bx_address laddrSrc;
|
|
Bit32u paddrSrc, wordsFitSrc;
|
|
Bit8u *hostAddrSrc;
|
|
bx_segment_reg_t *srcSegPtr;
|
|
unsigned pointerDelta;
|
|
|
|
srcSegPtr = &BX_CPU_THIS_PTR sregs[seg];
|
|
|
|
// Do segment checks for the 1st word. We do not want to
|
|
// trip an exception beyond this, because the address would
|
|
// be incorrect. After we know how many bytes we will directly
|
|
// transfer, we can do the full segment limit check ourselves
|
|
// without generating an exception.
|
|
read_virtual_checks(srcSegPtr, esi, 2);
|
|
laddrSrc = srcSegPtr->cache.u.segment.base + esi;
|
|
if (BX_CPU_THIS_PTR cr0.pg)
|
|
paddrSrc = dtranslate_linear(laddrSrc, CPL==3, BX_READ);
|
|
else
|
|
paddrSrc = laddrSrc;
|
|
// If we want to write directly into the physical memory array,
|
|
// we need the A20 address.
|
|
paddrSrc = A20ADDR(paddrSrc);
|
|
|
|
hostAddrSrc = BX_CPU_THIS_PTR mem->getHostMemAddr(BX_CPU_THIS,
|
|
paddrSrc, BX_READ);
|
|
|
|
// Check that native host access was not vetoed for that page, and
|
|
// that the address is word aligned.
|
|
if ( hostAddrSrc && ! (paddrSrc & 1) ) {
|
|
// See how many words can fit in the rest of this page.
|
|
if (BX_CPU_THIS_PTR get_DF ()) {
|
|
// Counting downward.
|
|
// Note: 1st word must not cross page boundary.
|
|
if ( (paddrSrc & 0xfff) > 0xffe )
|
|
goto noAcceleration;
|
|
wordsFitSrc = (2 + (paddrSrc & 0xfff)) >> 1;
|
|
pointerDelta = (unsigned) -2;
|
|
}
|
|
else {
|
|
// Counting upward.
|
|
wordsFitSrc = (0x1000 - (paddrSrc & 0xfff)) >> 1;
|
|
pointerDelta = 2;
|
|
}
|
|
|
|
// Restrict word count to the number that will fit in this page.
|
|
if (wordCount > wordsFitSrc)
|
|
wordCount = wordsFitSrc;
|
|
|
|
// If after all the restrictions, there is anything left to do...
|
|
if (wordCount) {
|
|
unsigned j;
|
|
Bit32u srcSegLimit;
|
|
|
|
srcSegLimit = srcSegPtr->cache.u.segment.limit_scaled;
|
|
// For 16-bit addressing mode, clamp the segment limits to 16bits
|
|
// so we don't have to worry about computations using si/di
|
|
// rolling over 16-bit boundaries.
|
|
if (!i->as32L()) {
|
|
if (srcSegLimit > 0xffff)
|
|
srcSegLimit = 0xffff;
|
|
}
|
|
|
|
// Before we copy memory, we need to make sure that the segments
|
|
// allow the accesses up to the given source and dest offset. If
|
|
// the cache.valid bits have SegAccessWOK and ROK, we know that
|
|
// the cache is valid for those operations, and that the segments
|
|
// are non-expand down (thus we can make a simple limit check).
|
|
if ( !(srcSegPtr->cache.valid & SegAccessROK) ) {
|
|
goto noAcceleration;
|
|
}
|
|
if ( !IsLongMode() ) {
|
|
// Now make sure transfer will fit within the constraints of the
|
|
// segment boundaries, 0..limit for non expand-down. We know
|
|
// wordCount >= 1 here.
|
|
if (BX_CPU_THIS_PTR get_DF ()) {
|
|
// Counting downward.
|
|
Bit32u minOffset = (wordCount-1) << 1;
|
|
if ( esi < minOffset )
|
|
goto noAcceleration;
|
|
}
|
|
else {
|
|
// Counting upward.
|
|
Bit32u srcMaxOffset = (srcSegLimit - (wordCount<<1)) + 1;
|
|
if ( esi > srcMaxOffset )
|
|
goto noAcceleration;
|
|
}
|
|
}
|
|
|
|
for (j=0; j<wordCount; ) {
|
|
Bit16u temp16;
|
|
bx_devices.bulkIOQuantumsTransferred = 0;
|
|
if ( BX_CPU_THIS_PTR get_DF ()==0 ) { // Only do accel for DF=0
|
|
bx_devices.bulkIOHostAddr = (Bit32u) hostAddrSrc;
|
|
bx_devices.bulkIOQuantumsRequested = (wordCount - j);
|
|
}
|
|
else
|
|
bx_devices.bulkIOQuantumsRequested = 0;
|
|
temp16 = * (Bit16u *) hostAddrSrc;
|
|
BX_OUTP(DX, temp16, 2);
|
|
if ( bx_devices.bulkIOQuantumsTransferred ) {
|
|
hostAddrSrc = (Bit8u*) bx_devices.bulkIOHostAddr;
|
|
j += bx_devices.bulkIOQuantumsTransferred;
|
|
}
|
|
else {
|
|
hostAddrSrc += pointerDelta;
|
|
j++;
|
|
}
|
|
// Terminate early if there was an event.
|
|
if ( BX_CPU_THIS_PTR async_event )
|
|
break;
|
|
}
|
|
// Reset for next non-bulk IO.
|
|
bx_devices.bulkIOQuantumsRequested = 0;
|
|
wordCount = j;
|
|
// Decrement eCX. Note, the main loop will decrement 1 also, so
|
|
// decrement by one less than expected, like the case above.
|
|
BX_TICKN(j-1); // Main cpu loop also decrements one more.
|
|
#if BX_SUPPORT_X86_64
|
|
if (i->as64L())
|
|
RCX -= (wordCount-1);
|
|
else
|
|
#endif
|
|
if (i->as32L())
|
|
ECX -= (wordCount-1);
|
|
else
|
|
CX -= (wordCount-1);
|
|
incr = wordCount << 1; // count * 2.
|
|
goto doIncr;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
noAcceleration:
|
|
|
|
#endif // __i386__
|
|
#endif // (BX_DEBUGGER == 0)
|
|
#endif // #if BX_SupportRepeatSpeedups
|
|
|
|
read_virtual_word(seg, esi, &value16);
|
|
|
|
BX_OUTP(DX, value16, 2);
|
|
incr = 2;
|
|
}
|
|
|
|
#if BX_SupportRepeatSpeedups
|
|
#if (BX_DEBUGGER == 0)
|
|
#if (defined(__i386__) && __i386__)
|
|
doIncr:
|
|
#endif
|
|
#endif
|
|
#endif
|
|
|
|
if (i->as64L()) {
|
|
if (BX_CPU_THIS_PTR get_DF ())
|
|
RSI = RSI - incr;
|
|
else
|
|
RSI = RSI + incr;
|
|
}
|
|
else if (i->as32L()) {
|
|
if (BX_CPU_THIS_PTR get_DF ())
|
|
RSI = ESI - incr;
|
|
else
|
|
RSI = ESI + incr;
|
|
}
|
|
else {
|
|
if (BX_CPU_THIS_PTR get_DF ())
|
|
SI = SI - incr;
|
|
else
|
|
SI = SI + incr;
|
|
}
|
|
}
|
|
|
|
|
|
void
|
|
BX_CPU_C::IN_ALIb(bxInstruction_c *i)
|
|
{
|
|
Bit8u al, imm8;
|
|
|
|
imm8 = i->Ib();
|
|
|
|
al = BX_CPU_THIS_PTR inp8(imm8);
|
|
|
|
AL = al;
|
|
}
|
|
|
|
void
|
|
BX_CPU_C::IN_eAXIb(bxInstruction_c *i)
|
|
{
|
|
Bit8u imm8;
|
|
|
|
|
|
imm8 = i->Ib();
|
|
|
|
#if BX_CPU_LEVEL > 2
|
|
if (i->os32L()) {
|
|
Bit32u eax;
|
|
|
|
eax = BX_CPU_THIS_PTR inp32(imm8);
|
|
RAX = eax;
|
|
}
|
|
else
|
|
#endif /* BX_CPU_LEVEL > 2 */
|
|
{
|
|
Bit16u ax;
|
|
|
|
ax = BX_CPU_THIS_PTR inp16(imm8);
|
|
AX = ax;
|
|
}
|
|
}
|
|
|
|
void
|
|
BX_CPU_C::OUT_IbAL(bxInstruction_c *i)
|
|
{
|
|
Bit8u al, imm8;
|
|
|
|
imm8 = i->Ib();
|
|
|
|
al = AL;
|
|
|
|
BX_CPU_THIS_PTR outp8(imm8, al);
|
|
}
|
|
|
|
void
|
|
BX_CPU_C::OUT_IbeAX(bxInstruction_c *i)
|
|
{
|
|
Bit8u imm8;
|
|
|
|
imm8 = i->Ib();
|
|
|
|
#if BX_CPU_LEVEL > 2
|
|
if (i->os32L()) {
|
|
BX_CPU_THIS_PTR outp32(imm8, EAX);
|
|
}
|
|
else
|
|
#endif /* BX_CPU_LEVEL > 2 */
|
|
{
|
|
BX_CPU_THIS_PTR outp16(imm8, AX);
|
|
}
|
|
}
|
|
|
|
void
|
|
BX_CPU_C::IN_ALDX(bxInstruction_c *i)
|
|
{
|
|
Bit8u al;
|
|
|
|
al = BX_CPU_THIS_PTR inp8(DX);
|
|
|
|
AL = al;
|
|
}
|
|
|
|
void
|
|
BX_CPU_C::IN_eAXDX(bxInstruction_c *i)
|
|
{
|
|
#if BX_CPU_LEVEL > 2
|
|
if (i->os32L()) {
|
|
Bit32u eax;
|
|
|
|
eax = BX_CPU_THIS_PTR inp32(DX);
|
|
RAX = eax;
|
|
}
|
|
else
|
|
#endif /* BX_CPU_LEVEL > 2 */
|
|
{
|
|
Bit16u ax;
|
|
|
|
ax = BX_CPU_THIS_PTR inp16(DX);
|
|
AX = ax;
|
|
}
|
|
}
|
|
|
|
void
|
|
BX_CPU_C::OUT_DXAL(bxInstruction_c *i)
|
|
{
|
|
Bit16u dx;
|
|
Bit8u al;
|
|
|
|
dx = DX;
|
|
al = AL;
|
|
|
|
BX_CPU_THIS_PTR outp8(dx, al);
|
|
}
|
|
|
|
void
|
|
BX_CPU_C::OUT_DXeAX(bxInstruction_c *i)
|
|
{
|
|
Bit16u dx;
|
|
|
|
dx = DX;
|
|
|
|
#if BX_CPU_LEVEL > 2
|
|
if (i->os32L()) {
|
|
BX_CPU_THIS_PTR outp32(dx, EAX);
|
|
}
|
|
else
|
|
#endif /* BX_CPU_LEVEL > 2 */
|
|
{
|
|
BX_CPU_THIS_PTR outp16(dx, AX);
|
|
}
|
|
}
|