270 lines
6.5 KiB
C++
270 lines
6.5 KiB
C++
/////////////////////////////////////////////////////////////////////////
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// $Id: segment_ctrl.cc,v 1.15 2007-04-09 20:28:15 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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//
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// MandrakeSoft S.A.
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// 43, rue d'Aboukir
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// 75002 Paris - France
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// http://www.linux-mandrake.com/
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// http://www.mandrakesoft.com/
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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//
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/////////////////////////////////////////////////////////////////////////
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#define NEED_CPU_REG_SHORTCUTS 1
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#include "bochs.h"
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#include "cpu.h"
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#define LOG_THIS BX_CPU_THIS_PTR
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void BX_CPU_C::LES_GwMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LES_GwMp: invalid use of LES, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit16u reg_16, es;
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read_virtual_word(i->seg(), RMAddr(i), ®_16);
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read_virtual_word(i->seg(), RMAddr(i) + 2, &es);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], es);
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BX_WRITE_16BIT_REG(i->nnn(), reg_16);
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}
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void BX_CPU_C::LES_GdMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LES_GdMp: invalid use of LES, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit16u es;
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Bit32u reg_32;
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read_virtual_dword(i->seg(), RMAddr(i), ®_32);
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read_virtual_word(i->seg(), RMAddr(i) + 4, &es);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES], es);
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BX_WRITE_32BIT_REGZ(i->nnn(), reg_32);
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}
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void BX_CPU_C::LDS_GwMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LDS_GwMp: invalid use of LDS, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit16u reg_16, ds;
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read_virtual_word(i->seg(), RMAddr(i), ®_16);
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read_virtual_word(i->seg(), RMAddr(i) + 2, &ds);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], ds);
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BX_WRITE_16BIT_REG(i->nnn(), reg_16);
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}
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void BX_CPU_C::LDS_GdMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LDS_GdMp: invalid use of LDS, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit16u ds;
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Bit32u reg_32;
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read_virtual_dword(i->seg(), RMAddr(i), ®_32);
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read_virtual_word(i->seg(), RMAddr(i) + 4, &ds);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS], ds);
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BX_WRITE_32BIT_REGZ(i->nnn(), reg_32);
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}
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void BX_CPU_C::LFS_GwMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LFS_GwMp: invalid use of LFS, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit16u reg_16, fs;
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read_virtual_word(i->seg(), RMAddr(i), ®_16);
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read_virtual_word(i->seg(), RMAddr(i) + 2, &fs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs);
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BX_WRITE_16BIT_REG(i->nnn(), reg_16);
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}
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void BX_CPU_C::LFS_GdMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LFS_GdMp: invalid use of LFS, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit32u reg_32;
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Bit16u fs;
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read_virtual_dword(i->seg(), RMAddr(i), ®_32);
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read_virtual_word(i->seg(), RMAddr(i) + 4, &fs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs);
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BX_WRITE_32BIT_REGZ(i->nnn(), reg_32);
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}
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#if BX_SUPPORT_X86_64
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void BX_CPU_C::LFS_GqMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LFS_GqMp: invalid use of LFS, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit64u reg_64;
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Bit16u fs;
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read_virtual_qword(i->seg(), RMAddr(i), ®_64);
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read_virtual_word(i->seg(), RMAddr(i) + 8, &fs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS], fs);
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BX_WRITE_64BIT_REG(i->nnn(), reg_64);
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}
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#endif
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void BX_CPU_C::LGS_GwMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LGS_GwMp: invalid use of LGS, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit16u reg_16, gs;
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read_virtual_word(i->seg(), RMAddr(i), ®_16);
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read_virtual_word(i->seg(), RMAddr(i) + 2, &gs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs);
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BX_WRITE_16BIT_REG(i->nnn(), reg_16);
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}
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void BX_CPU_C::LGS_GdMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LGS_GdMp: invalid use of LGS, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit32u reg_32;
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Bit16u gs;
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read_virtual_dword(i->seg(), RMAddr(i), ®_32);
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read_virtual_word(i->seg(), RMAddr(i) + 4, &gs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs);
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BX_WRITE_32BIT_REGZ(i->nnn(), reg_32);
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}
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#if BX_SUPPORT_X86_64
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void BX_CPU_C::LGS_GqMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LGS_GqMp: invalid use of LGS, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit64u reg_64;
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Bit16u gs;
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read_virtual_qword(i->seg(), RMAddr(i), ®_64);
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read_virtual_word(i->seg(), RMAddr(i) + 8, &gs);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS], gs);
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BX_WRITE_64BIT_REG(i->nnn(), reg_64);
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}
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#endif
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void BX_CPU_C::LSS_GwMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LSS_GwMp: invalid use of LSS, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit16u reg_16, ss;
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read_virtual_word(i->seg(), RMAddr(i), ®_16);
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read_virtual_word(i->seg(), RMAddr(i) + 2, &ss);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss);
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BX_WRITE_16BIT_REG(i->nnn(), reg_16);
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}
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void BX_CPU_C::LSS_GdMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LSS_GdMp: invalid use of LSS, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit32u reg_32;
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Bit16u ss;
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read_virtual_dword(i->seg(), RMAddr(i), ®_32);
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read_virtual_word(i->seg(), RMAddr(i) + 4, &ss);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss);
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BX_WRITE_32BIT_REGZ(i->nnn(), reg_32);
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}
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#if BX_SUPPORT_X86_64
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void BX_CPU_C::LSS_GqMp(bxInstruction_c *i)
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{
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if (i->modC0()) {
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BX_DEBUG(("LSS_GqMp: invalid use of LSS, must be memory reference!"));
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UndefinedOpcode(i);
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}
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Bit64u reg_64;
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Bit16u ss;
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read_virtual_qword(i->seg(), RMAddr(i), ®_64);
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read_virtual_word(i->seg(), RMAddr(i) + 8, &ss);
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load_seg_reg(&BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS], ss);
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BX_WRITE_64BIT_REG(i->nnn(), reg_64);
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}
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#endif
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