Bochs/bochs/disasm
2007-11-18 21:29:17 +00:00
..
dis_decode.cc According to AMD docs opcodes 0f 19...0f 1f are multibyte NOP 2007-11-17 16:19:14 +00:00
dis_groups.cc Added SSE4A and SSE4_2 to disassembler 2007-09-19 19:38:10 +00:00
dis_tables.h Added SSE4A and SSE4_2 to disassembler 2007-09-19 19:38:10 +00:00
dis_tables.inc According to AMD docs opcodes 0f 19...0f 1f are multibyte NOP 2007-11-17 16:19:14 +00:00
disasm.h Fixed memory bug in disasm code 2007-11-18 21:29:17 +00:00
Makefile.in Merge new disasm module with x96-64 support 2005-12-23 14:15:13 +00:00
opcodes.inc Prepare for 4-arg instructions (will be needed for AMD SSE5) 2007-10-09 20:24:42 +00:00
resolve.cc simplify disasm resolve function 2007-11-14 22:49:51 +00:00
syntax.cc Fixed memory bug in disasm code 2007-11-18 21:29:17 +00:00