f850a6df1f
- put /*comments symbols*/ around any chars after #endif. Other compilers do not get it. - fix cases in which a pointer is cast to a 32-bit int, then back to a pointer. This breaks on a machine with 64-bit pointers. Examples: FPU_sub arg 2 and FPU_div arg 2. The int->ptr->int conversions are now done more safely by macros REGNO2PTR and PTR2INT. - use GCC_ATTRIBUTE macro instead of __attribute__. For compilers that do not support __attribute__, the macro can be defined to be nothing. - in fpu_entry.c, arg1 of FPU_load_int32 is (s32*), but the calls to it cast their data to (u32*). - if compiler does NOT inline functions in poly.h, the "extern inline" setting caused duplicate symbols to be created. Changed them to "static inline" so that the mul_32_32 from different .c files do not conflict. - implemented setcc so that it doesn't use curly brackets inside parens - comment out sigcontext structure definition, which conflicts with non-linux or non-intel operating systems. It's not used by bochs anyway.
474 lines
12 KiB
ArmAsm
474 lines
12 KiB
ArmAsm
.file "reg_u_div.S"
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/*---------------------------------------------------------------------------+
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| reg_u_div.S |
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| |
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| Divide one FPU_REG by another and put the result in a destination FPU_REG.|
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| |
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| Copyright (C) 1992,1993,1995,1997 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
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| E-mail billm@suburbia.net |
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+---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------+
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| Call from C as: |
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| int FPU_u_div(FPU_REG *a, FPU_REG *b, FPU_REG *dest, |
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| unsigned int control_word, char *sign) |
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| |
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| Does not compute the destination exponent, but does adjust it. |
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| |
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| Return value is the tag of the answer, or-ed with FPU_Exception if |
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| one was raised, or -1 on internal error. |
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+---------------------------------------------------------------------------*/
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#include "exception.h"
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#include "fpu_emu.h"
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#include "control_w.h"
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/* #define dSIGL(x) (x) */
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/* #define dSIGH(x) 4(x) */
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#ifndef NON_REENTRANT_FPU
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/*
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Local storage on the stack:
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Result: FPU_accum_3:FPU_accum_2:FPU_accum_1:FPU_accum_0
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Overflow flag: ovfl_flag
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*/
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#define FPU_accum_3 -4(%ebp)
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#define FPU_accum_2 -8(%ebp)
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#define FPU_accum_1 -12(%ebp)
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#define FPU_accum_0 -16(%ebp)
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#define FPU_result_1 -20(%ebp)
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#define FPU_result_2 -24(%ebp)
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#define FPU_ovfl_flag -28(%ebp)
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#else
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.data
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/*
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Local storage in a static area:
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Result: FPU_accum_3:FPU_accum_2:FPU_accum_1:FPU_accum_0
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Overflow flag: ovfl_flag
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*/
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.align 4,0
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FPU_accum_3:
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.long 0
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FPU_accum_2:
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.long 0
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FPU_accum_1:
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.long 0
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FPU_accum_0:
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.long 0
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FPU_result_1:
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.long 0
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FPU_result_2:
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.long 0
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FPU_ovfl_flag:
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.byte 0
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#endif /* NON_REENTRANT_FPU */
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#define REGA PARAM1
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#define REGB PARAM2
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#define DEST PARAM3
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.text
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ENTRY(FPU_u_div)
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pushl %ebp
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movl %esp,%ebp
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#ifndef NON_REENTRANT_FPU
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subl $28,%esp
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#endif /* NON_REENTRANT_FPU */
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pushl %esi
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pushl %edi
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pushl %ebx
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movl REGA,%esi
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movl REGB,%ebx
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movl DEST,%edi
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movw EXP(%esi),%dx
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movw EXP(%ebx),%ax
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.byte 0x0f,0xbf,0xc0 /* movsx %ax,%eax */
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.byte 0x0f,0xbf,0xd2 /* movsx %dx,%edx */
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subl %eax,%edx
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addl EXP_BIAS,%edx
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/* A denormal and a large number can cause an exponent underflow */
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cmpl EXP_WAY_UNDER,%edx
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jg xExp_not_underflow
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/* Set to a really low value allow correct handling */
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movl EXP_WAY_UNDER,%edx
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xExp_not_underflow:
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movw %dx,EXP(%edi)
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#ifdef PARANOID
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/* testl $0x80000000, SIGH(%esi) // Dividend */
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/* je L_bugged */
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testl $0x80000000, SIGH(%ebx) /* Divisor */
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je L_bugged
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#endif /* PARANOID */
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/* Check if the divisor can be treated as having just 32 bits */
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cmpl $0,SIGL(%ebx)
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jnz L_Full_Division /* Can't do a quick divide */
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/* We should be able to zip through the division here */
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movl SIGH(%ebx),%ecx /* The divisor */
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movl SIGH(%esi),%edx /* Dividend */
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movl SIGL(%esi),%eax /* Dividend */
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cmpl %ecx,%edx
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setaeb FPU_ovfl_flag /* Keep a record */
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jb L_no_adjust
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subl %ecx,%edx /* Prevent the overflow */
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L_no_adjust:
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/* Divide the 64 bit number by the 32 bit denominator */
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divl %ecx
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movl %eax,FPU_result_2
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/* Work on the remainder of the first division */
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xorl %eax,%eax
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divl %ecx
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movl %eax,FPU_result_1
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/* Work on the remainder of the 64 bit division */
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xorl %eax,%eax
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divl %ecx
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testb $255,FPU_ovfl_flag /* was the num > denom ? */
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je L_no_overflow
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/* Do the shifting here */
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/* increase the exponent */
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incw EXP(%edi)
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/* shift the mantissa right one bit */
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stc /* To set the ms bit */
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rcrl FPU_result_2
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rcrl FPU_result_1
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rcrl %eax
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L_no_overflow:
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jmp LRound_precision /* Do the rounding as required */
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/*---------------------------------------------------------------------------+
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| Divide: Return arg1/arg2 to arg3. |
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| |
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| This routine does not use the exponents of arg1 and arg2, but does |
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| adjust the exponent of arg3. |
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| |
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| The maximum returned value is (ignoring exponents) |
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| .ffffffff ffffffff |
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| ------------------ = 1.ffffffff fffffffe |
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| .80000000 00000000 |
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| and the minimum is |
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| .80000000 00000000 |
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| ------------------ = .80000000 00000001 (rounded) |
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| .ffffffff ffffffff |
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+---------------------------------------------------------------------------*/
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L_Full_Division:
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/* Save extended dividend in local register */
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movl SIGL(%esi),%eax
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movl %eax,FPU_accum_2
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movl SIGH(%esi),%eax
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movl %eax,FPU_accum_3
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xorl %eax,%eax
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movl %eax,FPU_accum_1 /* zero the extension */
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movl %eax,FPU_accum_0 /* zero the extension */
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movl SIGL(%esi),%eax /* Get the current num */
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movl SIGH(%esi),%edx
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/*----------------------------------------------------------------------*/
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/* Initialization done.
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Do the first 32 bits. */
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movb $0,FPU_ovfl_flag
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cmpl SIGH(%ebx),%edx /* Test for imminent overflow */
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jb LLess_than_1
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ja LGreater_than_1
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cmpl SIGL(%ebx),%eax
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jb LLess_than_1
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LGreater_than_1:
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/* The dividend is greater or equal, would cause overflow */
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setaeb FPU_ovfl_flag /* Keep a record */
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subl SIGL(%ebx),%eax
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sbbl SIGH(%ebx),%edx /* Prevent the overflow */
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movl %eax,FPU_accum_2
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movl %edx,FPU_accum_3
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LLess_than_1:
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/* At this point, we have a dividend < divisor, with a record of
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adjustment in FPU_ovfl_flag */
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/* We will divide by a number which is too large */
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movl SIGH(%ebx),%ecx
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addl $1,%ecx
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jnc LFirst_div_not_1
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/* here we need to divide by 100000000h,
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i.e., no division at all.. */
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mov %edx,%eax
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jmp LFirst_div_done
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LFirst_div_not_1:
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divl %ecx /* Divide the numerator by the augmented
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denom ms dw */
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LFirst_div_done:
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movl %eax,FPU_result_2 /* Put the result in the answer */
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mull SIGH(%ebx) /* mul by the ms dw of the denom */
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subl %eax,FPU_accum_2 /* Subtract from the num local reg */
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sbbl %edx,FPU_accum_3
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movl FPU_result_2,%eax /* Get the result back */
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mull SIGL(%ebx) /* now mul the ls dw of the denom */
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subl %eax,FPU_accum_1 /* Subtract from the num local reg */
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sbbl %edx,FPU_accum_2
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sbbl $0,FPU_accum_3
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je LDo_2nd_32_bits /* Must check for non-zero result here */
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#ifdef PARANOID
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jb L_bugged_1
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#endif /* PARANOID */
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/* need to subtract another once of the denom */
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incl FPU_result_2 /* Correct the answer */
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movl SIGL(%ebx),%eax
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movl SIGH(%ebx),%edx
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subl %eax,FPU_accum_1 /* Subtract from the num local reg */
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sbbl %edx,FPU_accum_2
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#ifdef PARANOID
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sbbl $0,FPU_accum_3
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jne L_bugged_1 /* Must check for non-zero result here */
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#endif /* PARANOID */
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/*----------------------------------------------------------------------*/
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/* Half of the main problem is done, there is just a reduced numerator
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to handle now.
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Work with the second 32 bits, FPU_accum_0 not used from now on */
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LDo_2nd_32_bits:
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movl FPU_accum_2,%edx /* get the reduced num */
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movl FPU_accum_1,%eax
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/* need to check for possible subsequent overflow */
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cmpl SIGH(%ebx),%edx
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jb LDo_2nd_div
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ja LPrevent_2nd_overflow
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cmpl SIGL(%ebx),%eax
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jb LDo_2nd_div
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LPrevent_2nd_overflow:
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/* The numerator is greater or equal, would cause overflow */
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/* prevent overflow */
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subl SIGL(%ebx),%eax
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sbbl SIGH(%ebx),%edx
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movl %edx,FPU_accum_2
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movl %eax,FPU_accum_1
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incl FPU_result_2 /* Reflect the subtraction in the answer */
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#ifdef PARANOID
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je L_bugged_2 /* Can't bump the result to 1.0 */
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#endif /* PARANOID */
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LDo_2nd_div:
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cmpl $0,%ecx /* augmented denom msw */
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jnz LSecond_div_not_1
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/* %ecx == 0, we are dividing by 1.0 */
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mov %edx,%eax
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jmp LSecond_div_done
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LSecond_div_not_1:
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divl %ecx /* Divide the numerator by the denom ms dw */
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LSecond_div_done:
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movl %eax,FPU_result_1 /* Put the result in the answer */
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mull SIGH(%ebx) /* mul by the ms dw of the denom */
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subl %eax,FPU_accum_1 /* Subtract from the num local reg */
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sbbl %edx,FPU_accum_2
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#ifdef PARANOID
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jc L_bugged_2
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#endif /* PARANOID */
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movl FPU_result_1,%eax /* Get the result back */
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mull SIGL(%ebx) /* now mul the ls dw of the denom */
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subl %eax,FPU_accum_0 /* Subtract from the num local reg */
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sbbl %edx,FPU_accum_1 /* Subtract from the num local reg */
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sbbl $0,FPU_accum_2
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#ifdef PARANOID
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jc L_bugged_2
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#endif /* PARANOID */
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jz LDo_3rd_32_bits
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#ifdef PARANOID
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cmpl $1,FPU_accum_2
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jne L_bugged_2
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#endif /* PARANOID */
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/* need to subtract another once of the denom */
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movl SIGL(%ebx),%eax
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movl SIGH(%ebx),%edx
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subl %eax,FPU_accum_0 /* Subtract from the num local reg */
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sbbl %edx,FPU_accum_1
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sbbl $0,FPU_accum_2
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#ifdef PARANOID
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jc L_bugged_2
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jne L_bugged_2
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#endif /* PARANOID */
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addl $1,FPU_result_1 /* Correct the answer */
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adcl $0,FPU_result_2
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#ifdef PARANOID
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jc L_bugged_2 /* Must check for non-zero result here */
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#endif /* PARANOID */
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/*----------------------------------------------------------------------*/
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/* The division is essentially finished here, we just need to perform
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tidying operations.
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Deal with the 3rd 32 bits */
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LDo_3rd_32_bits:
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movl FPU_accum_1,%edx /* get the reduced num */
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movl FPU_accum_0,%eax
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/* need to check for possible subsequent overflow */
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cmpl SIGH(%ebx),%edx /* denom */
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jb LRound_prep
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ja LPrevent_3rd_overflow
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cmpl SIGL(%ebx),%eax /* denom */
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jb LRound_prep
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LPrevent_3rd_overflow:
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/* prevent overflow */
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subl SIGL(%ebx),%eax
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sbbl SIGH(%ebx),%edx
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movl %edx,FPU_accum_1
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movl %eax,FPU_accum_0
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addl $1,FPU_result_1 /* Reflect the subtraction in the answer */
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adcl $0,FPU_result_2
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jne LRound_prep
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jnc LRound_prep
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/* This is a tricky spot, there is an overflow of the answer */
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movb $255,FPU_ovfl_flag /* Overflow -> 1.000 */
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LRound_prep:
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/*
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* Prepare for rounding.
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* To test for rounding, we just need to compare 2*accum with the
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* denom.
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*/
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movl FPU_accum_0,%ecx
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movl FPU_accum_1,%edx
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movl %ecx,%eax
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orl %edx,%eax
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jz LRound_ovfl /* The accumulator contains zero. */
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/* Multiply by 2 */
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clc
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rcll $1,%ecx
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rcll $1,%edx
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jc LRound_large /* No need to compare, denom smaller */
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subl SIGL(%ebx),%ecx
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sbbl SIGH(%ebx),%edx
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jnc LRound_not_small
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movl $0x70000000,%eax /* Denom was larger */
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jmp LRound_ovfl
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LRound_not_small:
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jnz LRound_large
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movl $0x80000000,%eax /* Remainder was exactly 1/2 denom */
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jmp LRound_ovfl
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LRound_large:
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movl $0xff000000,%eax /* Denom was smaller */
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LRound_ovfl:
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/* We are now ready to deal with rounding, but first we must get
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the bits properly aligned */
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testb $255,FPU_ovfl_flag /* was the num > denom ? */
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je LRound_precision
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incw EXP(%edi)
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/* shift the mantissa right one bit */
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stc /* Will set the ms bit */
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rcrl FPU_result_2
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rcrl FPU_result_1
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rcrl %eax
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/* Round the result as required */
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LRound_precision:
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decw EXP(%edi) /* binary point between 1st & 2nd bits */
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movl %eax,%edx
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movl FPU_result_1,%ebx
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movl FPU_result_2,%eax
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jmp fpu_reg_round
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#ifdef PARANOID
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/* The logic is wrong if we got here */
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L_bugged:
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pushl EX_INTERNAL|0x202
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call EXCEPTION
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pop %ebx
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jmp L_exit
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L_bugged_1:
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pushl EX_INTERNAL|0x203
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call EXCEPTION
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pop %ebx
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jmp L_exit
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L_bugged_2:
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pushl EX_INTERNAL|0x204
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call EXCEPTION
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pop %ebx
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jmp L_exit
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L_exit:
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movl $-1,%eax
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popl %ebx
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popl %edi
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popl %esi
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leave
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ret
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#endif /* PARANOID */
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