---------------------------------------------------------------------- Patch name: patch.tsc-zwane Author: Zwane Mwaikambo Date: Sat Dec 14 01:30:22 EST 2002 Detailed description: Revised TSC patch that calls tick at the right time Patch was created with: cvs diff -u Apply patch to what version: cvs checked out on DATE, release version VER Instructions: To patch, go to main bochs directory. Type "patch -p0 < THIS_PATCH_FILE". ---------------------------------------------------------------------- Index: cpu/cpu.h =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/cpu.h,v retrieving revision 1.119 diff -u -r1.119 cpu.h --- cpu/cpu.h 25 Nov 2002 21:58:47 -0000 1.119 +++ cpu/cpu.h 14 Dec 2002 06:21:24 -0000 @@ -1411,7 +1411,8 @@ #endif #if BX_CPU_LEVEL >= 5 - bx_regs_msr_t msr; + bx_regs_msr_t msr; + Bit64u tsc; #endif i387_t the_i387; Index: cpu/proc_ctrl.cc =================================================================== RCS file: /cvsroot/bochs/bochs/cpu/proc_ctrl.cc,v retrieving revision 1.63 diff -u -r1.63 proc_ctrl.cc --- cpu/proc_ctrl.cc 13 Nov 2002 21:00:04 -0000 1.63 +++ cpu/proc_ctrl.cc 14 Dec 2002 06:21:27 -0000 @@ -1682,9 +1682,9 @@ bx_bool cpl = CPL; if ((tsd==0) || (tsd==1 && cpl==0)) { // return ticks - Bit64u ticks = bx_pc_system.time_ticks (); + Bit64u ticks = BX_CPU_THIS_PTR tsc; RAX = (Bit32u) (ticks & 0xffffffff); - RDX = (Bit32u) ((ticks >> 32) & 0xffffffff); + RDX = (Bit32u) ticks >> 32; //BX_INFO(("RDTSC: returning EDX:EAX = %08x:%08x", EDX, EAX)); } else { // not allowed to use RDTSC! @@ -1720,10 +1720,6 @@ /* TODO */ return; - case BX_MSR_TSC: - RDTSC(i); - return; - case BX_MSR_CESR: /* TODO */ return; @@ -1734,10 +1730,6 @@ /* do nothing */ return; - case BX_MSR_TSC: - RDTSC(i); - return; - /* ... And these cause an exception on i686 */ case BX_MSR_CESR: case BX_MSR_CTR0: @@ -1745,6 +1737,10 @@ goto do_exception; #endif /* BX_CPU_LEVEL == 5 */ + case BX_MSR_TSC: + RDTSC(i); + return; + /* MSR_APICBASE 0:7 Reserved 8 This is set if its the BSP @@ -1842,7 +1838,6 @@ /* The following registers are defined for Pentium only */ case BX_MSR_P5_MC_ADDR: case BX_MSR_MC_TYPE: - case BX_MSR_TSC: case BX_MSR_CESR: /* TODO */ return; @@ -1850,7 +1845,6 @@ /* These are noops on i686... */ case BX_MSR_P5_MC_ADDR: case BX_MSR_MC_TYPE: - case BX_MSR_TSC: /* do nothing */ return; @@ -1860,6 +1854,12 @@ case BX_MSR_CTR1: goto do_exception; #endif /* BX_CPU_LEVEL == 5 */ + + case BX_MSR_TSC: + /* we ignore the high 32bits */ + BX_CPU_THIS_PTR tsc = (Bit64u)EAX; + BX_INFO(("WRMSR: wrote %08x:%08x to MSR_TSC\n", 0, EAX)); + return; /* MSR_APICBASE 0:7 Reserved Index: pc_system.h =================================================================== RCS file: /cvsroot/bochs/bochs/pc_system.h,v retrieving revision 1.22 diff -u -r1.22 pc_system.h --- pc_system.h 25 Oct 2002 11:44:33 -0000 1.22 +++ pc_system.h 14 Dec 2002 06:21:28 -0000 @@ -27,7 +27,7 @@ -#define BX_MAX_TIMERS (15+BX_SMP_PROCESSORS) +#define BX_MAX_TIMERS (128+BX_SMP_PROCESSORS) #define BX_NULL_TIMER_HANDLE 10000 @@ -113,6 +113,9 @@ if (--bx_pc_system.currCountdown == 0) { bx_pc_system.countdownEvent(); } + for (int i = 0; i < BX_SMP_PROCESSORS; i++) + BX_CPU(i)->tsc++; + } static BX_CPP_INLINE void tickn(Bit64u n) { #if BX_SHOW_IPS @@ -130,6 +133,9 @@ // 'n' is not (or no longer) >= the countdown size. We can just decrement // the remaining requested ticks and continue. bx_pc_system.currCountdown -= Bit32u(n); + for (int i = 0; i < BX_SMP_PROCESSORS; i++) + BX_CPU(i)->tsc+=n; + } int register_timer_ticks(void* this_ptr, bx_timer_handler_t, Bit64u ticks,