----------------------------------------------------------------------
Patch name: patch.fprem-emulation
Author: Albert Aribaud <albert.aribaud@free.fr>
Date: Fri, 26 Oct 2001 00:35:40 +0200
RCS Id: $Id: patch.fprem-emulation,v 1.1 2001-10-31 19:30:45 bdenney Exp $

Detailed description:
enclosed is a patch tp fpu_trig.c which, I think, fixes the bug
mentioned in the subject. Before I commit the change, I would like
people to test it, especially on little-endian as well as big-endian
machines (I have no binary handy for this).

See source forge bug #452275.

Patch was created with:
  cvs diff -u
Apply patch to what version:
  cvs checked out on DATE, release version VER
Instructions:
  To patch, go to fpu source directory.
  Type "patch < THIS_PATCH_FILE".
----------------------------------------------------------------------
Index: fpu_trig.c
===================================================================
RCS file: /cvsroot/bochs/bochs/fpu/fpu_trig.c,v
retrieving revision 1.4
diff -u -r1.4 fpu_trig.c
--- fpu_trig.c	2001/10/06 03:53:46	1.4
+++ fpu_trig.c	2001/10/25 22:22:07
@@ -854,6 +854,15 @@
    the least significant 64 bits, the more significant bits of the
    result must be zero.
  */
+
+#ifdef BX_BIG_ENDIAN
+#  define rem_kernel_lsw(X) (((u32*)&X)[0])
+#  define rem_kernel_msw(X) (((u32*)&X)[1])
+#else
+#  define rem_kernel_lsw(X) (((u32*)&X)[1])
+#  define rem_kernel_msw(X) (((u32*)&X)[0])
+#endif
+
 static void rem_kernel(u64 st0, u64 *y, u64 st1, u64 q, int n)
 {
   u64 x;
@@ -862,18 +871,18 @@
   u64 work;
 
   x = st0 << n;
-
-  work = (u32)st1;
-  work *= (u32)q;
-  x -= work;
-
-  work = st1 >> 32;
-  work *= (u32)q;
-  x -= work;
 
-  work = (u32)st1;
-  work *= q >> 32;
+  work = rem_kernel_lsw(st1);
+  work *= rem_kernel_lsw(q);
   x -= work;
+      
+  work = rem_kernel_msw(st1);
+  work *= rem_kernel_lsw(q);
+  rem_kernel_msw(x) -= rem_kernel_lsw(work);
+	    
+  work = rem_kernel_lsw(st1);
+  work *= rem_kernel_msw(q);
+  rem_kernel_msw(x) -= rem_kernel_lsw(work);
   
 #else
   int dummy;