///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2004 Stanislav Shwartsman // Written by Stanislav Shwartsman // // This library is free software; you can redistribute it and/or // modify it under the terms of the GNU Lesser General Public // License as published by the Free Software Foundation; either // version 2 of the License, or (at your option) any later version. // // This library is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU // Lesser General Public License for more details. // // You should have received a copy of the GNU Lesser General Public // License along with this library; if not, write to the Free Software // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA // #ifndef _CONTROL_W_H_ #define _CONTROL_W_H_ /* ************ */ /* Control Word */ /* ************ */ #define FPU_CW_RC (0x0C00) /* rounding control */ #define FPU_CW_PC (0x0300) /* precision control */ #define FPU_RC_RND (0x0000) /* rounding control */ #define FPU_RC_DOWN (0x0400) #define FPU_RC_UP (0x0800) #define FPU_RC_CHOP (0x0C00) #define FPU_CW_Precision (0x0020) /* loss of precision mask */ #define FPU_CW_Underflow (0x0010) /* underflow mask */ #define FPU_CW_Overflow (0x0008) /* overflow mask */ #define FPU_CW_Zero_Div (0x0004) /* divide by zero mask */ #define FPU_CW_Denormal (0x0002) /* denormalized operand mask */ #define FPU_CW_Invalid (0x0001) /* invalid operation mask */ #define FPU_CW_Exceptions_Mask (0x003f) /* all masks */ /* Precision control bits affect only the following: ADD, SUB(R), MUL, DIV(R), and SQRT */ #define FPU_PR_32_BITS (0x000) #define FPU_PR_RESERVED_BITS (0x100) #define FPU_PR_64_BITS (0x200) #define FPU_PR_80_BITS (0x300) #endif