///////////////////////////////////////////////////////////////////////// // $Id$ ///////////////////////////////////////////////////////////////////////// // // Copyright (c) 2011 Stanislav Shwartsman // Written by Stanislav Shwartsman [sshwarts at sourceforge net] // // This library is free software; you can redistribute it and/or // modify it under the terms of the GNU Lesser General Public // License as published by the Free Software Foundation; either // version 2 of the License, or (at your option) any later version. // // This library is distributed in the hope that it will be useful, // but WITHOUT ANY WARRANTY; without even the implied warranty of // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU // Lesser General Public License for more details. // // You should have received a copy of the GNU Lesser General Public // License along with this library; if not, write to the Free Software // Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA // ///////////////////////////////////////////////////////////////////////// #include "bochs.h" #include "cpu.h" #include "pentium_mmx.h" #if BX_CPU_LEVEL >= 5 #define LOG_THIS cpu-> pentium_mmx_t::pentium_mmx_t(BX_CPU_C *cpu): bx_cpuid_t(cpu) { if (BX_CPU_LEVEL < 5) BX_PANIC(("Pentium MMX should be compiled with BX_CPU_LEVEL=5 or higher")); } void pentium_mmx_t::get_cpuid_leaf(Bit32u function, Bit32u subfunction, cpuid_function_t *leaf) const { switch(function) { case 0x00000000: get_std_cpuid_leaf_0(leaf); return; case 0x00000001: default: get_std_cpuid_leaf_1(leaf); return; } } Bit64u pentium_mmx_t::get_isa_extensions_bitmask(void) const { return BX_ISA_X87 | BX_ISA_486 | BX_ISA_PENTIUM | BX_ISA_MMX; } Bit32u pentium_mmx_t::get_cpu_extensions_bitmask(void) const { return BX_CPU_DEBUG_EXTENSIONS | BX_CPU_VME | #if BX_PHY_ADDRESS_LONG BX_CPU_PSE36 | #endif BX_CPU_PSE; } // leaf 0x00000000 // void pentium_mmx_t::get_std_cpuid_leaf_0(cpuid_function_t *leaf) const { static const char* vendor_string = "GenuineIntel"; // EAX: highest std function understood by CPUID // EBX: vendor ID string // EDX: vendor ID string // ECX: vendor ID string leaf->eax = 0x1; // CPUID vendor string (e.g. GenuineIntel, AuthenticAMD, CentaurHauls, ...) memcpy(&(leaf->ebx), vendor_string, 4); memcpy(&(leaf->edx), vendor_string + 4, 4); memcpy(&(leaf->ecx), vendor_string + 8, 4); #ifdef BX_BIG_ENDIAN leaf->ebx = bx_bswap32(leaf->ebx); leaf->ecx = bx_bswap32(leaf->ecx); leaf->edx = bx_bswap32(leaf->edx); #endif } // leaf 0x00000001 // void pentium_mmx_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const { // EAX: CPU Version Information // [3:0] Stepping ID // [7:4] Model: starts at 1 // [11:8] Family: 4=486, 5=Pentium, 6=PPro, ... // [13:12] Type: 0=OEM, 1=overdrive, 2=dual cpu, 3=reserved // [19:16] Extended Model // [27:20] Extended Family leaf->eax = 0x00000543; leaf->ebx = 0; leaf->ecx = 0; // EDX: Standard Feature Flags // * [0:0] FPU on chip // * [1:1] VME: Virtual-8086 Mode enhancements // * [2:2] DE: Debug Extensions (I/O breakpoints) // * [3:3] PSE: Page Size Extensions // * [4:4] TSC: Time Stamp Counter // * [5:5] MSR: RDMSR and WRMSR support // [6:6] PAE: Physical Address Extensions // * [7:7] MCE: Machine Check Exception // * [8:8] CXS: CMPXCHG8B instruction // [9:9] APIC: APIC on Chip // [10:10] Reserved // [11:11] SYSENTER/SYSEXIT support // [12:12] MTRR: Memory Type Range Reg // [13:13] PGE/PTE Global Bit // [14:14] MCA: Machine Check Architecture // [15:15] CMOV: Cond Mov/Cmp Instructions // [16:16] PAT: Page Attribute Table // [17:17] PSE-36: Physical Address Extensions // [18:18] PSN: Processor Serial Number // [19:19] CLFLUSH: CLFLUSH Instruction support // [20:20] Reserved // [21:21] DS: Debug Store // [22:22] ACPI: Thermal Monitor and Software Controlled Clock Facilities // * [23:23] MMX Technology // [24:24] FXSR: FXSAVE/FXRSTOR (also indicates CR4.OSFXSR is available) // [25:25] SSE: SSE Extensions // [26:26] SSE2: SSE2 Extensions // [27:27] Self Snoop // [28:28] Hyper Threading Technology // [29:29] TM: Thermal Monitor // [30:30] Reserved // [31:31] PBE: Pending Break Enable leaf->edx = BX_CPUID_STD_X87 | BX_CPUID_STD_VME | BX_CPUID_STD_DEBUG_EXTENSIONS | BX_CPUID_STD_PSE | BX_CPUID_STD_TSC | BX_CPUID_STD_MSR | BX_CPUID_STD_MCE | BX_CPUID_STD_CMPXCHG8B | #if BX_PHY_ADDRESS_LONG BX_CPUID_STD_PSE36 | #endif BX_CPUID_STD_MMX; #if BX_SUPPORT_APIC // if MSR_APICBASE APIC Global Enable bit has been cleared, // the CPUID feature flag for the APIC is set to 0. if (cpu->msr.apicbase & 0x800) leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip #endif } void pentium_mmx_t::dump_cpuid(void) const { struct cpuid_function_t leaf; for (unsigned n=0; n<=0x1; n++) { get_cpuid_leaf(n, 0x00000000, &leaf); BX_INFO(("CPUID[0x%08x]: %08x %08x %08x %08x", n, leaf.eax, leaf.ebx, leaf.ecx, leaf.edx)); } } bx_cpuid_t *create_pentium_mmx_cpuid(BX_CPU_C *cpu) { return new pentium_mmx_t(cpu); } #endif