Stanislav Shwartsman
87103c2437
Support for disasm of MOVBE Intel Atom(R) instruction
2008-08-11 17:55:57 +00:00
Stanislav Shwartsman
7d2df1b104
same optimization in disasam
2008-06-11 21:05:38 +00:00
Stanislav Shwartsman
a85dfc7617
Added disasm for AES instructions
2008-05-25 15:42:26 +00:00
Stanislav Shwartsman
98f1930a80
Fixed compilation issue (patch by Eugene Toder)
2008-04-27 19:47:12 +00:00
Stanislav Shwartsman
64f2489afb
Correctly implement opcode group G11 i.e. instructions C6 and C7 should @UD when modrm nnn field != 0 (1st instr in the group
2008-04-24 21:52:28 +00:00
Stanislav Shwartsman
0609d7e7ce
Handle undocumented FPU opcodes
2008-04-21 14:17:48 +00:00
Stanislav Shwartsman
1a34834db9
Fixed disasm for SSE4.2 instr
2008-04-18 14:09:24 +00:00
Stanislav Shwartsman
a8c273c7bf
Fixed disasm bug in 64-bit mode
2008-04-11 17:54:21 +00:00
Stanislav Shwartsman
671cd93966
Add CPU flags for future use
2008-04-04 12:23:45 +00:00
Stanislav Shwartsman
b3bca89842
Disasm print fixed for AT&T style
2008-03-20 18:11:57 +00:00
Stanislav Shwartsman
5e7218b8c3
Fixed problem introduced by prev checkin
...
+
Fix beak to debugger when executing HLT instruction
2008-02-29 05:39:40 +00:00
Stanislav Shwartsman
405fcfd75d
Reorganize 3-byte opcode tables - bigger tables but easier to maintain them
2008-02-29 03:02:03 +00:00
Stanislav Shwartsman
c70d3e7d76
dos2unix
2008-02-12 22:45:46 +00:00
Stanislav Shwartsman
8615022962
Added first stubs for XSAVE/XRESTOR implementation
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Disassemble XSAVE/XRSTOR instructions (4 instructions)
Update CHANGES - a bit speculatively
2008-02-12 22:41:39 +00:00
Stanislav Shwartsman
eebd96e2d7
another whitespace cleanup by Sebastien
2008-02-05 22:33:35 +00:00
Stanislav Shwartsman
72d72c92d4
Fixed warnings of VC2008
2007-12-30 18:02:22 +00:00
Stanislav Shwartsman
dfb3685c46
Fixed memory bug in disasm code
2007-11-18 21:29:17 +00:00
Stanislav Shwartsman
033150c7e6
According to AMD docs opcodes 0f 19...0f 1f are multibyte NOP
2007-11-17 16:19:14 +00:00
Stanislav Shwartsman
b1984282b2
simplify disasm resolve function
2007-11-14 22:49:51 +00:00
Stanislav Shwartsman
5445de19d1
Decoding : F2 and F2 prefix could override prefix 66 when determine SSE opcode
2007-10-20 10:56:44 +00:00
Stanislav Shwartsman
c0d5b9040c
Prepare for 4-arg instructions (will be needed for AMD SSE5)
2007-10-09 20:24:42 +00:00
Stanislav Shwartsman
de72d9141f
Disasm updates (bugfixes) + disasm of all SSE4_2 instructions
2007-10-01 19:57:46 +00:00
Stanislav Shwartsman
8e0ddbc59b
dos2unix
2007-09-19 19:43:47 +00:00
Stanislav Shwartsman
0dc4badfbb
Added SSE4A and SSE4_2 to disassembler
...
Implemented POPCNT instruction
2007-09-19 19:38:10 +00:00
Stanislav Shwartsman
016660698e
just code cleanup, preparation for future
2007-08-31 18:09:34 +00:00
Stanislav Shwartsman
b64fc08c54
implement prefetch hint opcodes
2007-08-23 16:47:51 +00:00
Stanislav Shwartsman
4555cc9be3
ud2b opcode should have modrm byte
2007-08-18 13:51:16 +00:00
Stanislav Shwartsman
5189cfbf10
SSE4 support
2007-04-19 16:12:21 +00:00
Stanislav Shwartsman
223b9fda0e
Fixed RIP relative mode when in 32-bit address size
2007-04-09 21:15:00 +00:00
Stanislav Shwartsman
8f02078609
PADDQ is SSE2 instruction
2007-04-03 20:44:25 +00:00
Stanislav Shwartsman
2d47748f52
Added instruction set field for opcodes table + few bugfixes
2007-04-02 10:47:48 +00:00
Stanislav Shwartsman
4bb19c2dc3
Fixed deciding and disasm of CALL in 64-bit mode (no 16-bit calls allowed)
2007-03-28 21:20:09 +00:00
Stanislav Shwartsman
4f166369a6
Fixes for VMX disasm
2007-03-23 22:07:49 +00:00
Stanislav Shwartsman
ef542b3790
Learn to decode and disassemble VMX opcodes
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No fetchdecode support but everything is ready
2007-03-23 14:35:50 +00:00
Stanislav Shwartsman
696f4fef0f
Remove incorrect assertion
2007-02-22 17:43:29 +00:00
Stanislav Shwartsman
7d4a5ff1b2
Fixed rep prefix printing in disasm
2007-01-25 21:54:05 +00:00
Stanislav Shwartsman
f8003098b1
Rename SSE4 to SSE3E to match intel docs. SSE4 coming later ;)
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Fixed "last prefix" for REX in 64-bit mode
2007-01-25 19:09:41 +00:00
Stanislav Shwartsman
dd00bc66d0
Fixed disasm in 64bit mode, added new accessor for printing 64bit values
2007-01-13 10:43:31 +00:00
Stanislav Shwartsman
b0d608da33
Fixed disasm bug in x86-64 mode
2007-01-12 21:53:48 +00:00
Stanislav Shwartsman
24ece63fe7
Fixed disasm bug
2006-08-13 09:40:07 +00:00
Stanislav Shwartsman
3ce7764fce
Fixes in 64-bit decoding
2006-08-11 17:23:36 +00:00
Stanislav Shwartsman
f39abc9b65
Fix for bug
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[ 1513544 ] disasm of 0xec (in AL,DX) returns ilen of 2 instead of 1
2006-06-27 19:26:53 +00:00
Stanislav Shwartsman
caee480547
Fixed DR registers disasm
2006-06-26 21:06:26 +00:00
Stanislav Shwartsman
fe644dfcbf
- Code cleanup, remove x86-64 code from functions which cannot be called from x86-64
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- Fix PANIC multiple SSE prefix decoding (fetchdecode and disasm)
- More Bit32u -> bx_phy_address convert
- Lazy flags optimization
2006-05-12 17:04:19 +00:00
Stanislav Shwartsman
4d1a609c8c
BSWAP 16-bit mode not exists, correctly disasm this case
2006-05-07 19:12:56 +00:00
Stanislav Shwartsman
003c2f59e6
Added missed CVS header to several files
2006-04-27 15:11:45 +00:00
Stanislav Shwartsman
c7773adac4
Norhing changed in funtionality, just make the file significantly smaler by removing extra spaces
2006-04-05 20:54:30 +00:00
Stanislav Shwartsman
f8c3968d42
Changes list made after CVS service crash:
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- Fixed critical bug in CPU code added with one of the prev commits
- Disasm support for SSE4
- Rename PNI->SSE3 everywhere in the code
- Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
- Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
- Fixed ENTER and LEAVE instructions in x86-64 mode
- Added ability to turn ON instruction trace, only GUI support is missed.
Instruction trace could be enabled if Bochs was compiled with disasm
- More changes Bit32u -> bx_phy_address
- Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
- Small code cleanup
- Update CHANGES and user docs
2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
bc4ca51055
Fixed disasm of 'enter' instruction in AT&T mode
2006-03-23 17:43:39 +00:00
Stanislav Shwartsman
6b2ab6aa92
Fixed movhps/movlps instructions disasm
2006-02-17 17:13:58 +00:00
Stanislav Shwartsman
2dc81b172a
Fixed several disasm bugs
2006-02-17 13:33:05 +00:00
Stanislav Shwartsman
180667fb4e
Fixed compilation warning
2006-02-13 18:37:21 +00:00
Stanislav Shwartsman
ace3b9916a
Print branch target linear address for all in disasm when possible (i.e. cs.base and eip supplied)
2006-02-11 19:46:03 +00:00
Stanislav Shwartsman
5a65e1065e
Decoding functionality for Bochs disassembler.
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Fixed 'step over' debugger command using bx_dbg_read_linear method.
Small debugger fix in cpu.cc
2006-02-05 19:48:29 +00:00
Stanislav Shwartsman
24d4de03a1
- Fixed bug with missed ES segment override prefix
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- Correctly disassemble x86-64 opcodes
Ia_cvttsd2si_Gq_Wsd
Ia_cvttss2si_Gq_Wss
Ia_cvtsd2si_Gq_Wsd
Ia_cvtss2si_Gq_Wss
Ia_movq_Pq_Eq
Ia_movq_Vdq_Eq
Ia_movq_Eq_Pq
Ia_movq_Eq_Vq
- Correctly disassemble Intel SSE3 opcodes (not supported by Bochs)
Ia_monitor
Ia_mwait
2006-01-31 17:42:31 +00:00
Stanislav Shwartsman
934f552ea3
Fix disassembly
2006-01-30 17:39:17 +00:00
Stanislav Shwartsman
cb58d08c11
Fix MSVC warning
2006-01-28 14:48:40 +00:00
Stanislav Shwartsman
557c15699f
New function - toggle syntax mode
2006-01-24 21:34:39 +00:00
Stanislav Shwartsman
99a1f0838a
FIx opcode table
2006-01-24 18:15:55 +00:00
Stanislav Shwartsman
276c006129
Merge new disasm module with x96-64 support
2005-12-23 14:15:13 +00:00
Stanislav Shwartsman
40d8016e90
Fix disasm for FCOMI instructions
2005-11-17 17:42:15 +00:00
Stanislav Shwartsman
7b7ac565f9
Getting ready for long mode disasm support, patch will posted soon
2005-11-14 18:09:22 +00:00
Stanislav Shwartsman
5af5d80602
Small disasm fixes
2005-10-23 20:43:32 +00:00
Stanislav Shwartsman
d1c722211e
Fix duplicate opcodes, fix opcode names and disasm bugs
2005-09-23 16:45:41 +00:00
Stanislav Shwartsman
6244d43607
Fixed disasm bugs
2005-09-22 21:49:16 +00:00
Stanislav Shwartsman
7a6931159f
Pre-support 64 bit disasm. For noew just cleanup to minimize diff
2005-09-12 16:46:54 +00:00
Stanislav Shwartsman
59f9763f5b
Fix typo
2005-08-21 18:24:45 +00:00
Stanislav Shwartsman
47442d437a
Speedup ICAche decWriteStamp operation. The main idea for this speedup was given by h.johansson.
2005-06-16 20:28:27 +00:00
Stanislav Shwartsman
51b9646407
Merge disasm fixes for PNI instructions (h.johansson)
2005-06-16 16:59:36 +00:00
Stanislav Shwartsman
438ad27ea1
Fixed handling of duplicate 0x66 and 0x67 prefixes in disasm (h.johanson)
2005-06-14 20:05:37 +00:00
Stanislav Shwartsman
7f26baeb94
small optimization in disasm code
2004-12-15 17:15:43 +00:00
Stanislav Shwartsman
757188d93b
Fix disasm error caused by last commit
2004-12-13 22:04:31 +00:00
Stanislav Shwartsman
9306266580
Add missed "duplicated opcode group" to dis_tables.h
2004-12-12 22:17:13 +00:00
Stanislav Shwartsman
f375203fdb
preparations for x86-64 support in disasm
2004-12-12 22:12:43 +00:00
Stanislav Shwartsman
b009c2d1d7
disasm for instructions IRETD, PUSHFD, POPFD, PUSHAD, POPAD
...
cVS: ----------------------------------------------------------------------
2004-12-11 21:28:00 +00:00
Stanislav Shwartsman
8ac3790ab3
Added experimental support of AT&T syntax to disasm
...
Fixed operand for CMPXCHG8B instruction
Feature request to somebidy who understand Bochs debugger code
- to add Bochs debugger command which will switch between
Intel and AT&T style for disassembler.
2004-12-10 14:04:57 +00:00
Stanislav Shwartsman
a0efe5e577
small cleanup disasm code
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implement branch taken/not taken indication for conditional Jcc insructions
2004-12-09 23:19:48 +00:00
Stanislav Shwartsman
139baaebf5
Fix OP_X and OP_Y methods for disasm
2004-12-09 20:01:00 +00:00
Stanislav Shwartsman
b054e3ac36
added missed syntax.cc file for disasm
2004-12-08 18:55:13 +00:00
Stanislav Shwartsman
9d1b401512
Fixed several disassembler bugs
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Prepared for AT&T style support in Bochs disassembler
- it already supports all AT&T style except opcode name suffixes
- AT&T support in future will be possible to enable from bx_debugger
2004-12-08 18:54:15 +00:00
Stanislav Shwartsman
69c0b06955
fixes in disassembler
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split REPEAT instructions according to opsize to speedup execution
now each REPEATABLE instruction splitted to 3 different instructions, one for 16-bit operand size, one for 32-bit and one for 64-bit. Choosing of correct instruction occure in fetchdecode step.
2004-11-20 23:26:32 +00:00
Stanislav Shwartsman
31f5ceb522
everal fixes in disasm
2004-10-22 22:56:59 +00:00
Stanislav Shwartsman
21f43f42fa
Some preparations and cleanups for future x86-64
2004-10-17 22:05:17 +00:00
Stanislav Shwartsman
b37ae8a969
added new option --enable-show-ips to configure -> allow to enable BX_SHOW_IPS through configure script
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fixed print prefixes in disasm -> only LOCK, REP and REPNE prefixes printed
update changes
2004-10-16 21:17:44 +00:00
Stanislav Shwartsman
158ba92f2e
Fixed MOV opcode 0xA3, had wrong operand size (h.johansson) - disasm
2004-07-28 19:02:40 +00:00
Stanislav Shwartsman
35741f5cbd
Fix configure script for Peter Tattam
2004-07-15 19:57:31 +00:00
Stanislav Shwartsman
50aaf8ec6f
Implemented FFREEP 287+ compatability instruction
2004-07-15 19:45:33 +00:00
Stanislav Shwartsman
3274e0dd12
Commit patch
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[ 950905 ] Do not PANIC on rare, bad input from user-mode
by h.johansson
with little changes and fixes
2004-05-10 21:05:51 +00:00
Stanislav Shwartsman
aa934c0bd2
update makefile for support .cpp suffixes for C++ sources
2004-01-24 16:37:15 +00:00
Christophe Bothamy
7061211fbe
- another fix for compiling with vcpp
2004-01-04 18:53:02 +00:00
Christophe Bothamy
f1e558a39d
- updates so bochs compiles when the debugger is enabled
2004-01-04 13:13:45 +00:00
Stanislav Shwartsman
7b35ac3575
Added two missed diassembler table entries
2004-01-02 11:56:59 +00:00
Stanislav Shwartsman
fd60a984a0
Instructions that should not check pending FPU exceptions
2003-12-28 18:58:15 +00:00
Stanislav Shwartsman
0eb71999db
Added missed 287 opcodes which should be executed as NOP in 387+
2003-12-28 18:19:41 +00:00
Stanislav Shwartsman
dacdaadf3d
I forgot to add thos file last time
2003-12-27 09:27:26 +00:00
Stanislav Shwartsman
fc1473cb8c
Update changes
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dos2unix cleanup
2003-12-24 20:44:39 +00:00
Stanislav Shwartsman
ab6b9c7dcb
New table-based disassembler:
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* Fully supports
* MMX/XMM/3DNOW instruction sets
* FPU instruction
* SSE3 extensions
currently only 16/32 bit mode bug anyway, it is much better that old one ;)
2003-12-24 20:32:59 +00:00
Daniel Gimpelevich
fff74a6f83
Fixed incompatibility with gcc3.3, I think.
2003-11-28 15:07:29 +00:00
Alexander Krisak
45df735c30
Apply Vitaly's Vorobyov debugger patch
2003-08-04 16:03:09 +00:00
Stanislav Shwartsman
549eb70324
Committed CPU fixes from Vitaly Vorobyov:
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[x] fixed bug in int01 (opcode 0xF1) emulation
[x] fixed bug in x86 debugger with dr0-dr3 registers
Committed disassembler bugfix from Dirk Thierbach:
[x] fixed bug in relative addresses in Jmp, Jcc, Call and so on
2003-08-03 16:44:53 +00:00