Stanislav Shwartsman
374b6b53b5
Update trace cache patch for new CVS
2007-11-24 14:36:08 +00:00
Stanislav Shwartsman
e51184c8cf
Eliminate saving of RSP from heart of cpu_loop
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Now save RSP only where it is really required
2007-11-24 14:22:34 +00:00
Stanislav Shwartsman
d0052dcd3e
Removed unused setFlags code
2007-11-23 22:49:54 +00:00
Stanislav Shwartsman
34263ac458
Update trace cache patch for current CVS
2007-11-23 16:41:45 +00:00
Stanislav Shwartsman
3daa468c02
Fixed comments in bit.cc
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Revert back lock prefix changes in fetchdecode - not all lockable instructions are splitted yet ;(
2007-11-23 16:37:06 +00:00
Stanislav Shwartsman
e0a3a844ad
Enable alignment check by default for cpu-level >= 4
2007-11-23 12:47:13 +00:00
Stanislav Shwartsman
af9a14ff3b
cleanups
2007-11-22 21:52:55 +00:00
Stanislav Shwartsman
1dbe51a2fb
Split ENTER_IwBw function according to os32. Fixed ENTER/LEAVE in 64-bit mode
2007-11-22 17:33:06 +00:00
Stanislav Shwartsman
e0ee0eaaaf
Diplicate ICACHE size - now index to ICACHE is exactly 16 bit so ICACHE hash function could be computed more efficiently
2007-11-22 17:32:00 +00:00
Stanislav Shwartsman
8f8ae29882
Fix compilation errrr
2007-11-22 17:30:40 +00:00
Stanislav Shwartsman
d6fbb2a74a
Configure fro speed
2007-11-22 06:28:05 +00:00
Stanislav Shwartsman
8e909508c8
a bit faster SETL/SETNL code
2007-11-21 22:42:40 +00:00
Stanislav Shwartsman
0a1063ad77
Split GvEv opcode groups
2007-11-21 22:36:02 +00:00
Stanislav Shwartsman
506dc3d963
Optimize 64-bit fetchdecode prefix handling
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Deparecated set_FLAG() method, setB_FLAG() method was used everywhere
Rename setB_FLAG to set_FLAG, so set_FLAG() will must receive 0/1 inly
2007-11-20 23:00:44 +00:00
Stanislav Shwartsman
48650a70b4
Optimized alignment check
2007-11-20 21:22:03 +00:00
Stanislav Shwartsman
9e5d132793
Fixed typo
2007-11-20 21:21:08 +00:00
Stanislav Shwartsman
d680bd6e62
Update .bochsrc example and CHANGES with new capability
2007-11-20 18:47:07 +00:00
Stanislav Shwartsman
a9ea644c5c
Print timestamps feature for performance measurements
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If enabled (in .bochsrc) + --enable-show-ips=1 Bochs will print IPS + time data every second
2007-11-20 18:36:26 +00:00
Stanislav Shwartsman
1af7010e50
Optimized memory access for 64-bit mode
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Starting convergence to new lazy flags scheme by Darek Mihocka (www.emulators.com). The new flags code is still being validated and perfected but I try to minimize the diff between 2 versionS
2007-11-20 17:15:33 +00:00
Stanislav Shwartsman
2bd8958783
Change force_flags() implementation and make lazy flags a bit more lazy :)
2007-11-19 19:55:09 +00:00
Stanislav Shwartsman
d75a69fd2e
Remove BxResolve tables
2007-11-18 22:14:39 +00:00
Stanislav Shwartsman
fb61418307
optimize modrm/sib decoding
2007-11-18 21:38:58 +00:00
Stanislav Shwartsman
dfb3685c46
Fixed memory bug in disasm code
2007-11-18 21:29:17 +00:00
Stanislav Shwartsman
0732e744bb
again debug print in main.cc :)
2007-11-18 21:09:09 +00:00
Stanislav Shwartsman
30f42d74f1
make sreg index tables static in fetchdecode and remove them from init.cc/cpu.h
2007-11-18 21:07:40 +00:00
Stanislav Shwartsman
1e0db62984
bit.cc speedup (small)
2007-11-18 20:21:34 +00:00
Stanislav Shwartsman
6d65c2701a
Merged Intel Macintosh build patch
2007-11-18 19:53:43 +00:00
Stanislav Shwartsman
bcaba54489
Merge resolve functions for 32 and 64-bit
2007-11-18 19:46:14 +00:00
Stanislav Shwartsman
090dd61a1e
code cleanup in stack16/32.cc
2007-11-18 18:52:44 +00:00
Stanislav Shwartsman
57d2d14865
Split POP_Ev opcodes
2007-11-18 18:49:19 +00:00
Stanislav Shwartsman
e1496bb9e0
Small optimization
2007-11-18 18:40:38 +00:00
Stanislav Shwartsman
b75a1d9ea5
Remove debug print
2007-11-18 18:27:09 +00:00
Stanislav Shwartsman
cdc9a09090
Split more opcodes
2007-11-18 18:24:46 +00:00
Volker Ruppert
570e87733c
- updated after latest changes
2007-11-18 10:21:51 +00:00
Stanislav Shwartsman
83f6eb6945
Changes copyrights for the files I wrote :)
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Also split EqId G1 group for x86-64
2007-11-17 23:28:33 +00:00
Stanislav Shwartsman
613bad34ee
split MOVZX/MOVSX opcodes
2007-11-17 18:29:00 +00:00
Stanislav Shwartsman
5ec15df46d
Split more opcodes EbIb opcodes
2007-11-17 18:08:46 +00:00
Stanislav Shwartsman
d5a58e1df2
Split more opcodes - G3 group
2007-11-17 16:20:37 +00:00
Stanislav Shwartsman
033150c7e6
According to AMD docs opcodes 0f 19...0f 1f are multibyte NOP
2007-11-17 16:19:14 +00:00
Stanislav Shwartsman
d9e58bd598
split11b on opcode tables level - split almost eevery splittable instruction
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will be continued
2007-11-17 12:44:10 +00:00
Stanislav Shwartsman
abe3f4c5c2
Split one more opcode
2007-11-16 21:43:23 +00:00
Stanislav Shwartsman
b4b922809a
Move 3byte opcode decoding under Modrm condition
2007-11-16 20:49:51 +00:00
Stanislav Shwartsman
d4db077e48
Fixed MSVCPP warning/error
2007-11-16 20:33:21 +00:00
Stanislav Shwartsman
565e7f9868
Merge common fetchdecode groups. Add more comments to fetchdecode tables
2007-11-16 18:34:14 +00:00
Stanislav Shwartsman
393018cdf8
More split11b
2007-11-16 17:45:58 +00:00
Stanislav Shwartsman
351244d1ea
Rename splitmod11b methods
2007-11-16 08:30:22 +00:00
Stanislav Shwartsman
db02731cbf
Replace BxAnother attribute in fetchdecode by table lookup like it is done in disasm. This is done in preparation to feature huge fetchdecode change - all fethdecode tables will be duplicated and made separatate table for ModC0 and others.
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So ALL instructions will emjoy SplitMod11b automatically (if they want).
After splitting ALL instruction I hope to get 20% speedup at least.
2007-11-15 17:57:56 +00:00
Stanislav Shwartsman
9da22f9b65
Remove redundant BxAnother attr from prefixes
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The meaning of BxAnother attr - instryction has modrm byte
2007-11-14 22:52:16 +00:00
Stanislav Shwartsman
b1984282b2
simplify disasm resolve function
2007-11-14 22:49:51 +00:00
Stanislav Shwartsman
dc5c25133f
Fixes in registers read/write -> fixed zero upper of register in POP_Ed
2007-11-13 21:07:08 +00:00
