Stanislav Shwartsman
83f6eb6945
Changes copyrights for the files I wrote :)
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Also split EqId G1 group for x86-64
2007-11-17 23:28:33 +00:00
Stanislav Shwartsman
58a2595bca
Misaligned SSE support
2007-07-15 19:03:39 +00:00
Stanislav Shwartsman
5189cfbf10
SSE4 support
2007-04-19 16:12:21 +00:00
Stanislav Shwartsman
26f08fdb2c
Change my e-mail to #SF one
2007-03-23 21:27:13 +00:00
Stanislav Shwartsman
a010cfb8ca
Fix amount of XMM registers in non-x86-64 mode
2006-05-22 21:17:27 +00:00
Volker Ruppert
5e75dc3a10
- some more warnings in MSVC fixed
2005-06-06 20:14:50 +00:00
Stanislav Shwartsman
d10731f162
Update my e-mail in source files
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Update committed SF patches in changes
2005-05-12 18:07:48 +00:00
Stanislav Shwartsman
3074078297
Added CVS version header to all the files.
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One more small change in APIC
2005-03-19 20:44:01 +00:00
Stanislav Shwartsman
33b50ec4c4
For spammers o
2004-04-08 17:17:47 +00:00
Stanislav Shwartsman
cc7b85ae7e
just update release dates
2004-02-13 21:27:45 +00:00
Stanislav Shwartsman
b17671f5ef
Fixed compilation error
2003-11-19 20:57:13 +00:00
Stanislav Shwartsman
a6c1bdbbb2
Optimization of RCPSS/RCPPS functions
2003-11-19 20:27:58 +00:00
Stanislav Shwartsman
ac20b6405a
- FXSAVE/FXRSTOR instructions should be available in P6 mode
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- Added second UD2 opcode to fetchdecode
- Added RDPMC instruction to fetchdecode
- 'changes' updated
2003-10-24 18:34:16 +00:00
Stanislav Shwartsman
04ebd29f92
dos2unix fix
2003-05-19 15:02:47 +00:00
Stanislav Shwartsman
1d45167e5b
Merged NEW-INSTRUCTIONS branch
2003-05-15 16:41:17 +00:00
Christophe Bothamy
50efc3b8c7
- apply Conn Clark's patch.perf-regparm-cclark :
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- it works only on x86 with gcc2.95+
- uses the GCC function atribute "regparm(n)" to declare that certain
functions use the register calling convention
- performance improvement is about 6%
2003-03-02 23:59:12 +00:00
Stanislav Shwartsman
5222261080
Save/Restore FPU TOP-OF-STACK in FXSAVE/FXRSTOR instructions
2003-01-23 18:33:35 +00:00
Christophe Bothamy
ff89875ffd
- remove unused (seems to be) typedef
2002-12-12 13:26:29 +00:00
Stanislav Shwartsman
a4806d3fce
Fixed the MXCSR mask value
2002-11-22 21:42:46 +00:00
Stanislav Shwartsman
b200ff2058
Implemented several integer SSE2 instructions (similar to the MMX):
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PACKSSWB_VdqWq
PCMPGTB_VdqWq
PCMPGTW_VdqWq
PCMPGTD_VdqWdq
PACKUSWB_VdqWdq
PCMPEQB_VdqWdq
PCMPEQW_VdqWdq
PCMPEQD_VdqWdq
PADDQ_VdqWdq
PSUBUSB_VdqWdq
PSUBUSW_VdqWdq
PAND_VdqWdq
PANDN_VdqWdq
PAVGB_VdqWdq
PAVGW_VdqWdq
POR_VdqWdq
PXOR_VdqWdq
PSUBB_VdqWdq
PSUBW_VdqWdq
PSUBD_VdqWdq
PSUBQ_VdqWdq
PADDB_VdqWdq
PADDW_VdqWdq
PADDD_VdqWdq
PADDQ_VdqWdq
2002-11-07 22:41:34 +00:00
Stanislav Shwartsman
0e60aa8232
We will need integer saturation functions also in SSE2 instructions
2002-11-02 12:35:33 +00:00
Stanislav Shwartsman
22d292d83f
Detalized XMM register definition for BIG/LITTLE endian systems
2002-11-02 12:09:27 +00:00
Stanislav Shwartsman
194952a53d
Merged BOCHS-SSE branch
2002-10-16 17:37:35 +00:00
