Stanislav Shwartsman
773f1b7e42
cleanup return value of all instruction handlers
2018-02-16 07:57:32 +00:00
Stanislav Shwartsman
8261a91ce9
implemented GFNI instructions
2017-10-21 19:57:12 +00:00
Stanislav Shwartsman
0afbb6cd3d
fixed compilation when AVX is not configured in
2017-10-20 12:27:42 +00:00
Stanislav Shwartsman
ba1e5bbffa
fixed accidentially broken XMM versions of AES instrructions
2017-10-19 20:25:05 +00:00
Stanislav Shwartsman
15ba88c195
implemented VAES/VPCLMULDQ instructions - VEX/EVEX extensions of AES/PCLMULQDQ
2017-10-19 19:12:55 +00:00
Stanislav Shwartsman
4179e6f939
add some const
2017-10-14 18:42:12 +00:00
Stanislav Shwartsman
6d9b16e0f7
Implemented VCMPPS/PD/SS/SD AVX512 instructions
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Implemented AVX512 shift/rotate instructions
2013-12-03 15:44:23 +00:00
Stanislav Shwartsman
cc694377b9
Standartization of Bochs instruction handlers.
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Bochs instruction emulation handlers won't refer to direct fields of instructions like MODRM.NNN or MODRM.RM anymore.
Use generic source/destination indications like SRC1, SRC2 and DST.
All handlers are modified to support new notation. In addition fetchDecode module was modified to assign sources to instructions properly.
Immediate benefits:
- Removal of several duplicated handlers (FMA3 duplicated with FMA4 is a trivial example)
- Simpler to understand fetch-decode code
Future benefits:
- Integration of disassembler into Bochs CPU module, ability to disasm bx_instruction_c instance (planned)
Huge patch. Almost all source files wre modified.
2012-08-05 13:52:40 +00:00
Stanislav Shwartsman
002c86660a
reword all the CPU code in preparation for future CPU speedup implementation.
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Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
2f582db722
compile less stuff for cpu-level=5
2011-06-26 19:15:30 +00:00
Volker Ruppert
c78026a9a2
- deleted executable properties from source files
2011-04-03 10:29:19 +00:00
Stanislav Shwartsman
7ced718040
implemented AVX instructions support
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many changes - some cleanup will follow
please report ay found bugs !
2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
7d80a6ebe0
Adding Id and Rev property to all files
2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
c005444d5b
split more SSE opcodes
2010-12-25 07:59:15 +00:00
Stanislav Shwartsman
43600f3756
complete rework of SSE code
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next step - split all SSE opcodes by ModC0
2010-12-22 21:16:02 +00:00
Stanislav Shwartsman
b4cd188f07
Update (c)
2010-04-04 19:56:55 +00:00
Stanislav Shwartsman
927c3594d6
enable compilation with CPU_LEVEL <= 6
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converted SEP to runtime option as well
2010-02-26 11:44:50 +00:00
Stanislav Shwartsman
033a20b3b2
allow to configure CPU features at runtime - implemened on example of SSE/AES/MOVBE/POPCNT
2010-02-25 22:04:31 +00:00
Stanislav Shwartsman
30c9eef6f9
small optimization
2009-12-21 13:38:06 +00:00
Stanislav Shwartsman
c403090327
! Implemented PCLMULQDQ AES instruction
2009-12-20 09:00:40 +00:00
Stanislav Shwartsman
7254ea36a1
copyright fixes + small optimization
2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
9929e6ed78
- updated FSF address
2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
8adcf06f27
Fixed bug
2008-09-25 19:19:40 +00:00
Stanislav Shwartsman
5dd02b26e3
Make even more efficient RmAddr calculation - good optimizing compiler could make more efficient code than it was before
2008-08-08 09:22:49 +00:00
Stanislav Shwartsman
709d74728d
Call #UD exception directly instead of UndefinedOpcode function - for future use
2008-07-13 15:35:10 +00:00
Stanislav Shwartsman
3bfcdb154c
Added new file
2008-05-30 20:37:52 +00:00
