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2867 Commits

Author SHA1 Message Date
Stanislav Shwartsman
5d61c19b0b evex support - step2 2013-08-27 20:47:24 +00:00
Stanislav Shwartsman
5fe5bf1ed6 fixed alias typo corrupting avx opcodes 2013-08-27 19:45:31 +00:00
Stanislav Shwartsman
c5f72033ad correct vzeroupper opcode 2013-08-27 06:57:48 +00:00
Stanislav Shwartsman
735154a755 oops, typo bug in prev commit 2013-08-24 19:46:04 +00:00
Stanislav Shwartsman
65e6760915 small decode optimization 2013-08-24 19:29:43 +00:00
Stanislav Shwartsman
748a0da712 one more step in the way towards avx-512 which have more vector registers 2013-08-24 12:12:10 +00:00
Stanislav Shwartsman
701d88388e fixed FCS/FDS deprecation 2013-08-22 20:21:36 +00:00
Stanislav Shwartsman
3a7e336cb6 more opcode alias - now VEX.W alias 2013-08-21 18:45:36 +00:00
Stanislav Shwartsman
115ec37a4c make decoder tables smaller using decode aliases 2013-08-21 04:52:49 +00:00
Stanislav Shwartsman
33a7063e60 bug fixes 2013-08-05 15:33:41 +00:00
Stanislav Shwartsman
362b99eba0 fixed typo in last commit 2013-08-04 19:47:19 +00:00
Stanislav Shwartsman
3fabcb00b7 VMX: CMPXHG instructions should always write to the memory destination, even if the value unchanged - it affects VMEXIT conditions for the full apic virtualization 
Fixed also CMPXHG16B instruction (last one, others were fixed earlier)
 2013-08-04 19:37:04 +00:00
Stanislav Shwartsman
7005afd3a8 clean up BxRepeatable attribute - not needed anymore after VL AVX field moved to new location 2013-07-26 15:42:49 +00:00
Stanislav Shwartsman
2dbe81db51 first infrastructure changes to support EVEX prefix and AVX-512 extensions recently published by Intel 2013-07-26 12:50:56 +00:00
Stanislav Shwartsman
0da1d659d3 CMPXHG should always write to memory dest - affects APIC virtualization VMEXIT conditions 2013-07-24 21:06:24 +00:00
Stanislav Shwartsman
54d3dc4353 properly added sha.cc to the tree 2013-07-24 18:56:37 +00:00
Stanislav Shwartsman
2357dc5ccc Fixed number of invocations of the BX_INSTR_LIN_ACCESS instrumentation callback in cpu/access32.cc, cpu/access64.cc and cpu/paging.cc specify the BX_READ memory access type where BX_RW really applies. 
SF Patch #1335 by Mateusz Jurczyk
 2013-07-24 18:54:18 +00:00
Stanislav Shwartsman
4c7031962e added new sha.cc file 2013-07-24 18:47:28 +00:00
Stanislav Shwartsman
852b5c3749 implemented SHA new instructions announced in recent Intel SDM extensions document rev015 2013-07-24 18:44:22 +00:00
Stanislav Shwartsman
fd71b03353 add some definitions introduced in recent Intel SDM extensions document (rev015) 2013-07-23 20:51:52 +00:00
Stanislav Shwartsman
4a36fb3edc fixed debug print message for BOUND instruction 2013-07-22 18:52:15 +00:00
Stanislav Shwartsman
148cb1aee0 Thanks to avanced trace linking 256K entries ICache is not needed anymore. 
Reduce to 64K entries and save memory.
 2013-06-29 10:25:56 +00:00
Stanislav Shwartsman
ef0d2142ab Allow cross-page trace linking again. 
The SMC problem was solved in following manner:

 - Every trace linked to another remembers when it was linked (a special timestamp value called traceLinkTimeStamp)
 - When true SMC happens it incremements the traceLinkTimeStamp
 - Jump to the linked trace won't be allowed if traceLinkTimeStamp in the link doesn't match traceLinkTimeStamp

So SMC effectively breaks all trace links and therefore I should not care for them anymore

5%-10% speedup on OS boot benchamarks observed
 2013-06-29 10:16:28 +00:00
Stanislav Shwartsman
0276bdfb3e still not allow cross page linking until SMC issue will be solved - cause Win98 crash 2013-06-28 07:51:42 +00:00
Stanislav Shwartsman
c42afb0a2d allow linking of traces cross 4K page boundary 2013-06-23 21:12:03 +00:00
Stanislav Shwartsman
91b3417e57 small bugfix 2013-06-23 15:45:25 +00:00
Stanislav Shwartsman
d30d1ac93a small bugfix 2013-06-21 14:12:46 +00:00
Stanislav Shwartsman
c7698a5589 implemented fcs/fds deprecation. added haswell to cpudb.h as well 2013-06-20 20:12:53 +00:00
Stanislav Shwartsman
b335f472bd Added Haswell configuration to CPUDB 2013-06-20 19:33:30 +00:00
Stanislav Shwartsman
769d35b06c remove debug print from Sandy Bridge CPUID wrongly commited 2013-06-15 17:57:03 +00:00
Stanislav Shwartsman
edc3003f35 do not use cpuid:level param when it doesn't exists 2013-06-15 17:53:49 +00:00
Stanislav Shwartsman
9651b5d53c bugfix: vmx preemption timer vmexit should not wakeup CPU from sleep state. cpuid: added definitions from recently published intel SDM rev047 2013-06-04 20:28:27 +00:00
Stanislav Shwartsman
b950de7155 add more vmx capabilities to generic cpu 2013-05-20 18:18:52 +00:00
Stanislav Shwartsman
964583a40f Added X2APIC support to Ivy Bridge configuration 2013-05-20 18:15:35 +00:00
Stanislav Shwartsman
2bca9b8273 updates in CPUID defines after new published AMD SDM 2013-05-17 19:41:57 +00:00
Stanislav Shwartsman
1304b3fb4b Do not report Architectural Performance Monitoring in CPUID 
Reporting true capabilities breaks Win7 x64 installation
 2013-05-07 15:34:58 +00:00
Stanislav Shwartsman
694dc8a0e1 fixed generic cpuid leafs - all std leafs > 2 were corrupted 2013-05-06 20:33:27 +00:00
Stanislav Shwartsman
b2b42dd714 small fix for LOAD_SS interrupts inhibit 2013-05-04 19:10:50 +00:00
Stanislav Shwartsman
139ec7d538 PANIC on options which require P6 when CPU_LEVEL is set to 5 instead of ignoring them 2013-04-17 20:24:12 +00:00
Stanislav Shwartsman
3fbdf7ff03 do not recognize MTRR MSRs when mtrr is not enabled 2013-04-17 19:59:56 +00:00
Stanislav Shwartsman
9b958b3a05 allow to select CPU level = 5 from .bochsrc even when Bochs is compiled with CPU_LEVEL=6 2013-04-17 19:46:11 +00:00
Stanislav Shwartsman
025fb15461 properly handle RDMSR/WRMSR of MSR_PAT when PAT feature is disabled 2013-04-11 19:41:54 +00:00
Stanislav Shwartsman
f1c7d163a1 activity state is ignored when vmenter injecting event 2013-04-09 20:36:02 +00:00
Stanislav Shwartsman
a277d60d89 implemented vmentering to non-active cpu state 2013-04-09 15:43:15 +00:00
Stanislav Shwartsman
6a8357105b fix for guest segment AR field size 2013-04-08 17:29:00 +00:00
Stanislav Shwartsman
13a6524acb hw task switch tempdr6 hanlding fix 2013-03-15 08:26:22 +00:00
Stanislav Shwartsman
913e3defd1 fixed SIPI delivery bug from one the latest checkins 2013-03-13 19:06:55 +00:00
Stanislav Shwartsman
53d14c01b5 correctly signal bit 12 (nmi unblocking by iret) in vmx interruption info. todo: find how to implement it clean way 2013-03-06 21:11:23 +00:00
Stanislav Shwartsman
1a770dd260 implementation of virtual NMI 2013-03-05 21:12:43 +00:00
Stanislav Shwartsman
39ae66b5a3 Suppress 'entering paged real mode' CR0 check for SVM guest 
After a lot of thinking and browsing in the SVM arch forums I assume now that it shold be fine to enter to paged real mode under SVM guest.
The test case to consider:

  (paged) real mode guest -> entering Pmode (not paged) -> disabling the Pmode back

Ths assumption still should be validated with real AMD hardware

Context: AMD's manual about CR0 intercept priority :
	"Checks non-memory exceptions (CPL, illegal bit combinations, etc.) before the intercept"

The check for 'paged real mode' suposed to be illegal bit combination ...
 2013-02-27 19:11:28 +00:00
Stanislav Shwartsman
ab63b22a68 SVM: implemented missed RSM, LDTR READ/WRITE, TR READ/WRITE and IRET intercepts 2013-02-25 19:36:41 +00:00
Stanislav Shwartsman
8708d05bea rename some VMX controls to match intel docs. added missed VMX consistency check 2013-02-24 20:22:22 +00:00
Volker Ruppert
058c0e05fb - removed wx debugger dialogs (enhanced gui debugger now almost stable with wx) 2013-02-16 12:22:13 +00:00
Stanislav Shwartsman
e43ac349a6 fixed injected exception err code check for unrestricted guests 2013-02-14 19:31:42 +00:00
Stanislav Shwartsman
40669115e1 use different formatter for printing phy address in paging dbg messages 2013-02-14 19:30:59 +00:00
Volker Ruppert
97de484efb use enhanced gui debugger instead of classic wx debugger if BX_DEBUGGER_GUI == 1 
The Windows version looks almost stable, but the GTK version fails in some cases.
That's why the classic wx debugger is still available if BX_DEBUGGER_GUI is set to 0.
- added function close_debug_dialog() to handle the simulation stop case in wx
- disable all the wx debugger related code if BX_DEBUGGER_GUI is set to 1
- added enhanced debugger specific init code similar to the code in sdl.cc
- include debugger related resources on Windows
- TODO: make the GTK / wxGTK case stable and remove the wx debugger
 2013-02-12 21:08:35 +00:00
Stanislav Shwartsman
ec971d0ce8 add #VE exception specific VMCS fields into VMCS bitmap 2013-01-28 20:20:54 +00:00
Stanislav Shwartsman
863e1a0f8a fixed compilation with debugger enabled 2013-01-28 18:26:56 +00:00
Stanislav Shwartsman
64df073617 implemented virtualization exception feature 2013-01-28 16:30:25 +00:00
Stanislav Shwartsman
d38fce8218 preparation for future extension in translate_linear - I would like to return data to caller through tlbEntry 2013-01-27 19:27:30 +00:00
Stanislav Shwartsman
016e112ac2 fixed compilation err with vmx=1 2013-01-23 19:04:53 +00:00
Stanislav Shwartsman
a0c9522fef fix compilation with no vmx enabled 2013-01-22 19:06:20 +00:00
Stanislav Shwartsman
8865df606a fixed typo bug in VMX code 2013-01-22 08:39:41 +00:00
Stanislav Shwartsman
608775cd5a vmread/vmwrite should always check for CPL, also when in vmx guest 2013-01-21 20:20:14 +00:00
Stanislav Shwartsman
3ab0331307 implemented VMCS shadowing (Intel SDM rev045) 2013-01-21 19:55:00 +00:00
Stanislav Shwartsman
9e896ce0bf SFENCE instruction doesn't require SSE2 2013-01-20 17:56:08 +00:00
Stanislav Shwartsman
4bed791ccb Added year 2013 to Copyright in all files already modified in new year 2013-01-19 20:45:03 +00:00
Stanislav Shwartsman
05d36f0acc fixed performance bug in smap/smep fix - tlb never had user executable page permission 2013-01-19 20:14:44 +00:00
Stanislav Shwartsman
eda28b95f4 unfortunately this change is rquired to make SMAP and SMEP features to work. 
I observed ~5% emulation slowdown ... thinking about possible mitigations

this fixes TLB issue with SMAP and SMEP features.
these features introduce a new behavior when page can be inaccessible by System (CPL=0).
Current behavior is accessBits was not supporting it but legacy (from Bochs 2.3.6) was.
The wrong behavior can be observed if user access a user page and system access the same page later.
user access is fine and pass SMEP/SMA checks and stores the translation in TLB.
the system access will hit the TLB and nobody could detect that system cannot access that page.
 2013-01-16 17:28:20 +00:00
Stanislav Shwartsman
c337b7babb Intel Software Developers Manual rev45 was released 
Added CPUID bits and preparations for newly documented VMX features
 2013-01-16 16:57:48 +00:00
Stanislav Shwartsman
c96f5e27a9 flush tlb also when cr4.smap changes 2013-01-14 17:02:51 +00:00
Stanislav Shwartsman
d93607cfe6 implemented pause threshold count in SVN + bugfix in SMAP 2013-01-08 21:03:22 +00:00
Stanislav Shwartsman
93d6c2e1fc added AMD Bulldozer architecture CPU (Zambezi) to CPUDB 2013-01-07 19:33:04 +00:00
Stanislav Shwartsman
c6b1f6c22b fixed IsValidPageAlignedPhyAddr check for VMX/SVM 2012-12-30 19:49:20 +00:00
Stanislav Shwartsman
685e0091b4 fixed decoding of RDRAND/RDSEED with 0x66 prefix 2012-12-27 19:31:21 +00:00
Stanislav Shwartsman
48d7fa3786 fixed code duplication, mainly in vmx/svm code 2012-12-26 21:59:16 +00:00
Stanislav Shwartsman
6e5a934eea XSAVE: Fixed XCR0 reserved combination checking in XSETBV instruction 2012-12-23 16:54:18 +00:00
Stanislav Shwartsman
ce2751a13c move misaligned_sse from compile time to .bochsrc option 2012-12-20 19:43:11 +00:00
Stanislav Shwartsman
db4d75317a fixed small avx issues 2012-12-11 21:01:05 +00:00
Stanislav Shwartsman
318ad5e26d optimize avx stores 2012-12-10 14:43:21 +00:00
Stanislav Shwartsman
182ad65ea3 changes in avx emulation code 2012-12-09 16:42:48 +00:00
Stanislav Shwartsman
574b69c81e fixed MSDEV warnings 2012-11-27 15:40:45 +00:00
Stanislav Shwartsman
64f9c12bbc name new CPUID bits from AMD 2012-11-10 11:00:09 +00:00
Stanislav Shwartsman
edf4ea4c74 fixed SF bug #1318 dbg: several issues with 'set' command 2012-11-06 20:01:02 +00:00
Stanislav Shwartsman
7bace61c12 fixed compilation issue 2012-11-05 06:41:10 +00:00
Stanislav Shwartsman
8a01ee1661 implemented SVM decode assists. some is still missing - coming soon 2012-11-02 07:46:50 +00:00
Stanislav Shwartsman
8d32f2e305 fixed another compilaton err in vapic 2012-10-28 18:32:58 +00:00
Stanislav Shwartsman
7e663e785e fix compilation err 2012-10-28 16:34:25 +00:00
Stanislav Shwartsman
744001e35e Implemented VMX APIC Registers Virtualization and VMX Virtual Interrupt Delivery emulation 
Bugfix: VMX: VmEntry should do TPR Virtualization (TPR Shadow + APIC Access Virtualization case is affected) and even could possibly cause TPR Threshold VMEXIT
 2012-10-26 18:43:53 +00:00
Stanislav Shwartsman
9b65cae026 make WRMSR end-of-trace instruction 2012-10-25 16:49:22 +00:00
Stanislav Shwartsman
4273b41d00 fixed write to apicbase when in x2apic mode 2012-10-25 16:09:34 +00:00
Stanislav Shwartsman
7e1b67f91e fixed bugs in vmx code 2012-10-25 16:08:28 +00:00
Stanislav Shwartsman
e4d659c54d fix compilation err 2012-10-25 16:07:11 +00:00
Stanislav Shwartsman
45d5d690d7 initialize random generator for RDRAND/RDSEED 2012-10-09 20:53:50 +00:00
Stanislav Shwartsman
2638c1136a Add RDRAND/RDSEED instructions support (+ disasm) 
Of course no true random numbers will be generated - use standard "C" rand() function as stub.
In future it will be possible to improve (using another random generator) or even use real rdrand/rdseed intrinsics
 2012-10-09 15:16:48 +00:00
Stanislav Shwartsman
e7a2c9892c re-implement VTPF write using event handling interface as trap event (in preparation to more apic virtualization features) 2012-10-07 09:16:13 +00:00
Stanislav Shwartsman
b0edc32f4c fixed compilation with VMX 2012-10-06 09:13:41 +00:00
Stanislav Shwartsman
c48e516386 implemented injection of MTF event. The MTF VMexec control is still not implemented yet 2012-10-05 20:48:22 +00:00
Stanislav Shwartsman
3cd11b02ee optimization and bugfix for prev commit 2012-10-04 21:30:50 +00:00
Stanislav Shwartsman
1b228aec32 Fixed double and triple fault detection in exception.cc. Remove errorno variable from CPU (redundant now) 2012-10-04 20:52:27 +00:00